Martin Roth has posted comments on this change. ( https://review.coreboot.org/27034 )
Change subject: cpu/x86: Make SMM stack size configurable
......................................................................
Patch Set 1: Code-Review+2
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Gerrit-Change-Id: I94e385497bd93c3638c69fb08d9b843c3bbb55ce
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Raul Rangel has uploaded this change for review. ( https://review.coreboot.org/27034
Change subject: cpu/x86: Make SMM stack size configurable
......................................................................
cpu/x86: Make SMM stack size configurable
Stoneyridge is running into a stack overflow in the SMM handler.
BUG=b:80539294
TEST=built on grunt
Change-Id: I94e385497bd93c3638c69fb08d9b843c3bbb55ce
Signed-off-by: Raul E Rangel <rrangel(a)chromium.org>
---
M src/cpu/x86/Kconfig
M src/cpu/x86/mp_init.c
2 files changed, 9 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/34/27034/1
diff --git a/src/cpu/x86/Kconfig b/src/cpu/x86/Kconfig
index a20febb..952b308 100644
--- a/src/cpu/x86/Kconfig
+++ b/src/cpu/x86/Kconfig
@@ -112,6 +112,14 @@
This option determines the size of the heap within the SMM handler
modules.
+config SMM_MODULE_STACK_SIZE
+ hex
+ default 0x400
+ depends on SMM_TSEG
+ help
+ This option determines the size of the stack within the SMM handler
+ modules.
+
config SMM_LAPIC_REMAP_MITIGATION
bool
default y if NORTHBRIDGE_INTEL_I945
diff --git a/src/cpu/x86/mp_init.c b/src/cpu/x86/mp_init.c
index a696cd0..9fd10f7 100644
--- a/src/cpu/x86/mp_init.c
+++ b/src/cpu/x86/mp_init.c
@@ -792,7 +792,7 @@
/* There are num_cpus concurrent stacks and num_cpus concurrent save
* state areas. Lastly, set the stack size to 1KiB. */
struct smm_loader_params smm_params = {
- .per_cpu_stack_size = 1 * KiB,
+ .per_cpu_stack_size = CONFIG_SMM_MODULE_STACK_SIZE,
.num_concurrent_stacks = num_cpus,
.per_cpu_save_state_size = save_state_size,
.num_concurrent_save_states = num_cpus,
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Hello build bot (Jenkins), Martin Roth,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/27033
to look at the new patch set (#3).
Change subject: stoneyridge: Increase SMM stack size to 2K
......................................................................
stoneyridge: Increase SMM stack size to 2K
GSMI Set Event Log is taking more than 1K in stack. This causes the
stack to overflow into the adjacent stack. This has the side effect of
causing any CPU waiting for the SMI handler to complete to crash when
the lock is unlocked because the return pointer has been smashed.
BUG=b:80539294
TEST=built on grunt and tested by running `halt` from the OS.
Change-Id: Ib170c7d03909ef3d20831726b285178a75007b06
Signed-off-by: Raul E Rangel <rrangel(a)chromium.org>
---
M src/cpu/x86/Kconfig
M src/cpu/x86/mp_init.c
M src/soc/amd/stoneyridge/Kconfig
3 files changed, 13 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/33/27033/3
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build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/22980 )
Change subject: sb/intel/i82801ix: Use the common ACPI pirq generator
......................................................................
Patch Set 23: Verified+1
Build Successful
https://qa.coreboot.org/job/coreboot-gerrit/74789/ : SUCCESS
https://qa.coreboot.org/job/coreboot-checkpatch/28891/ : SUCCESS
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Gerrit-Comment-Date: Tue, 12 Jun 2018 16:34:13 +0000
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build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/23288 )
Change subject: sb/intel/i82801ix: Use common RCBA code
......................................................................
Patch Set 17:
Build Successful
https://qa.coreboot.org/job/coreboot-gerrit/74788/ : SUCCESS
https://qa.coreboot.org/job/coreboot-checkpatch/28890/ : SUCCESS
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