coreboot-gerrit June 2018

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Change in coreboot[master]: soc/intel/common: defines constant for C1E enable mask
by Cole Nelson (Code Review) 13 Jun '18

13 Jun '18

Hello build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/27035 to look at the new patch set (#3). Change subject: soc/intel/common: defines constant for C1E enable mask ...................................................................... soc/intel/common: defines constant for C1E enable mask Register 0x1fc (MSR_POWER_CTL) deserves a proper mask for the C1E enable bit. Define POWER_CTL_C1E_MASK to be used subsequently. Change-Id: I7a5408f6678f56540929b7811764845b6dad1149 Signed-off-by: Cole Nelson <colex.nelson(a)intel.com> --- M src/soc/intel/common/block/include/intelblocks/msr.h 1 file changed, 1 insertion(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/35/27035/3 -- To view, visit https://review.coreboot.org/27035 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newpatchset Gerrit-Change-Id: I7a5408f6678f56540929b7811764845b6dad1149 Gerrit-Change-Number: 27035 Gerrit-PatchSet: 3 Gerrit-Owner: Cole Nelson <colex.nelson(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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Change in coreboot[master]: soc/intel/common: defines constant for C1E enable mask
by build bot (Jenkins) (Code Review) 13 Jun '18

13 Jun '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/27035 ) Change subject: soc/intel/common: defines constant for C1E enable mask ...................................................................... Patch Set 2: Build Successful https://qa.coreboot.org/job/coreboot-gerrit/74796/ : SUCCESS -- To view, visit https://review.coreboot.org/27035 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I7a5408f6678f56540929b7811764845b6dad1149 Gerrit-Change-Number: 27035 Gerrit-PatchSet: 2 Gerrit-Owner: Cole Nelson <colex.nelson(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Tue, 12 Jun 2018 17:31:27 +0000 Gerrit-HasComments: No Gerrit-HasLabels: No

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Change in coreboot[master]: soc/intel/{glk, apl}: ensure C1E is disabled after S3 resume
by build bot (Jenkins) (Code Review) 13 Jun '18

13 Jun '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/27019 ) Change subject: soc/intel/{glk,apl}: ensure C1E is disabled after S3 resume ...................................................................... Patch Set 2: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-gerrit/74797/ : SUCCESS https://qa.coreboot.org/job/coreboot-checkpatch/28898/ : SUCCESS -- To view, visit https://review.coreboot.org/27019 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I437cbaca75c539c2bc5cd801ab8df907e7447d10 Gerrit-Change-Number: 27019 Gerrit-PatchSet: 2 Gerrit-Owner: Cole Nelson <colex.nelson(a)intel.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Cole Nelson <colex.nelson(a)intel.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Venkateswarlu V Vinjamuri <venkateswarlu.v.vinjamuri(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Furquan Shaikh <furquan(a)google.com> Gerrit-Comment-Date: Tue, 12 Jun 2018 17:31:26 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in coreboot[master]: soc/intel/common: defines constant for C1E enable mask
by Cole Nelson (Code Review) 13 Jun '18

13 Jun '18

Hello build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/27035 to look at the new patch set (#2). Change subject: soc/intel/common: defines constant for C1E enable mask ...................................................................... soc/intel/common: defines constant for C1E enable mask Register 0x1fc (MSR_POWER_CTL) deserves a proper mask for the C1E enable bit. Define POWER_CTL_C1E_MASK to be used subsequently. Change-Id: I7a5408f6678f56540929b7811764845b6dad1149 Signed-off-by: Cole Nelson <colex.nelson(a)intel.com> --- M src/soc/intel/common/block/include/intelblocks/msr.h 1 file changed, 1 insertion(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/35/27035/2 -- To view, visit https://review.coreboot.org/27035 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newpatchset Gerrit-Change-Id: I7a5408f6678f56540929b7811764845b6dad1149 Gerrit-Change-Number: 27035 Gerrit-PatchSet: 2 Gerrit-Owner: Cole Nelson <colex.nelson(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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Change in coreboot[master]: soc/intel/apollolake: defines constant for C1E enable mask
by build bot (Jenkins) (Code Review) 13 Jun '18

13 Jun '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/27035 ) Change subject: soc/intel/apollolake: defines constant for C1E enable mask ...................................................................... Patch Set 1: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-gerrit/74795/ : SUCCESS https://qa.coreboot.org/job/coreboot-checkpatch/28897/ : SUCCESS -- To view, visit https://review.coreboot.org/27035 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I7a5408f6678f56540929b7811764845b6dad1149 Gerrit-Change-Number: 27035 Gerrit-PatchSet: 1 Gerrit-Owner: Cole Nelson <colex.nelson(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Tue, 12 Jun 2018 17:07:49 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in coreboot[master]: stoneyridge: Move agesa out of bootblock
by build bot (Jenkins) (Code Review) 13 Jun '18

13 Jun '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/26478 ) Change subject: stoneyridge: Move agesa out of bootblock ...................................................................... Patch Set 2: Build Successful https://qa.coreboot.org/job/coreboot-gerrit/74794/ : SUCCESS https://qa.coreboot.org/job/coreboot-checkpatch/28896/ : SUCCESS -- To view, visit https://review.coreboot.org/26478 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I55959b59a4e60b679d959ebd77de27e5d454f5f7 Gerrit-Change-Number: 26478 Gerrit-PatchSet: 2 Gerrit-Owner: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Tue, 12 Jun 2018 17:02:49 +0000 Gerrit-HasComments: No Gerrit-HasLabels: No

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Change in coreboot[master]: soc/intel/apollolake: defines constant for C1E enable mask
by Cole Nelson (Code Review) 13 Jun '18

13 Jun '18

Cole Nelson has uploaded this change for review. ( https://review.coreboot.org/27035 Change subject: soc/intel/apollolake: defines constant for C1E enable mask ...................................................................... soc/intel/apollolake: defines constant for C1E enable mask Register 0x1fc (MSR_POWER_CTL) deserves a proper mask for the C1E enable bit. Define POWER_CTL_C1E_MASK to be used subsequently. Change-Id: I7a5408f6678f56540929b7811764845b6dad1149 Signed-off-by: Cole Nelson <colex.nelson(a)intel.com> --- M src/soc/intel/common/block/include/intelblocks/msr.h 1 file changed, 1 insertion(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/35/27035/1 diff --git a/src/soc/intel/common/block/include/intelblocks/msr.h b/src/soc/intel/common/block/include/intelblocks/msr.h index 22e8862..e1fc431 100644 --- a/src/soc/intel/common/block/include/intelblocks/msr.h +++ b/src/soc/intel/common/block/include/intelblocks/msr.h @@ -72,6 +72,7 @@ #define PRMRR_PHYS_MASK_LOCK (1 << 10) #define PRMRR_PHYS_MASK_VALID (1 << 11) #define MSR_POWER_CTL 0x1fc +#define POWER_CTL_C1E_MASK (1 << 1) #define MSR_EVICT_CTL 0x2e0 #define MSR_SGX_OWNEREPOCH0 0x300 #define MSR_SGX_OWNEREPOCH1 0x301 -- To view, visit https://review.coreboot.org/27035 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: I7a5408f6678f56540929b7811764845b6dad1149 Gerrit-Change-Number: 27035 Gerrit-PatchSet: 1 Gerrit-Owner: Cole Nelson <colex.nelson(a)intel.com>

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Change in coreboot[master]: stoneyridge: Move agesa out of bootblock
by Raul Rangel (Code Review) 13 Jun '18

13 Jun '18

Raul Rangel has posted comments on this change. ( https://review.coreboot.org/26478 ) Change subject: stoneyridge: Move agesa out of bootblock ...................................................................... Patch Set 2: Just tested again. Looks good to merge! -- To view, visit https://review.coreboot.org/26478 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I55959b59a4e60b679d959ebd77de27e5d454f5f7 Gerrit-Change-Number: 26478 Gerrit-PatchSet: 2 Gerrit-Owner: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Tue, 12 Jun 2018 16:55:03 +0000 Gerrit-HasComments: No Gerrit-HasLabels: No

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Change in coreboot[master]: stoneyridge: Move agesa out of bootblock
by Raul Rangel (Code Review) 13 Jun '18

13 Jun '18

Raul Rangel has posted comments on this change. ( https://review.coreboot.org/26478 ) Change subject: stoneyridge: Move agesa out of bootblock ...................................................................... Set Ready For Review -- To view, visit https://review.coreboot.org/26478 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I55959b59a4e60b679d959ebd77de27e5d454f5f7 Gerrit-Change-Number: 26478 Gerrit-PatchSet: 2 Gerrit-Owner: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Tue, 12 Jun 2018 16:54:46 +0000 Gerrit-HasComments: No Gerrit-HasLabels: No

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Change in coreboot[master]: stoneyridge: Increase SMM stack size to 2K
by build bot (Jenkins) (Code Review) 13 Jun '18

13 Jun '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/27033 ) Change subject: stoneyridge: Increase SMM stack size to 2K ...................................................................... Patch Set 4: Build Successful https://qa.coreboot.org/job/coreboot-gerrit/74792/ : SUCCESS https://qa.coreboot.org/job/coreboot-checkpatch/28894/ : SUCCESS -- To view, visit https://review.coreboot.org/27033 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Ib170c7d03909ef3d20831726b285178a75007b06 Gerrit-Change-Number: 27033 Gerrit-PatchSet: 4 Gerrit-Owner: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Tue, 12 Jun 2018 16:52:37 +0000 Gerrit-HasComments: No Gerrit-HasLabels: No

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coreboot-gerrit June 2018