Hello Ravishankar Sarawadi, Hannah Williams,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/25757
to look at the new patch set (#2).
Change subject: vendorcode/intel: Update FSP Header files per v2.0.2
......................................................................
vendorcode/intel: Update FSP Header files per v2.0.2
Update FSP header files to match GLK FSP Reference Code Release v2.0.2
Change-Id: I78d064db41a54d97e98d6e44e0832724127e5bfc
Signed-off-by: Srinidhi N Kaushik <srinidhi.n.kaushik(a)intel.com>
---
M src/vendorcode/intel/fsp/fsp2_0/glk/FspmUpd.h
M src/vendorcode/intel/fsp/fsp2_0/glk/FspsUpd.h
2 files changed, 76 insertions(+), 6 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/57/25757/2
--
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newpatchset
Gerrit-Change-Id: I78d064db41a54d97e98d6e44e0832724127e5bfc
Gerrit-Change-Number: 25757
Gerrit-PatchSet: 2
Gerrit-Owner: Srinidhi N Kaushik <srinidhi.n.kaushik(a)intel.com>
Gerrit-Reviewer: Hannah Williams <hannah.williams(a)intel.com>
Gerrit-Reviewer: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com>
Marc Jones has uploaded this change for review. ( https://review.coreboot.org/25756
Change subject: mainboard/google/kahlee: Set SPI speed early
......................................................................
mainboard/google/kahlee: Set SPI speed early
Set the SPI speed for Normal, Fast, AltIO, and TPM in bootblock.
This setup is needed when moving AGESA out of the bootblock. It sets the
SPI bus speed of the TPM access for verstage.
BUG=b:70558952
TEST=Boot with AGESA moved out of the bootblock.
Change-Id: Ida77d78eb1f290e46b57a46298400ed6c8015e2c
Signed-off-by: Marc Jones <marc.jones(a)scarletltd.com>
---
M src/mainboard/google/kahlee/bootblock/bootblock.c
1 file changed, 6 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/56/25756/1
diff --git a/src/mainboard/google/kahlee/bootblock/bootblock.c b/src/mainboard/google/kahlee/bootblock/bootblock.c
index 843bf4e..577c105 100644
--- a/src/mainboard/google/kahlee/bootblock/bootblock.c
+++ b/src/mainboard/google/kahlee/bootblock/bootblock.c
@@ -34,6 +34,12 @@
void bootblock_mainboard_init(void)
{
+ /* Set SPI speeds before verstage. Needed for TPM */
+ sb_set_spi100(SPI_SPEED_22M, /* Normal */
+ SPI_SPEED_66M, /* Fast */
+ SPI_SPEED_66M, /* AltIO */
+ SPI_SPEED_66M); /* TPM */
+
/* Setup TPM decode before verstage */
sb_tpm_decode_spi();
--
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: Ida77d78eb1f290e46b57a46298400ed6c8015e2c
Gerrit-Change-Number: 25756
Gerrit-PatchSet: 1
Gerrit-Owner: Marc Jones <marc(a)marcjonesconsulting.com>