coreboot-gerrit March 2018

coreboot-gerrit@coreboot.org

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Change in coreboot[master]: google/cyan: fix ACPI interrupt triggering for audio codecs
by build bot (Jenkins) (Code Review) 05 Mar '18

05 Mar '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/24989 ) Change subject: google/cyan: fix ACPI interrupt triggering for audio codecs ...................................................................... Patch Set 1: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-checkpatch/22660/ : SUCCESS https://qa.coreboot.org/job/coreboot-gerrit/68211/ : SUCCESS -- To view, visit https://review.coreboot.org/24989 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Ic1dd8ece610d761791c060ece2d0aa51addf97ad Gerrit-Change-Number: 24989 Gerrit-PatchSet: 1 Gerrit-Owner: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Mon, 05 Mar 2018 00:19:53 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in coreboot[master]: WIP / lib: Add blob_provider interface
by build bot (Jenkins) (Code Review) 05 Mar '18

05 Mar '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/24942 ) Change subject: WIP / lib: Add blob_provider interface ...................................................................... Patch Set 7: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-checkpatch/22661/ : SUCCESS https://qa.coreboot.org/job/coreboot-gerrit/68213/ : SUCCESS -- To view, visit https://review.coreboot.org/24942 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I8f161f680cb36fa6481a8bce6cf233263a828bf7 Gerrit-Change-Number: 24942 Gerrit-PatchSet: 7 Gerrit-Owner: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Mon, 05 Mar 2018 00:12:20 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in coreboot[master]: soc/intel/braswell: add ACPI for eMMC/SD devices in PCI mode
by build bot (Jenkins) (Code Review) 05 Mar '18

05 Mar '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/24988 ) Change subject: soc/intel/braswell: add ACPI for eMMC/SD devices in PCI mode ...................................................................... Patch Set 1: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-checkpatch/22659/ : SUCCESS https://qa.coreboot.org/job/coreboot-gerrit/68209/ : SUCCESS -- To view, visit https://review.coreboot.org/24988 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I4272c198e5e675f451a1f4de5d46e3cd96371446 Gerrit-Change-Number: 24988 Gerrit-PatchSet: 1 Gerrit-Owner: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Mon, 05 Mar 2018 00:08:47 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in coreboot[master]: soc/intel/braswell: add LPEA resources to southcluster.asl
by build bot (Jenkins) (Code Review) 05 Mar '18

05 Mar '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/24987 ) Change subject: soc/intel/braswell: add LPEA resources to southcluster.asl ...................................................................... Patch Set 1: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-checkpatch/22658/ : SUCCESS https://qa.coreboot.org/job/coreboot-gerrit/68210/ : SUCCESS -- To view, visit https://review.coreboot.org/24987 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Ic3ecfc2ddade7d76dbaa95ffdd82599c3bcf35da Gerrit-Change-Number: 24987 Gerrit-PatchSet: 1 Gerrit-Owner: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Mon, 05 Mar 2018 00:08:40 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in coreboot[master]: soc/intel/braswell: fix PCI resource PMAX/PLEN values
by build bot (Jenkins) (Code Review) 05 Mar '18

05 Mar '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/24985 ) Change subject: soc/intel/braswell: fix PCI resource PMAX/PLEN values ...................................................................... Patch Set 2: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-gerrit/68212/ : SUCCESS -- To view, visit https://review.coreboot.org/24985 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I4f2f4a0ff3a285826709f9eaafa40b0bf0cafb83 Gerrit-Change-Number: 24985 Gerrit-PatchSet: 2 Gerrit-Owner: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Mon, 05 Mar 2018 00:07:59 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in coreboot[master]: soc/intel/braswell: add resource allocation for LPE BAR1
by build bot (Jenkins) (Code Review) 05 Mar '18

05 Mar '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/21103 ) Change subject: soc/intel/braswell: add resource allocation for LPE BAR1 ...................................................................... Patch Set 2: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-checkpatch/22655/ : SUCCESS https://qa.coreboot.org/job/coreboot-gerrit/68208/ : SUCCESS -- To view, visit https://review.coreboot.org/21103 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Iaa68319da5fb999fe8d73792eaee692cce60c8a2 Gerrit-Change-Number: 21103 Gerrit-PatchSet: 2 Gerrit-Owner: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Mon, 05 Mar 2018 00:04:04 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in coreboot[master]: soc/intel/braswell: increase LPEA fw allocation to 2MiB
by build bot (Jenkins) (Code Review) 05 Mar '18

05 Mar '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/24986 ) Change subject: soc/intel/braswell: increase LPEA fw allocation to 2MiB ...................................................................... Patch Set 1: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-checkpatch/22656/ : SUCCESS https://qa.coreboot.org/job/coreboot-gerrit/68206/ : SUCCESS -- To view, visit https://review.coreboot.org/24986 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I7cffcdd83a66a922c2454488c8650df03c9f5097 Gerrit-Change-Number: 24986 Gerrit-PatchSet: 1 Gerrit-Owner: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Mon, 05 Mar 2018 00:02:38 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in coreboot[master]: soc/intel/braswell: fix PCI resource PMAX/PLEN values
by build bot (Jenkins) (Code Review) 05 Mar '18

05 Mar '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/24985 ) Change subject: soc/intel/braswell: fix PCI resource PMAX/PLEN values ...................................................................... Patch Set 1: Verified-1 Build Failed https://qa.coreboot.org/job/coreboot-gerrit/68207/ : ABORTED https://qa.coreboot.org/job/coreboot-checkpatch/22657/ : SUCCESS -- To view, visit https://review.coreboot.org/24985 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I4f2f4a0ff3a285826709f9eaafa40b0bf0cafb83 Gerrit-Change-Number: 24985 Gerrit-PatchSet: 1 Gerrit-Owner: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Sun, 04 Mar 2018 23:58:40 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in coreboot[master]: soc/intel/braswell: fix PCI resource PMAX/PLEN values
by Matt DeVillier (Code Review) 05 Mar '18

05 Mar '18

Matt DeVillier has uploaded a new patch set (#2). ( https://review.coreboot.org/24985 ) Change subject: soc/intel/braswell: fix PCI resource PMAX/PLEN values ...................................................................... soc/intel/braswell: fix PCI resource PMAX/PLEN values Without PMAX correctly set, the calculation for PLEN is incorrect, leading to a Windows BSOD on boot. Correct PMAX using code from Baytrail SoC, setting PMAX to (CONFIG_MMCONF_BASE_ADDRESS - 1). Test: boot Windows on google/edgar without BSOD. Change-Id: I4f2f4a0ff3a285826709f9eaafa40b0bf0cafb83 Signed-off-by: Matt DeVillier <matt.devillier(a)gmail.com> --- M src/soc/intel/braswell/acpi/southcluster.asl 1 file changed, 1 insertion(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/85/24985/2 -- To view, visit https://review.coreboot.org/24985 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newpatchset Gerrit-Change-Id: I4f2f4a0ff3a285826709f9eaafa40b0bf0cafb83 Gerrit-Change-Number: 24985 Gerrit-PatchSet: 2 Gerrit-Owner: Matt DeVillier <matt.devillier(a)gmail.com>

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Change in coreboot[master]: google/cyan: fix ACPI interrupt triggering for audio codecs
by Matt DeVillier (Code Review) 05 Mar '18

05 Mar '18

Matt DeVillier has uploaded this change for review. ( https://review.coreboot.org/24989 Change subject: google/cyan: fix ACPI interrupt triggering for audio codecs ...................................................................... google/cyan: fix ACPI interrupt triggering for audio codecs Adjust GpioInt trigger type for both LPEA and audio codec to match Intel CHT reference code. Fixes jack detection under Windows. Test: boot Windows on google/egdar, observe headphone insertion/ removal produces audio output on the expected device. Change-Id: Ic1dd8ece610d761791c060ece2d0aa51addf97ad Signed-off-by: Matt DeVillier <matt.devillier(a)gmail.com> --- M src/mainboard/google/cyan/acpi/codec_maxim.asl M src/mainboard/google/cyan/acpi/codec_realtek.asl 2 files changed, 5 insertions(+), 5 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/89/24989/1 diff --git a/src/mainboard/google/cyan/acpi/codec_maxim.asl b/src/mainboard/google/cyan/acpi/codec_maxim.asl index 9abc91e..f805ea1 100644 --- a/src/mainboard/google/cyan/acpi/codec_maxim.asl +++ b/src/mainboard/google/cyan/acpi/codec_maxim.asl @@ -47,7 +47,7 @@ "\\_SB.PCI0.I2C2", /* ResourceSource: I2C bus controller name */ ) - GpioInt (Edge, ActiveLow, ExclusiveAndWake, PullNone,, + GpioInt (Edge, ActiveHigh, ExclusiveAndWake, PullNone,, "\\_SB.GPSE") { BOARD_JACK_MAXIM_GPIO_INDEX } } ) Return (SBUF) @@ -91,7 +91,7 @@ "\\_SB.PCI0.I2C2", /* ResourceSource: I2C bus controller name */ ) - GpioInt (Edge, ActiveLow, ExclusiveAndWake, PullNone,, + GpioInt (Edge, ActiveHigh, ExclusiveAndWake, PullNone,, "\\_SB.GPSW") { BOARD_JACK_TI_GPIO_INDEX } } ) @@ -111,7 +111,7 @@ Name (GBUF, ResourceTemplate () { /* Jack Detect (index 0) */ - GpioInt (Edge, ActiveLow, ExclusiveAndWake, PullNone,, + GpioInt (Edge, ActiveBoth, ExclusiveAndWake, PullNone,, "\\_SB.GPSE") { BOARD_JACK_MAXIM_GPIO_INDEX } }) } diff --git a/src/mainboard/google/cyan/acpi/codec_realtek.asl b/src/mainboard/google/cyan/acpi/codec_realtek.asl index d3fa84e..35aa64d 100644 --- a/src/mainboard/google/cyan/acpi/codec_realtek.asl +++ b/src/mainboard/google/cyan/acpi/codec_realtek.asl @@ -39,7 +39,7 @@ ) /* Jack Detect (index 0) */ - GpioInt (Edge, ActiveLow, ExclusiveAndWake, PullNone,, + GpioInt (Edge, ActiveHigh, ExclusiveAndWake, PullNone,, "\\_SB.GPSW") { JACK_DETECT_GPIO_INDEX } } ) Return (SBUF) @@ -57,7 +57,7 @@ Name (GBUF, ResourceTemplate () { /* Jack Detect (index 0) */ - GpioInt (Edge, ActiveLow, ExclusiveAndWake, PullNone,, + GpioInt (Edge, ActiveBoth, ExclusiveAndWake, PullNone,, "\\_SB.GPSW") { JACK_DETECT_GPIO_INDEX } }) } -- To view, visit https://review.coreboot.org/24989 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: Ic1dd8ece610d761791c060ece2d0aa51addf97ad Gerrit-Change-Number: 24989 Gerrit-PatchSet: 1 Gerrit-Owner: Matt DeVillier <matt.devillier(a)gmail.com>

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coreboot-gerrit March 2018