coreboot-gerrit February 2018

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Change in coreboot[master]: chromeec: Add support for reading second battery info
by Nicolas Boichat (Code Review) 06 Feb '18

06 Feb '18

Nicolas Boichat has posted comments on this change. ( https://review.coreboot.org/23598 ) Change subject: chromeec: Add support for reading second battery info ...................................................................... Patch Set 1: Code-Review-1 -- To view, visit https://review.coreboot.org/23598 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Ib06176e6ab4c45a899259f0917e6292121865ed6 Gerrit-Change-Number: 23598 Gerrit-PatchSet: 1 Gerrit-Owner: Nicolas Boichat <drinkcat(a)chromium.org> Gerrit-Reviewer: Duncan Laurie <dlaurie(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Nicolas Boichat <drinkcat(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Tue, 06 Feb 2018 02:42:11 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in coreboot[master]: soc/intel/cannonlake: Add support for EMMC DLL update
by build bot (Jenkins) (Code Review) 06 Feb '18

06 Feb '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/23600 ) Change subject: soc/intel/cannonlake: Add support for EMMC DLL update ...................................................................... Patch Set 1: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-gerrit/67070/ : SUCCESS https://qa.coreboot.org/job/coreboot-checkpatch/21639/ : SUCCESS -- To view, visit https://review.coreboot.org/23600 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I38bc022d8c05dd1fbd03dc26aa6f33cd249e8248 Gerrit-Change-Number: 23600 Gerrit-PatchSet: 1 Gerrit-Owner: Lijian Zhao <lijian.zhao(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Tue, 06 Feb 2018 02:25:00 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in coreboot[master]: soc/intel/cannonlake: Add support for EMMC DLL update
by Lijian Zhao (Code Review) 06 Feb '18

06 Feb '18

Lijian Zhao has uploaded this change for review. ( https://review.coreboot.org/23600 Change subject: soc/intel/cannonlake: Add support for EMMC DLL update ...................................................................... soc/intel/cannonlake: Add support for EMMC DLL update Add option to have customized DLL setting for EMMC interface to make EMMC able to running at HS400 speed. BUG=None Change-Id: I38bc022d8c05dd1fbd03dc26aa6f33cd249e8248 Signed-off-by: Lijian Zhao <lijian.zhao(a)intel.com> --- M src/soc/intel/cannonlake/chip.c M src/soc/intel/cannonlake/chip.h 2 files changed, 12 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/00/23600/1 diff --git a/src/soc/intel/cannonlake/chip.c b/src/soc/intel/cannonlake/chip.c index f05b55a..68f95d3 100644 --- a/src/soc/intel/cannonlake/chip.c +++ b/src/soc/intel/cannonlake/chip.c @@ -262,6 +262,12 @@ /* eMMC and SD */ params->ScsEmmcEnabled = config->ScsEmmcEnabled; params->ScsEmmcHs400Enabled = config->ScsEmmcHs400Enabled; + params->PchScsEmmcHs400DllDataValid = config->EmmcHs400DllNeed; + if (config->EmmcHs400DllNeed == 1) { + params->PchScsEmmcHs400RxStrobeDll1 = + config->EmmcHs400RxStrobeDll1; + params->PchScsEmmcHs400TxDataDll = config->EmmcHs400TxDataDll; + } params->ScsSdCardEnabled = config->ScsSdCardEnabled; params->ScsUfsEnabled = config->ScsUfsEnabled; diff --git a/src/soc/intel/cannonlake/chip.h b/src/soc/intel/cannonlake/chip.h index a42494c..fd86b8d 100644 --- a/src/soc/intel/cannonlake/chip.h +++ b/src/soc/intel/cannonlake/chip.h @@ -155,7 +155,12 @@ /* eMMC and SD */ uint8_t ScsEmmcEnabled; uint8_t ScsEmmcHs400Enabled; - uint8_t PchScsEmmcHs400TuningRequired; + /* Need to update DLL setting to get Emmc running at HS400 speed */ + uint8_t EmmcHs400DllNeed; + /* 0-39: number of active delay for RX strobe, unit is 125 pSec */ + uint8_t EmmcHs400RxStrobeDll1; + /* 0-78: number of active delay for TX data, unit is 125 pSec */ + uint8_t EmmcHs400TxDataDll; uint8_t ScsSdCardEnabled; uint8_t ScsUfsEnabled; -- To view, visit https://review.coreboot.org/23600 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: I38bc022d8c05dd1fbd03dc26aa6f33cd249e8248 Gerrit-Change-Number: 23600 Gerrit-PatchSet: 1 Gerrit-Owner: Lijian Zhao <lijian.zhao(a)intel.com>

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Change in coreboot[master]: mb/google/poppy/variants/poppy: Enable EC_ENABLE_SECOND_BATTERY_DEVICE
by build bot (Jenkins) (Code Review) 06 Feb '18

06 Feb '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/23599 ) Change subject: mb/google/poppy/variants/poppy: Enable EC_ENABLE_SECOND_BATTERY_DEVICE ...................................................................... Patch Set 1: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-gerrit/67069/ : SUCCESS https://qa.coreboot.org/job/coreboot-checkpatch/21638/ : SUCCESS -- To view, visit https://review.coreboot.org/23599 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I869bf08341b83f359066709e1e9c03af99482b2c Gerrit-Change-Number: 23599 Gerrit-PatchSet: 1 Gerrit-Owner: Nicolas Boichat <drinkcat(a)chromium.org> Gerrit-Reviewer: Duncan Laurie <dlaurie(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Nicolas Boichat <drinkcat(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Tue, 06 Feb 2018 02:06:19 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in coreboot[master]: chromeec: Add support for reading second battery info
by build bot (Jenkins) (Code Review) 06 Feb '18

06 Feb '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/23598 ) Change subject: chromeec: Add support for reading second battery info ...................................................................... Patch Set 1: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-gerrit/67068/ : SUCCESS https://qa.coreboot.org/job/coreboot-checkpatch/21637/ : SUCCESS -- To view, visit https://review.coreboot.org/23598 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Ib06176e6ab4c45a899259f0917e6292121865ed6 Gerrit-Change-Number: 23598 Gerrit-PatchSet: 1 Gerrit-Owner: Nicolas Boichat <drinkcat(a)chromium.org> Gerrit-Reviewer: Duncan Laurie <dlaurie(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Nicolas Boichat <drinkcat(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Tue, 06 Feb 2018 02:00:01 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in coreboot[master]: mb/google/poppy/variants/poppy: Enable EC_ENABLE_SECOND_BATTERY_DEVICE
by Nicolas Boichat (Code Review) 06 Feb '18

06 Feb '18

Nicolas Boichat has uploaded this change for review. ( https://review.coreboot.org/23599 Change subject: mb/google/poppy/variants/poppy: Enable EC_ENABLE_SECOND_BATTERY_DEVICE ...................................................................... mb/google/poppy/variants/poppy: Enable EC_ENABLE_SECOND_BATTERY_DEVICE BRANCH=none BUG=b:65697620 TEST=Boot lux, both /sys/class/power_supply/BAT0 and BAT1 are present, data is valid. Change-Id: I869bf08341b83f359066709e1e9c03af99482b2c Signed-off-by: Nicolas Boichat <drinkcat(a)chromium.org> --- M src/mainboard/google/poppy/variants/poppy/include/variant/ec.h 1 file changed, 2 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/99/23599/1 diff --git a/src/mainboard/google/poppy/variants/poppy/include/variant/ec.h b/src/mainboard/google/poppy/variants/poppy/include/variant/ec.h index ef47d37..81f92b7 100644 --- a/src/mainboard/google/poppy/variants/poppy/include/variant/ec.h +++ b/src/mainboard/google/poppy/variants/poppy/include/variant/ec.h @@ -18,4 +18,6 @@ #include <baseboard/ec.h> +#define EC_ENABLE_SECOND_BATTERY_DEVICE + #endif /* __MAINBOARD_EC_H__ */ -- To view, visit https://review.coreboot.org/23599 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: I869bf08341b83f359066709e1e9c03af99482b2c Gerrit-Change-Number: 23599 Gerrit-PatchSet: 1 Gerrit-Owner: Nicolas Boichat <drinkcat(a)chromium.org>

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Change in coreboot[master]: chromeec: Add support for reading second battery info
by Nicolas Boichat (Code Review) 06 Feb '18

06 Feb '18

Nicolas Boichat has uploaded this change for review. ( https://review.coreboot.org/23598 Change subject: chromeec: Add support for reading second battery info ...................................................................... chromeec: Add support for reading second battery info We share the same shared memory fields for both batteries. When the host wants to switch battery to read out, it will: - Set BTID (EC_ACPI_MEM_BATTERY_INDEX) to the required index - Wait for BITX (EC_MEMMAP_BATT_INDEX) to have the required value - Then fetch the data BRANCH=none BUG=b:65697620 TEST=Boot lux, both /sys/class/power_supply/BAT0 and BAT1 are present, data is valid. Change-Id: Ib06176e6ab4c45a899259f0917e6292121865ed6 Signed-off-by: Nicolas Boichat <drinkcat(a)chromium.org> --- M src/ec/google/chromeec/acpi/battery.asl M src/ec/google/chromeec/acpi/ec.asl M src/ec/google/chromeec/acpi/emem.asl 3 files changed, 328 insertions(+), 122 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/98/23598/1 diff --git a/src/ec/google/chromeec/acpi/battery.asl b/src/ec/google/chromeec/acpi/battery.asl index 2ed4468..a472d24 100644 --- a/src/ec/google/chromeec/acpi/battery.asl +++ b/src/ec/google/chromeec/acpi/battery.asl @@ -16,6 +16,221 @@ // Scope (EC0) +/* Mutex for EC battery index interface */ +Mutex (BATM, 1) + +// Wait for desired battery index to be presented in shared memory +// Arg0 = battery index +// Returns Zero on success, One or error. +Method (BTSW, 1) +{ +#ifdef EC_ENABLE_SECOND_BATTERY_DEVICE + If (LEqual (BTIX, Arg0)) { + Return (Zero) + } + If (LGreaterEqual (Arg0, BTCN)) { + Return (One) + } + Store (Arg0, \_SB.PCI0.LPCB.EC0.BTID) + Store (5, Local0) // Timeout 5 msec + While (LNotEqual (BTIX, Arg0)) + { + Sleep (1) + Decrement (Local0) + If (LEqual (Local0, Zero)) + { + Return (One) + } + } +#endif + Return (Zero) +} + +// _STA implementation. +// Arg0 = battery index +Method (BSTA, 1, Serialized) +{ + If (Acquire (^BATM, 1000)) { + Return (Zero) + } + + If (And(Not(BTSW (Arg0)), BTEX)) { + Store (0x1F, Local0) + } Else { + Store (0x0F, Local0) + } + + Release (^BATM) + Return (Local0) +} + +// _BIF implementation. +// Arg0 = battery index +// Arg1 = PBIF +Method (BBIF, 2, Serialized) +{ + If (Acquire (^BATM, 1000)) { + Return (Arg1) + } + + If (BTSW (Arg0)) { + Release (^BATM) + Return (Arg1) + } + // Last Full Charge Capacity + Store (BTDF, Index (Arg1, 2)) + + // Design Voltage + Store (BTDV, Index (Arg1, 4)) + + // Design Capacity + Store (BTDA, Local0) + Store (Local0, Index (Arg1, 1)) + + // Design Capacity of Warning + Divide (Multiply (Local0, DWRN), 100, , Local2) + Store (Local2, Index (Arg1, 5)) + + // Design Capacity of Low + Divide (Multiply (Local0, DLOW), 100, , Local2) + Store (Local2, Index (Arg1, 6)) + + // Get battery info from mainboard + Store (ToString(Concatenate(BMOD, 0x00)), Index (Arg1, 9)) + Store (ToString(Concatenate(BSER, 0x00)), Index (Arg1, 10)) + Store (ToString(Concatenate(BMFG, 0x00)), Index (Arg1, 12)) + + Release (^BATM) + Return (Arg1) +} + +// _BIX implementation. +// Arg0 = battery index +// Arg1 = PBIX +Method (BBIX, 2, Serialized) +{ + If (Acquire (^BATM, 1000)) { + Return (Arg1) + } + + If (BTSW (Arg0)) { + Release (^BATM) + Return (Arg1) + } + // Last Full Charge Capacity + Store (BTDF, Index (Arg1, 3)) + + // Design Voltage + Store (BTDV, Index (Arg1, 5)) + + // Design Capacity + Store (BTDA, Local0) + Store (Local0, Index (Arg1, 2)) + + // Design Capacity of Warning + Divide (Multiply (Local0, DWRN), 100, , Local2) + Store (Local2, Index (Arg1, 6)) + + // Design Capacity of Low + Divide (Multiply (Local0, DLOW), 100, , Local2) + Store (Local2, Index (Arg1, 7)) + + // Cycle Count + Store (BTCC, Index (Arg1, 8)) + + // Get battery info from mainboard + Store (ToString(Concatenate(BMOD, 0x00)), Index (Arg1, 16)) + Store (ToString(Concatenate(BSER, 0x00)), Index (Arg1, 17)) + Store (ToString(Concatenate(BMFG, 0x00)), Index (Arg1, 19)) + + Release (^BATM) + Return (Arg1) +} + +// _BST implementation. +// Arg0 = battery index +// Arg1 = PBST +// Arg2 = BSTP +// Arg3 = BFWK +// Arg4 = BAT0/1 (battery structure itself) +Method (BBST, 5, Serialized) +{ + If (Acquire (^BATM, 1000)) { + Return (Arg1) + } + + If (BTSW (Arg0)) { + Release (^BATM) + Return (Arg1) + } + // + // 0: BATTERY STATE + // + // bit 0 = discharging + // bit 1 = charging + // bit 2 = critical level + // + Store (Zero, Local1) + + // Check if AC is present + If (ACEX) { + If (BFCG) { + Store (0x02, Local1) + } ElseIf (BFDC) { + Store (0x01, Local1) + } + } Else { + // Always discharging when on battery power + Store (0x01, Local1) + } + + // Check for critical battery level + If (BFCR) { + Or (Local1, 0x04, Local1) + } + Store (Local1, Index (Arg1, 0)) + + // Notify if battery state has changed since last time + If (LNotEqual (Local1, Arg2)) { + Store (Local1, Arg2) + Notify (Arg4, 0x80) + } + + // + // 1: BATTERY PRESENT RATE + // + Store (BTPR, Index (Arg1, 1)) + + // + // 2: BATTERY REMAINING CAPACITY + // + Store (BTRA, Local1) + If (LAnd (Arg3, LAnd (ACEX, LNot (LAnd (BFDC, BFCG))))) { + // On AC power and battery is neither charging + // nor discharging. Linux expects a full battery + // to report same capacity as last full charge. + // https://bugzilla.kernel.org/show_bug.cgi?id=12632 + Store (BTDF, Local2) + + // See if within ~6% of full + ShiftRight (Local2, 4, Local3) + If (LAnd (LGreater (Local1, Subtract (Local2, Local3)), + LLess (Local1, Add (Local2, Local3)))) + { + Store (Local2, Local1) + } + } + Store (Local1, Index (Arg1, 2)) + + // + // 3: BATTERY PRESENT VOLTAGE + // + Store (BTVO, Index (Arg1, 3)) + + Release (^BATM) + Return (Arg1) +} + Device (BAT0) { Name (_HID, EISAID ("PNP0C0A")) @@ -86,138 +301,112 @@ Method (_STA, 0, Serialized) { - If (BTEX) { - Return (0x1F) - } Else { - Return (0x0F) - } + Return (BSTA (0)) } Method (_BIF, 0, Serialized) { - // Last Full Charge Capacity - Store (BTDF, Index (PBIF, 2)) - - // Design Voltage - Store (BTDV, Index (PBIF, 4)) - - // Design Capacity - Store (BTDA, Local0) - Store (Local0, Index (PBIF, 1)) - - // Design Capacity of Warning - Divide (Multiply (Local0, DWRN), 100, , Local2) - Store (Local2, Index (PBIF, 5)) - - // Design Capacity of Low - Divide (Multiply (Local0, DLOW), 100, , Local2) - Store (Local2, Index (PBIF, 6)) - - // Get battery info from mainboard - Store (ToString(Concatenate(BMOD, 0x00)), Index (PBIF, 9)) - Store (ToString(Concatenate(BSER, 0x00)), Index (PBIF, 10)) - Store (ToString(Concatenate(BMFG, 0x00)), Index (PBIF, 12)) - - Return (PBIF) + Return (BBIF (0, PBIF)) } Method (_BIX, 0, Serialized) { - // Last Full Charge Capacity - Store (BTDF, Index (PBIX, 3)) - - // Design Voltage - Store (BTDV, Index (PBIX, 5)) - - // Design Capacity - Store (BTDA, Local0) - Store (Local0, Index (PBIX, 2)) - - // Design Capacity of Warning - Divide (Multiply (Local0, DWRN), 100, , Local2) - Store (Local2, Index (PBIX, 6)) - - // Design Capacity of Low - Divide (Multiply (Local0, DLOW), 100, , Local2) - Store (Local2, Index (PBIX, 7)) - - // Cycle Count - Store (BTCC, Index (PBIX, 8)) - - // Get battery info from mainboard - Store (ToString(Concatenate(BMOD, 0x00)), Index (PBIX, 16)) - Store (ToString(Concatenate(BSER, 0x00)), Index (PBIX, 17)) - Store (ToString(Concatenate(BMFG, 0x00)), Index (PBIX, 19)) - - Return (PBIX) + Return (BBIX (0, PBIX)) } Method (_BST, 0, Serialized) { - // - // 0: BATTERY STATE - // - // bit 0 = discharging - // bit 1 = charging - // bit 2 = critical level - // - Store (Zero, Local1) - - // Check if AC is present - If (ACEX) { - If (BFCG) { - Store (0x02, Local1) - } ElseIf (BFDC) { - Store (0x01, Local1) - } - } Else { - // Always discharging when on battery power - Store (0x01, Local1) - } - - // Check for critical battery level - If (BFCR) { - Or (Local1, 0x04, Local1) - } - Store (Local1, Index (PBST, 0)) - - // Notify if battery state has changed since last time - If (LNotEqual (Local1, BSTP)) { - Store (Local1, BSTP) - Notify (BAT0, 0x80) - } - - // - // 1: BATTERY PRESENT RATE - // - Store (BTPR, Index (PBST, 1)) - - // - // 2: BATTERY REMAINING CAPACITY - // - Store (BTRA, Local1) - If (LAnd (BFWK, LAnd (ACEX, LNot (LAnd (BFDC, BFCG))))) { - // On AC power and battery is neither charging - // nor discharging. Linux expects a full battery - // to report same capacity as last full charge. - // https://bugzilla.kernel.org/show_bug.cgi?id=12632 - Store (BTDF, Local2) - - // See if within ~6% of full - ShiftRight (Local2, 4, Local3) - If (LAnd (LGreater (Local1, Subtract (Local2, Local3)), - LLess (Local1, Add (Local2, Local3)))) - { - Store (Local2, Local1) - } - } - Store (Local1, Index (PBST, 2)) - - // - // 3: BATTERY PRESENT VOLTAGE - // - Store (BTVO, Index (PBST, 3)) - - Return (PBST) + Return (BBST (0, PBST, BSTP, BFWK, BAT0)) } } + +#ifdef EC_ENABLE_SECOND_BATTERY_DEVICE +Device (BAT1) +{ + Name (_HID, EISAID ("PNP0C0A")) + Name (_UID, 1) + Name (_PCL, Package () { \_SB }) + + Name (PBIF, Package () { + 0x00000001, // 0x00: Power Unit: mAh + 0xFFFFFFFF, // 0x01: Design Capacity + 0xFFFFFFFF, // 0x02: Last Full Charge Capacity + 0x00000001, // 0x03: Battery Technology: Rechargeable + 0xFFFFFFFF, // 0x04: Design Voltage + 0x00000003, // 0x05: Design Capacity of Warning + 0xFFFFFFFF, // 0x06: Design Capacity of Low + 0x00000001, // 0x07: Capacity Granularity 1 + 0x00000001, // 0x08: Capacity Granularity 2 + "", // 0x09: Model Number + "", // 0x0a: Serial Number + "LION", // 0x0b: Battery Type + "" // 0x0c: OEM Information + }) + + Name (PBIX, Package () { + 0x00000000, // 0x00: Revision + 0x00000001, // 0x01: Power Unit: mAh + 0xFFFFFFFF, // 0x02: Design Capacity + 0xFFFFFFFF, // 0x03: Last Full Charge Capacity + 0x00000001, // 0x04: Battery Technology: Rechargeable + 0xFFFFFFFF, // 0x05: Design Voltage + 0x00000003, // 0x06: Design Capacity of Warning + 0xFFFFFFFF, // 0x07: Design Capacity of Low + 0x00000000, // 0x08: Cycle Count + 0x00018000, // 0x09: Measurement Accuracy (98.3%?) + 0x000001F4, // 0x0a: Max Sampling Time (500ms) + 0x0000000a, // 0x0b: Min Sampling Time (10ms) + 0xFFFFFFFF, // 0x0c: Max Averaging Interval + 0xFFFFFFFF, // 0x0d: Min Averaging Interval + 0x00000001, // 0x0e: Capacity Granularity 1 + 0x00000001, // 0x0f: Capacity Granularity 2 + "", // 0x10 Model Number + "", // 0x11: Serial Number + "LION", // 0x12: Battery Type + "" // 0x13: OEM Information + }) + + Name (PBST, Package () { + 0x00000000, // 0x00: Battery State + 0xFFFFFFFF, // 0x01: Battery Present Rate + 0xFFFFFFFF, // 0x02: Battery Remaining Capacity + 0xFFFFFFFF, // 0x03: Battery Present Voltage + }) + Name (BSTP, Zero) + + // Workaround for full battery status, enabled by default + Name (BFWK, One) + + // Method to enable full battery workaround + Method (BFWE) + { + Store (One, BFWK) + } + + // Method to disable full battery workaround + Method (BFWD) + { + Store (Zero, BFWK) + } + + Method (_STA, 0, Serialized) + { + Return (BSTA (1)) + } + + Method (_BIF, 0, Serialized) + { + Return (BBIF (1, PBIF)) + } + + Method (_BIX, 0, Serialized) + { + Return (BBIX (1, PBIX)) + } + + Method (_BST, 0, Serialized) + { + Return (BBST (1, PBST, BSTP, BFWK, BAT1)) + } +} +#endif diff --git a/src/ec/google/chromeec/acpi/ec.asl b/src/ec/google/chromeec/acpi/ec.asl index 618b00a..62f9acd 100644 --- a/src/ec/google/chromeec/acpi/ec.asl +++ b/src/ec/google/chromeec/acpi/ec.asl @@ -90,7 +90,9 @@ DEVE, 1, // EC supports device events // make sure we're within our space envelope Offset (0x0e), - } + Offset (0x12), + BTID, 8, // Battery index that host wants to read +} #if IS_ENABLED(CONFIG_EC_GOOGLE_CHROMEEC_ACPI_MEMMAP) OperationRegion (EMEM, EmbeddedControl, @@ -272,6 +274,11 @@ { Store ("EC: BATTERY INFO", Debug) Notify (BAT0, 0x81) +#ifdef EC_ENABLE_SECOND_BATTERY_DEVICE + If (CondRefOf (BAT1)) { + Notify (BAT1, 0x81) + } +#endif } // Thermal Overload Event @@ -347,6 +354,11 @@ { Store ("EC: BATTERY STATUS", Debug) Notify (BAT0, 0x80) +#ifdef EC_ENABLE_SECOND_BATTERY_DEVICE + If (CondRefOf (BAT1)) { + Notify (BAT1, 0x80) + } +#endif } // MKBP interrupt. diff --git a/src/ec/google/chromeec/acpi/emem.asl b/src/ec/google/chromeec/acpi/emem.asl index ba98831..982ec5b 100644 --- a/src/ec/google/chromeec/acpi/emem.asl +++ b/src/ec/google/chromeec/acpi/emem.asl @@ -30,6 +30,8 @@ TIN9, 8, // Temperature 9 Offset (0x10), FAN0, 16, // Fan Speed 0 +Offset (0x24), +BTVR, 8, // Battery structure version Offset (0x30), LIDS, 1, // Lid Switch State PBTN, 1, // Power Button Pressed @@ -45,6 +47,9 @@ BFDC, 1, // Battery Discharging BFCG, 1, // Battery Charging BFCR, 1, // Battery Level Critical +Offset (0x4d), +BTCN, 8, // Battery Count +BTIX, 8, // Battery index Offset (0x50), BTDA, 32, // Battery Design Capacity BTDV, 32, // Battery Design Voltage -- To view, visit https://review.coreboot.org/23598 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: Ib06176e6ab4c45a899259f0917e6292121865ed6 Gerrit-Change-Number: 23598 Gerrit-PatchSet: 1 Gerrit-Owner: Nicolas Boichat <drinkcat(a)chromium.org>

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Change in coreboot[master]: FSP header update
by Bora Guvendik (Code Review) 06 Feb '18

06 Feb '18

Bora Guvendik has abandoned this change. ( https://review.coreboot.org/23593 ) Change subject: FSP header update ...................................................................... Abandoned not latest -- To view, visit https://review.coreboot.org/23593 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: abandon Gerrit-Change-Id: I608fa188c10e7de0e3d21365efd557ac4f6fa69a Gerrit-Change-Number: 23593 Gerrit-PatchSet: 1 Gerrit-Owner: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: John Zhao <john.zhao(a)intel.com> Gerrit-Reviewer: Lijian Zhao <lijian.zhao(a)intel.com>

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Change in coreboot[master]: mb/amd/gardenia: Remove cmos.layout
by build bot (Jenkins) (Code Review) 06 Feb '18

06 Feb '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/23597 ) Change subject: mb/amd/gardenia: Remove cmos.layout ...................................................................... Patch Set 1: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-gerrit/67067/ : SUCCESS https://qa.coreboot.org/job/coreboot-checkpatch/21636/ : SUCCESS -- To view, visit https://review.coreboot.org/23597 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I24a71490777b101b069175460f3715ec3ff78240 Gerrit-Change-Number: 23597 Gerrit-PatchSet: 1 Gerrit-Owner: Richard Spiegel <richard.spiegel(a)silverbackltd.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Tue, 06 Feb 2018 00:38:29 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in coreboot[master]: mb/google/kahlee: Remove cmos.layout
by build bot (Jenkins) (Code Review) 06 Feb '18

06 Feb '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/23596 ) Change subject: mb/google/kahlee: Remove cmos.layout ...................................................................... Patch Set 1: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-gerrit/67066/ : SUCCESS https://qa.coreboot.org/job/coreboot-checkpatch/21635/ : SUCCESS -- To view, visit https://review.coreboot.org/23596 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Ib5d18e80a56111d96c730420db865194c71de1b3 Gerrit-Change-Number: 23596 Gerrit-PatchSet: 1 Gerrit-Owner: Richard Spiegel <richard.spiegel(a)silverbackltd.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Tue, 06 Feb 2018 00:34:29 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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coreboot-gerrit February 2018