coreboot-gerrit February 2018

coreboot-gerrit@coreboot.org

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Change in coreboot[master]: soc/intel/skylake: Implement Sata SOC override as per SPT-PCH
by build bot (Jenkins) (Code Review) 06 Feb '18

06 Feb '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/23590 ) Change subject: soc/intel/skylake: Implement Sata SOC override as per SPT-PCH ...................................................................... Patch Set 2: Verified-1 Build Failed https://qa.coreboot.org/job/coreboot-gerrit/67075/ : ABORTED https://qa.coreboot.org/job/coreboot-checkpatch/21644/ : SUCCESS -- To view, visit https://review.coreboot.org/23590 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I497e367f4b1dd83130c137965df906abf3b8ae0f Gerrit-Change-Number: 23590 Gerrit-PatchSet: 2 Gerrit-Owner: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Balaji Manigandan <balaji.manigandan(a)intel.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Tue, 06 Feb 2018 05:24:21 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in coreboot[master]: soc/intel/cannonlake: Implement Sata SOC override as per CNP-PCH
by build bot (Jenkins) (Code Review) 06 Feb '18

06 Feb '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/23591 ) Change subject: soc/intel/cannonlake: Implement Sata SOC override as per CNP-PCH ...................................................................... Patch Set 2: Verified-1 Build Failed https://qa.coreboot.org/job/coreboot-gerrit/67076/ : ABORTED https://qa.coreboot.org/job/coreboot-checkpatch/21645/ : SUCCESS -- To view, visit https://review.coreboot.org/23591 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Ide093dafe33b947ba7845cc0b74a975471353e39 Gerrit-Change-Number: 23591 Gerrit-PatchSet: 2 Gerrit-Owner: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Balaji Manigandan <balaji.manigandan(a)intel.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Lijian Zhao <lijian.zhao(a)intel.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Tue, 06 Feb 2018 05:24:20 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in coreboot[master]: google/kahlee/grunt: Fixing 2 device specific variables
by build bot (Jenkins) (Code Review) 06 Feb '18

06 Feb '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/23603 ) Change subject: google/kahlee/grunt: Fixing 2 device specific variables ...................................................................... Patch Set 1: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-gerrit/67073/ : SUCCESS https://qa.coreboot.org/job/coreboot-checkpatch/21642/ : SUCCESS -- To view, visit https://review.coreboot.org/23603 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Ife7e8cdd835cc256cd8265593a94df84a510cebb Gerrit-Change-Number: 23603 Gerrit-PatchSet: 1 Gerrit-Owner: Akshu Agrawal <akshu.agrawal(a)amd.com> Gerrit-Reviewer: Daniel Kurtz <djkurtz(a)google.com> Gerrit-Reviewer: Marc Jones <marc(a)marcjonesconsulting.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Tue, 06 Feb 2018 05:16:44 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in coreboot[master]: google/kahlee/grunt: Fixing 2 device specific variables
by Akshu Agrawal (Code Review) 06 Feb '18

06 Feb '18

Akshu Agrawal has uploaded this change for review. ( https://review.coreboot.org/23603 Change subject: google/kahlee/grunt: Fixing 2 device specific variables ...................................................................... google/kahlee/grunt: Fixing 2 device specific variables Changed micbias_lvl -> micbias-lvl mic_amp_in_sel -> mic-amp-in-sel BUG=b:71875600 TEST=Checked in kernel the values are set Change-Id: Ife7e8cdd835cc256cd8265593a94df84a510cebb Signed-off-by: Akshu Agrawal <akshu.agrawal(a)amd.com> --- M src/mainboard/google/kahlee/variants/baseboard/include/baseboard/acpi/audio.asl 1 file changed, 2 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/03/23603/1 diff --git a/src/mainboard/google/kahlee/variants/baseboard/include/baseboard/acpi/audio.asl b/src/mainboard/google/kahlee/variants/baseboard/include/baseboard/acpi/audio.asl index 01edce5..520c0d1 100644 --- a/src/mainboard/google/kahlee/variants/baseboard/include/baseboard/acpi/audio.asl +++ b/src/mainboard/google/kahlee/variants/baseboard/include/baseboard/acpi/audio.asl @@ -54,8 +54,8 @@ ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"), Package () { - Package () { "dlg,micbias_lvl", 2600 }, - Package () { "dlg,mic_amp_in_sel", "diff" } + Package () { "dlg,micbias-lvl", 2600 }, + Package () { "dlg,mic-amp-in-sel", "diff" } }, ToUUID ("dbb8e3e6-5886-4ba6-8795-1319f52a966b"), -- To view, visit https://review.coreboot.org/23603 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: Ife7e8cdd835cc256cd8265593a94df84a510cebb Gerrit-Change-Number: 23603 Gerrit-PatchSet: 1 Gerrit-Owner: Akshu Agrawal <akshu.agrawal(a)amd.com>

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Change in coreboot[master]: soc/intel/skylake: always select NO_UART_ON_SUPERIO
by build bot (Jenkins) (Code Review) 06 Feb '18

06 Feb '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/23602 ) Change subject: soc/intel/skylake: always select NO_UART_ON_SUPERIO ...................................................................... Patch Set 1: Verified-1 Build Unstable https://qa.coreboot.org/job/coreboot-gerrit/67072/ : UNSTABLE https://qa.coreboot.org/job/coreboot-checkpatch/21641/ : SUCCESS -- To view, visit https://review.coreboot.org/23602 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I6c7071ac1a275435830e2ea9b7e5996594ea06ed Gerrit-Change-Number: 23602 Gerrit-PatchSet: 1 Gerrit-Owner: Vadim Bendebury <vbendeb(a)chromium.org> Gerrit-Assignee: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Kin Wai Ng <kin.wai.ng(a)intel.com> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Teo Boon Tiong <boon.tiong.teo(a)intel.com> Gerrit-Reviewer: Vadim Bendebury <vbendeb(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Tue, 06 Feb 2018 04:17:37 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in coreboot[master]: soc/intel/skylake: always select NO_UART_ON_SUPERIO
by Subrata Banik (Code Review) 06 Feb '18

06 Feb '18

Subrata Banik has posted comments on this change. ( https://review.coreboot.org/23602 ) Change subject: soc/intel/skylake: always select NO_UART_ON_SUPERIO ...................................................................... Patch Set 1: (1 comment) https://review.coreboot.org/#/c/23602/1/src/soc/intel/skylake/Kconfig File src/soc/intel/skylake/Kconfig: https://review.coreboot.org/#/c/23602/1/src/soc/intel/skylake/Kconfig@48 PS1, Line 48: select NO_UART_ON_SUPERIO we might need to check this with IOTG folks at Intel as i know they are using UART over SIO. -- To view, visit https://review.coreboot.org/23602 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I6c7071ac1a275435830e2ea9b7e5996594ea06ed Gerrit-Change-Number: 23602 Gerrit-PatchSet: 1 Gerrit-Owner: Vadim Bendebury <vbendeb(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Vadim Bendebury <vbendeb(a)chromium.org> Gerrit-Comment-Date: Tue, 06 Feb 2018 04:13:33 +0000 Gerrit-HasComments: Yes Gerrit-HasLabels: No

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Change in coreboot[master]: soc/intel/skylake: always select NO_UART_ON_SUPERIO
by Vadim Bendebury (Code Review) 06 Feb '18

06 Feb '18

Vadim Bendebury has posted comments on this change. ( https://review.coreboot.org/23602 ) Change subject: soc/intel/skylake: always select NO_UART_ON_SUPERIO ...................................................................... Patch Set 1: I have not yet fully tested this, fizz builds fine with and without serial output enabled. -- To view, visit https://review.coreboot.org/23602 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I6c7071ac1a275435830e2ea9b7e5996594ea06ed Gerrit-Change-Number: 23602 Gerrit-PatchSet: 1 Gerrit-Owner: Vadim Bendebury <vbendeb(a)chromium.org> Gerrit-Reviewer: Vadim Bendebury <vbendeb(a)chromium.org> Gerrit-Comment-Date: Tue, 06 Feb 2018 04:12:55 +0000 Gerrit-HasComments: No Gerrit-HasLabels: No

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Change in coreboot[master]: soc/intel/skylake: always select NO_UART_ON_SUPERIO
by Vadim Bendebury (Code Review) 06 Feb '18

06 Feb '18

Vadim Bendebury has uploaded this change for review. ( https://review.coreboot.org/23602 Change subject: soc/intel/skylake: always select NO_UART_ON_SUPERIO ...................................................................... soc/intel/skylake: always select NO_UART_ON_SUPERIO Not selecting NO_UART_ON_SUPERIO causes the DRIVERS_UART_8250IO config flag to be enabled in src/drivers/uart/Kconfig, which in turn causes the code for this driver to be included in the image by default. BRANCH=none BUG=none TEST=TBD Change-Id: I6c7071ac1a275435830e2ea9b7e5996594ea06ed Signed-off-by: Vadim Bendebury <vbendeb(a)chromium.org> --- M src/soc/intel/skylake/Kconfig 1 file changed, 1 insertion(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/02/23602/1 diff --git a/src/soc/intel/skylake/Kconfig b/src/soc/intel/skylake/Kconfig index 34893dc..9a9d9d2 100644 --- a/src/soc/intel/skylake/Kconfig +++ b/src/soc/intel/skylake/Kconfig @@ -45,6 +45,7 @@ select PCIEXP_COMMON_CLOCK select PCIEXP_L1_SUB_STATE select PCIEX_LENGTH_64MB + select NO_UART_ON_SUPERIO select REG_SCRIPT select RELOCATABLE_MODULES select RELOCATABLE_RAMSTAGE @@ -209,7 +210,6 @@ select CONSOLE_SERIAL select DRIVERS_UART select DRIVERS_UART_8250MEM_32 - select NO_UART_ON_SUPERIO config UART_FOR_CONSOLE int "Index for LPSS UART port to use for console" -- To view, visit https://review.coreboot.org/23602 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: I6c7071ac1a275435830e2ea9b7e5996594ea06ed Gerrit-Change-Number: 23602 Gerrit-PatchSet: 1 Gerrit-Owner: Vadim Bendebury <vbendeb(a)chromium.org>

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Change in coreboot[master]: soc/intel/skylake: sort CPU_SPECIFIC_OPTIONS and drop duplicate
by build bot (Jenkins) (Code Review) 06 Feb '18

06 Feb '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/23601 ) Change subject: soc/intel/skylake: sort CPU_SPECIFIC_OPTIONS and drop duplicate ...................................................................... Patch Set 1: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-gerrit/67071/ : SUCCESS https://qa.coreboot.org/job/coreboot-checkpatch/21640/ : SUCCESS -- To view, visit https://review.coreboot.org/23601 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Ic525ee07015deb88fff4c15cad9dbbeada8a4479 Gerrit-Change-Number: 23601 Gerrit-PatchSet: 1 Gerrit-Owner: Vadim Bendebury <vbendeb(a)chromium.org> Gerrit-Assignee: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Tue, 06 Feb 2018 04:07:54 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in coreboot[master]: soc/intel/skylake: sort CPU_SPECIFIC_OPTIONS and drop duplicate
by Vadim Bendebury (Code Review) 06 Feb '18

06 Feb '18

Vadim Bendebury has uploaded this change for review. ( https://review.coreboot.org/23601 Change subject: soc/intel/skylake: sort CPU_SPECIFIC_OPTIONS and drop duplicate ...................................................................... soc/intel/skylake: sort CPU_SPECIFIC_OPTIONS and drop duplicate ACPI_NHLT happens to be selected twice. BRANCH=none BUG=none TEST=generated fizz .config does not change Change-Id: Ic525ee07015deb88fff4c15cad9dbbeada8a4479 Signed-off-by: Vadim Bendebury <vbendeb(a)chromium.org> --- M src/soc/intel/skylake/Kconfig 1 file changed, 11 insertions(+), 12 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/01/23601/1 diff --git a/src/soc/intel/skylake/Kconfig b/src/soc/intel/skylake/Kconfig index a486bd6..34893dc 100644 --- a/src/soc/intel/skylake/Kconfig +++ b/src/soc/intel/skylake/Kconfig @@ -15,33 +15,34 @@ config CPU_SPECIFIC_OPTIONS def_bool y select ACPI_INTEL_HARDWARE_SLEEP_VALUES + select ACPI_NHLT select ARCH_BOOTBLOCK_X86_32 select ARCH_RAMSTAGE_X86_32 select ARCH_ROMSTAGE_X86_32 select ARCH_VERSTAGE_X86_32 - select ACPI_NHLT select BOOTBLOCK_CONSOLE select BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY if BOOT_DEVICE_SPI_FLASH select BOOT_DEVICE_SUPPORTS_WRITES select CACHE_MRC_SETTINGS select CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM if RELOCATABLE_RAMSTAGE - select C_ENVIRONMENT_BOOTBLOCK select COLLECT_TIMESTAMPS select COMMON_FADT select CPU_INTEL_FIRMWARE_INTERFACE_TABLE + select C_ENVIRONMENT_BOOTBLOCK select GENERIC_GPIO_LIB + select HAVE_FSP_GOP select HAVE_HARD_RESET select HAVE_INTEL_FIRMWARE select HAVE_MONOTONIC_TIMER select HAVE_SMI_HANDLER select IOAPIC - select NO_FIXED_XIP_ROM_SIZE select MRC_SETTINGS_PROTECT + select NO_FIXED_XIP_ROM_SIZE select PARALLEL_MP select PARALLEL_MP_AP_WORK select PCIEXP_ASPM - select PCIEXP_COMMON_CLOCK select PCIEXP_CLK_PM + select PCIEXP_COMMON_CLOCK select PCIEXP_L1_SUB_STATE select PCIEX_LENGTH_64MB select REG_SCRIPT @@ -49,6 +50,8 @@ select RELOCATABLE_RAMSTAGE select RTC select SA_ENABLE_DPR + select SMM_TSEG + select SMP select SOC_INTEL_COMMON select SOC_INTEL_COMMON_ACPI_WAKE_SOURCE select SOC_INTEL_COMMON_BLOCK @@ -59,17 +62,17 @@ select SOC_INTEL_COMMON_BLOCK_EBDA select SOC_INTEL_COMMON_BLOCK_FAST_SPI select SOC_INTEL_COMMON_BLOCK_GPIO - select SOC_INTEL_COMMON_BLOCK_GPIO_PADCFG_PADTOL select SOC_INTEL_COMMON_BLOCK_GPIO_LEGACY_MACROS + select SOC_INTEL_COMMON_BLOCK_GPIO_PADCFG_PADTOL select SOC_INTEL_COMMON_BLOCK_GRAPHICS select SOC_INTEL_COMMON_BLOCK_GSPI - select SOC_INTEL_COMMON_BLOCK_ITSS select SOC_INTEL_COMMON_BLOCK_I2C + select SOC_INTEL_COMMON_BLOCK_ITSS select SOC_INTEL_COMMON_BLOCK_LPC select SOC_INTEL_COMMON_BLOCK_LPSS select SOC_INTEL_COMMON_BLOCK_PCIE - select SOC_INTEL_COMMON_BLOCK_PMC select SOC_INTEL_COMMON_BLOCK_PCR + select SOC_INTEL_COMMON_BLOCK_PMC select SOC_INTEL_COMMON_BLOCK_RTC select SOC_INTEL_COMMON_BLOCK_SA select SOC_INTEL_COMMON_BLOCK_SATA @@ -82,19 +85,15 @@ select SOC_INTEL_COMMON_BLOCK_TIMER select SOC_INTEL_COMMON_BLOCK_UART select SOC_INTEL_COMMON_BLOCK_XHCI + select SOC_INTEL_COMMON_GFX_OPREGION select SOC_INTEL_COMMON_NHLT select SOC_INTEL_COMMON_RESET - select SMM_TSEG - select SMP select SSE2 select SUPPORT_CPU_UCODE_IN_CBFS select TSC_CONSTANT_RATE select TSC_MONOTONIC_TIMER select TSC_SYNC_MFENCE select UDELAY_TSC - select ACPI_NHLT - select HAVE_FSP_GOP - select SOC_INTEL_COMMON_GFX_OPREGION config MAINBOARD_USES_FSP2_0 bool -- To view, visit https://review.coreboot.org/23601 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: Ic525ee07015deb88fff4c15cad9dbbeada8a4479 Gerrit-Change-Number: 23601 Gerrit-PatchSet: 1 Gerrit-Owner: Vadim Bendebury <vbendeb(a)chromium.org>

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coreboot-gerrit February 2018