Caveh Jalali has uploaded this change for review. ( https://review.coreboot.org/23630
Change subject: WIP: meowth: re-enable software sync
......................................................................
WIP: meowth: re-enable software sync
we had disabled software sync for bringup - we now have enough
functionality in place to turn on software sync.
Change-Id: Ib7f5a24ed8a47cb44b3f505e3cd49e0cb6931dc0
Signed-off-by: Caveh Jalali <caveh(a)google.com>
---
M src/mainboard/google/zoombini/Kconfig
1 file changed, 0 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/30/23630/1
diff --git a/src/mainboard/google/zoombini/Kconfig b/src/mainboard/google/zoombini/Kconfig
index 64180f3..1a320b1 100644
--- a/src/mainboard/google/zoombini/Kconfig
+++ b/src/mainboard/google/zoombini/Kconfig
@@ -71,7 +71,6 @@
select EC_GOOGLE_CHROMEEC_SWITCHES
select HAS_RECOVERY_MRC_CACHE
select MRC_CLEAR_NORMAL_CACHE_ON_RECOVERY_RETRAIN
- select GBB_FLAG_DISABLE_EC_SOFTWARE_SYNC
select VBOOT_LID_SWITCH if BASEBOARD_ZOOMBINI_LAPTOP
# Select this option to enable use of cr50 I2C TPM on zoombini.
--
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: Ib7f5a24ed8a47cb44b3f505e3cd49e0cb6931dc0
Gerrit-Change-Number: 23630
Gerrit-PatchSet: 1
Gerrit-Owner: Caveh Jalali <caveh(a)google.com>
Marshall Dawson has uploaded this change for review. ( https://review.coreboot.org/23629
Change subject: WIP amd/stoneyridge: Add FCH restore functions
......................................................................
WIP amd/stoneyridge: Add FCH restore functions
This is currently a placeholder which mimics the traditional methodology
for reinitializing the FCH during a resume. It will be unnecessary if
AGESA is modified to execute these steps internally.
Change-Id: I12e302d8d690725d87caf63211eec7fcd67a7b0a
Signed-off-by: Marshall Dawson <marshalldawson3rd(a)gmail.com>
---
M src/soc/amd/stoneyridge/chip.c
M src/soc/amd/stoneyridge/northbridge.c
2 files changed, 8 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/29/23629/1
diff --git a/src/soc/amd/stoneyridge/chip.c b/src/soc/amd/stoneyridge/chip.c
index f5efcfd..f95fc1d 100644
--- a/src/soc/amd/stoneyridge/chip.c
+++ b/src/soc/amd/stoneyridge/chip.c
@@ -123,6 +123,11 @@
post_code(0x46);
do_agesawrapper(agesawrapper_amds3laterestore,
"amds3laterestore");
+
+ /* Begin the FCH restore */
+ post_code(0x47);
+ do_agesawrapper(agesawrapper_fchs3earlyrestore,
+ "fchs3earlyrestore");
}
}
diff --git a/src/soc/amd/stoneyridge/northbridge.c b/src/soc/amd/stoneyridge/northbridge.c
index 2449077..c78d113 100644
--- a/src/soc/amd/stoneyridge/northbridge.c
+++ b/src/soc/amd/stoneyridge/northbridge.c
@@ -429,6 +429,9 @@
/* Must be called after PCI enumeration and resource allocation */
if (!romstage_handoff_is_resume())
do_agesawrapper(agesawrapper_amdinitmid, "amdinitmid");
+ else
+ do_agesawrapper(agesawrapper_fchs3laterestore,
+ "fchs3laterestore");
}
void domain_set_resources(device_t dev)
--
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Gerrit-Owner: Marshall Dawson <marshalldawson3rd(a)gmail.com>