coreboot-gerrit December 2018

coreboot-gerrit@coreboot.org

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Change in ...coreboot[master]: sb/intel/common: Create a common PCH finalise implementation
by Tristan Corrick (Code Review) 01 Dec '18

01 Dec '18

Tristan Corrick has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/29977 ) Change subject: sb/intel/common: Create a common PCH finalise implementation ...................................................................... Patch Set 3: (1 comment) https://review.coreboot.org/#/c/29977/3/src/southbridge/intel/common/finali… File src/southbridge/intel/common/finalize.c: https://review.coreboot.org/#/c/29977/3/src/southbridge/intel/common/finali… PS3, Line 75: outb(POST_OS_BOOT, CONFIG_POST_IO_PORT); I would have preferred to use `post_code(POST_OS_BOOT)`, but console/post.c isn't linked in SMM. Is there a reason why? It does compile when I set it up that way. Though, I suppose less code in SMM is a good thing... -- To view, visit https://review.coreboot.org/c/coreboot/+/29977 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I781082b1ed507b00815d1e85aec3e56ae5a4bef2 Gerrit-Change-Number: 29977 Gerrit-PatchSet: 3 Gerrit-Owner: Tristan Corrick <tristan(a)corrick.kiwi> Gerrit-Reviewer: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Tristan Corrick <tristan(a)corrick.kiwi> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Sat, 01 Dec 2018 15:02:26 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in ...coreboot[master]: sb/intel/common: Create a common PCH finalise implementation
by Tristan Corrick (Code Review) 01 Dec '18

01 Dec '18

Tristan Corrick has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/29977 ) Change subject: sb/intel/common: Create a common PCH finalise implementation ...................................................................... Patch Set 3: (4 comments) https://review.coreboot.org/#/c/29977/2/src/southbridge/intel/common/finali… File src/southbridge/intel/common/finalize.c: https://review.coreboot.org/#/c/29977/2/src/southbridge/intel/common/finali… PS2, Line 75: outb(POST_OS_BOOT, 0x80); > The name is just misleading. You might want to change that instead […] Done https://review.coreboot.org/#/c/29977/2/src/southbridge/intel/common/finali… PS2, Line 61: > It was just called differently: PMIR (same location). Okay, thanks. https://review.coreboot.org/#/c/29977/2/src/southbridge/intel/common/finali… PS2, Line 62: pci_update_config32(lpc_dev, D31F0_ETR3, ~ETR3_CF9GR, ETR3_CF9LOCK); : : if (IS_ENABLED(CONFIG_SOUTHBRID > It's HSW only. […] Done https://review.coreboot.org/#/c/29977/2/src/southbridge/intel/common/pmutil… File src/southbridge/intel/common/pmutil.h: https://review.coreboot.org/#/c/29977/2/src/southbridge/intel/common/pmutil… PS2, Line 25: F > F Done -- To view, visit https://review.coreboot.org/c/coreboot/+/29977 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I781082b1ed507b00815d1e85aec3e56ae5a4bef2 Gerrit-Change-Number: 29977 Gerrit-PatchSet: 3 Gerrit-Owner: Tristan Corrick <tristan(a)corrick.kiwi> Gerrit-Reviewer: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Tristan Corrick <tristan(a)corrick.kiwi> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Sat, 01 Dec 2018 14:59:36 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Tristan Corrick <tristan(a)corrick.kiwi> Comment-In-Reply-To: Nico Huber <nico.h(a)gmx.de> Gerrit-MessageType: comment

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Change in ...coreboot[master]: sb/intel/lynxpoint: Ensure the finalise handler is called
by Tristan Corrick (Code Review) 01 Dec '18

01 Dec '18

Tristan Corrick has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/29976 ) Change subject: sb/intel/lynxpoint: Ensure the finalise handler is called ...................................................................... Patch Set 2: (1 comment) https://review.coreboot.org/#/c/29976/1/src/southbridge/intel/lynxpoint/lpc… File src/southbridge/intel/lynxpoint/lpc.c: https://review.coreboot.org/#/c/29976/1/src/southbridge/intel/lynxpoint/lpc… PS1, Line 972: acpi_is_wakeup_s3() || IS_ENABLED(C > Should be selected by lynxpoint/Kconfig (instead of every single […] Done. I moved the option in Kconfig in a separate patch: https://review.coreboot.org/29992 -- To view, visit https://review.coreboot.org/c/coreboot/+/29976 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9766a8dcbcb38420e937c810d252fef071851e92 Gerrit-Change-Number: 29976 Gerrit-PatchSet: 2 Gerrit-Owner: Tristan Corrick <tristan(a)corrick.kiwi> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Tristan Corrick <tristan(a)corrick.kiwi> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-Comment-Date: Sat, 01 Dec 2018 14:56:03 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Nico Huber <nico.h(a)gmx.de> Gerrit-MessageType: comment

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Change in ...coreboot[master]: sb/intel/lynxpoint: Make the finalise handler common
by Tristan Corrick (Code Review) 01 Dec '18

01 Dec '18

Tristan Corrick has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/29975 ) Change subject: sb/intel/lynxpoint: Make the finalise handler common ...................................................................... Patch Set 2: (1 comment) https://review.coreboot.org/#/c/29975/1/src/southbridge/intel/lynxpoint/smi… File src/southbridge/intel/lynxpoint/smihandler.c: https://review.coreboot.org/#/c/29975/1/src/southbridge/intel/lynxpoint/smi… PS1, Line 275: chipset_f > It's rather `chipset_finalized`. Done -- To view, visit https://review.coreboot.org/c/coreboot/+/29975 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I13b581a2219288019a4e0c9e618db3ac7c3c15ab Gerrit-Change-Number: 29975 Gerrit-PatchSet: 2 Gerrit-Owner: Tristan Corrick <tristan(a)corrick.kiwi> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Tristan Corrick <tristan(a)corrick.kiwi> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Sat, 01 Dec 2018 14:53:53 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Nico Huber <nico.h(a)gmx.de> Gerrit-MessageType: comment

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Change in ...coreboot[master]: sb/intel/lynxpoint: Move `HAVE_SMI_HANDLER` to southbridge Kconfig
by Tristan Corrick (Code Review) 01 Dec '18

01 Dec '18

Tristan Corrick has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/29992 Change subject: sb/intel/lynxpoint: Move `HAVE_SMI_HANDLER` to southbridge Kconfig ...................................................................... sb/intel/lynxpoint: Move `HAVE_SMI_HANDLER` to southbridge Kconfig All Lynx Point board select this, and none build without it. Change-Id: I4b59b10ee985cff5a8e1442677d36b0be88cf437 Signed-off-by: Tristan Corrick <tristan(a)corrick.kiwi> --- M src/mainboard/asrock/h81m-hds/Kconfig M src/mainboard/google/beltino/Kconfig M src/mainboard/google/slippy/Kconfig M src/mainboard/intel/baskingridge/Kconfig M src/southbridge/intel/lynxpoint/Kconfig 5 files changed, 1 insertion(+), 4 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/92/29992/1 diff --git a/src/mainboard/asrock/h81m-hds/Kconfig b/src/mainboard/asrock/h81m-hds/Kconfig index 00edd1c..5299c21 100644 --- a/src/mainboard/asrock/h81m-hds/Kconfig +++ b/src/mainboard/asrock/h81m-hds/Kconfig @@ -24,7 +24,6 @@ select HAVE_ACPI_TABLES select HAVE_OPTION_TABLE select HAVE_CMOS_DEFAULT - select HAVE_SMI_HANDLER select INTEL_GMA_HAVE_VBT select INTEL_INT15 select MAINBOARD_HAS_LIBGFXINIT diff --git a/src/mainboard/google/beltino/Kconfig b/src/mainboard/google/beltino/Kconfig index 2f51461..8ebabe0 100644 --- a/src/mainboard/google/beltino/Kconfig +++ b/src/mainboard/google/beltino/Kconfig @@ -9,7 +9,6 @@ select HAVE_ACPI_TABLES select HAVE_OPTION_TABLE select HAVE_ACPI_RESUME - select HAVE_SMI_HANDLER select MAINBOARD_HAS_CHROMEOS select MAINBOARD_HAS_LPC_TPM select MAINBOARD_HAS_TPM1 diff --git a/src/mainboard/google/slippy/Kconfig b/src/mainboard/google/slippy/Kconfig index fe7e5b3..9d206dc 100644 --- a/src/mainboard/google/slippy/Kconfig +++ b/src/mainboard/google/slippy/Kconfig @@ -10,7 +10,6 @@ select HAVE_ACPI_TABLES select HAVE_OPTION_TABLE select HAVE_ACPI_RESUME - select HAVE_SMI_HANDLER select MAINBOARD_HAS_CHROMEOS select MAINBOARD_HAS_LPC_TPM select MAINBOARD_HAS_TPM1 diff --git a/src/mainboard/intel/baskingridge/Kconfig b/src/mainboard/intel/baskingridge/Kconfig index 40c69eb..d5dafa0 100644 --- a/src/mainboard/intel/baskingridge/Kconfig +++ b/src/mainboard/intel/baskingridge/Kconfig @@ -9,7 +9,6 @@ select HAVE_ACPI_TABLES select HAVE_OPTION_TABLE select HAVE_ACPI_RESUME - select HAVE_SMI_HANDLER select MAINBOARD_HAS_CHROMEOS select MAINBOARD_HAS_LPC_TPM select INTEL_INT15 diff --git a/src/southbridge/intel/lynxpoint/Kconfig b/src/southbridge/intel/lynxpoint/Kconfig index b331ba1..e11bcef 100644 --- a/src/southbridge/intel/lynxpoint/Kconfig +++ b/src/southbridge/intel/lynxpoint/Kconfig @@ -27,6 +27,7 @@ select SOUTHBRIDGE_INTEL_COMMON_ACPI_MADT select SOUTHBRIDGE_INTEL_COMMON_FINALIZE select IOAPIC + select HAVE_SMI_HANDLER select HAVE_USBDEBUG_OPTIONS select USE_WATCHDOG_ON_BOOT select PCIEXP_ASPM -- To view, visit https://review.coreboot.org/c/coreboot/+/29992 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4b59b10ee985cff5a8e1442677d36b0be88cf437 Gerrit-Change-Number: 29992 Gerrit-PatchSet: 1 Gerrit-Owner: Tristan Corrick <tristan(a)corrick.kiwi> Gerrit-MessageType: newchange

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Change in ...coreboot[master]: sb/intel/common: Create a common PCH finalise implementation
by Tristan Corrick (Code Review) 01 Dec '18

01 Dec '18

Hello Alexander Couzens, Patrick Rudolph, Arthur Heymans, build bot (Jenkins), Nico Huber, Patrick Georgi, Martin Roth, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/29977 to look at the new patch set (#3). Change subject: sb/intel/common: Create a common PCH finalise implementation ...................................................................... sb/intel/common: Create a common PCH finalise implementation The common finalise code is used by bd82x6x, Lynx Point, and Ibex Peak. Lynx Point now benefits from being able to write-protect the flash chip. For Lynx Point, writing the SPI OPMENU now happens in ramstage, as done in bd82x6x. Tested on an ASRock H81M-HDS (Lynx Point). When write-protection is configured, flashrom reports all flash regions as read-only, and does not manage to alter the contents of the flash chip. Also tested on an ASUS P8H61-M LX (Cougar Point). Everything seems to work as before. Change-Id: I781082b1ed507b00815d1e85aec3e56ae5a4bef2 Signed-off-by: Tristan Corrick <tristan(a)corrick.kiwi> --- M src/mainboard/lenovo/x201/smihandler.c M src/mainboard/packardbell/ms2290/smihandler.c M src/southbridge/intel/bd82x6x/Kconfig M src/southbridge/intel/bd82x6x/Makefile.inc M src/southbridge/intel/bd82x6x/pch.h M src/southbridge/intel/bd82x6x/smihandler.c M src/southbridge/intel/common/Kconfig M src/southbridge/intel/common/Makefile.inc R src/southbridge/intel/common/finalize.c A src/southbridge/intel/common/finalize.h M src/southbridge/intel/common/pmutil.h M src/southbridge/intel/ibexpeak/Kconfig M src/southbridge/intel/ibexpeak/Makefile.inc M src/southbridge/intel/ibexpeak/pch.h M src/southbridge/intel/lynxpoint/Kconfig M src/southbridge/intel/lynxpoint/Makefile.inc D src/southbridge/intel/lynxpoint/finalize.c M src/southbridge/intel/lynxpoint/lpc.c M src/southbridge/intel/lynxpoint/pch.h M src/southbridge/intel/lynxpoint/smihandler.c 20 files changed, 115 insertions(+), 141 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/77/29977/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/29977 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I781082b1ed507b00815d1e85aec3e56ae5a4bef2 Gerrit-Change-Number: 29977 Gerrit-PatchSet: 3 Gerrit-Owner: Tristan Corrick <tristan(a)corrick.kiwi> Gerrit-Reviewer: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Tristan Corrick <tristan(a)corrick.kiwi> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: newpatchset

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Change in ...coreboot[master]: sb/intel/lynxpoint: Ensure the finalise handler is called
by Tristan Corrick (Code Review) 01 Dec '18

01 Dec '18

Hello Patrick Rudolph, build bot (Jenkins), Patrick Georgi, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/29976 to look at the new patch set (#2). Change subject: sb/intel/lynxpoint: Ensure the finalise handler is called ...................................................................... sb/intel/lynxpoint: Ensure the finalise handler is called The finalise handler is not called during S3 resume when using the `BS_PAYLOAD_BOOT` approach. So, adopt the `lpc_final` approach used by bd82x6x and others. Tested on an ASRock H81M-HDS. The finalise handler is now called on the normal boot path, and during S3 resume. Change-Id: I9766a8dcbcb38420e937c810d252fef071851e92 Signed-off-by: Tristan Corrick <tristan(a)corrick.kiwi> --- M src/southbridge/intel/lynxpoint/lpc.c M src/southbridge/intel/lynxpoint/smi.c 2 files changed, 6 insertions(+), 14 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/76/29976/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/29976 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9766a8dcbcb38420e937c810d252fef071851e92 Gerrit-Change-Number: 29976 Gerrit-PatchSet: 2 Gerrit-Owner: Tristan Corrick <tristan(a)corrick.kiwi> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Tristan Corrick <tristan(a)corrick.kiwi> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-MessageType: newpatchset

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Change in ...coreboot[master]: sb/intel/lynxpoint: Make the finalise handler common
by Tristan Corrick (Code Review) 01 Dec '18

01 Dec '18

Hello Patrick Rudolph, build bot (Jenkins), Nico Huber, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/29975 to look at the new patch set (#2). Change subject: sb/intel/lynxpoint: Make the finalise handler common ...................................................................... sb/intel/lynxpoint: Make the finalise handler common The ASRock H81M-HDS doesn't implement a finalise handler. To fix this, and reduce code duplication in the process, make a common implementation. There should be no functional change to boards with existing finalise handlers, since the code is identical among them and the new, common implementation. Tested on an ASRock H81M-HDS. The finalise handler works. Change-Id: I13b581a2219288019a4e0c9e618db3ac7c3c15ab Signed-off-by: Tristan Corrick <tristan(a)corrick.kiwi> --- M src/mainboard/google/beltino/smihandler.c M src/mainboard/google/slippy/smihandler.c M src/mainboard/intel/baskingridge/mainboard_smi.c M src/southbridge/intel/lynxpoint/smihandler.c 4 files changed, 15 insertions(+), 60 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/75/29975/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/29975 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I13b581a2219288019a4e0c9e618db3ac7c3c15ab Gerrit-Change-Number: 29975 Gerrit-PatchSet: 2 Gerrit-Owner: Tristan Corrick <tristan(a)corrick.kiwi> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Tristan Corrick <tristan(a)corrick.kiwi> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: newpatchset

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Change in ...coreboot[master]: sb/intel/common: Create a common PCH finalise implementation
by Nico Huber (Code Review) 01 Dec '18

01 Dec '18

Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/29977 ) Change subject: sb/intel/common: Create a common PCH finalise implementation ...................................................................... Patch Set 2: Code-Review+1 sorry, wrong button... I've compared object files for an Ivy Bridge build, looks good apart from the comments. -- To view, visit https://review.coreboot.org/c/coreboot/+/29977 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I781082b1ed507b00815d1e85aec3e56ae5a4bef2 Gerrit-Change-Number: 29977 Gerrit-PatchSet: 2 Gerrit-Owner: Tristan Corrick <tristan(a)corrick.kiwi> Gerrit-Reviewer: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Tristan Corrick <tristan(a)corrick.kiwi> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Sat, 01 Dec 2018 14:50:37 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in ...coreboot[master]: sb/intel/common: Create a common PCH finalise implementation
by Nico Huber (Code Review) 01 Dec '18

01 Dec '18

Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/29977 ) Change subject: sb/intel/common: Create a common PCH finalise implementation ...................................................................... Patch Set 2: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/29977 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I781082b1ed507b00815d1e85aec3e56ae5a4bef2 Gerrit-Change-Number: 29977 Gerrit-PatchSet: 2 Gerrit-Owner: Tristan Corrick <tristan(a)corrick.kiwi> Gerrit-Reviewer: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Tristan Corrick <tristan(a)corrick.kiwi> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Sat, 01 Dec 2018 14:49:47 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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coreboot-gerrit December 2018