Hello HAOUAS Elyes, Philipp Deppenwiese,
I'd like you to do a code review. Please visit
https://review.coreboot.org/c/coreboot/+/30029
to review the following change.
Change subject: libpayload: Remove purin/cygnus
......................................................................
libpayload: Remove purin/cygnus
The Purin mainboard and Cygnus SoC have been removed from coreboot, so
also remove the corresponding libpayload Kconfigs.
Change-Id: I589ca7f1a3b479f1c2b1b668a175a71583441ac9
Signed-off-by: Julius Werner <jwerner(a)chromium.org>
---
D payloads/libpayload/configs/config.purin
M payloads/libpayload/drivers/timer/Kconfig
2 files changed, 0 insertions(+), 17 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/29/30029/1
diff --git a/payloads/libpayload/configs/config.purin b/payloads/libpayload/configs/config.purin
deleted file mode 100644
index afcc199..0000000
--- a/payloads/libpayload/configs/config.purin
+++ /dev/null
@@ -1,11 +0,0 @@
-CONFIG_LP_GPL=y
-CONFIG_LP_ARCH_ARM=y
-# CONFIG_LP_CURSES is not set
-CONFIG_LP_SKIP_CONSOLE_INIT=y
-# CONFIG_LP_VIDEO_CONSOLE is not set
-# CONFIG_LP_STORAGE is not set
-CONFIG_LP_TIMER_CYGNUS=y
-CONFIG_LP_USB=y
-# CONFIG_LP_USB_HID is not set
-# CONFIG_LP_USB_HUB is not set
-# CONFIG_LP_USB_MSC is not set
diff --git a/payloads/libpayload/drivers/timer/Kconfig b/payloads/libpayload/drivers/timer/Kconfig
index 54cbe4a..d0d3494 100644
--- a/payloads/libpayload/drivers/timer/Kconfig
+++ b/payloads/libpayload/drivers/timer/Kconfig
@@ -56,9 +56,6 @@
config TIMER_RK3399
bool "Timer for Rockchip RK3399"
-config TIMER_CYGNUS
- bool "Timer for Cygnus"
-
config TIMER_IMG_PISTACHIO
bool "Timer for IMG Pistachio"
@@ -92,7 +89,6 @@
config TIMER_GENERIC_HZ
int "Generic Timer Frequency"
- default 500000000 if TIMER_CYGNUS
default 48000000 if TIMER_IPQ40XX
default 6250000 if TIMER_IPQ806X
default 24000000 if TIMER_MCT
@@ -107,7 +103,6 @@
config TIMER_GENERIC_REG
hex "Generic Timer Register Address"
- default 0x19020200 if TIMER_CYGNUS
default 0x004A2000 if TIMER_IPQ40XX
default 0x0200A028 if TIMER_IPQ806X
default 0x101C0100 if TIMER_MCT
@@ -121,7 +116,6 @@
config TIMER_GENERIC_HIGH_REG
hex "Generic Timer High Register Address"
- default 0x19020204 if TIMER_CYGNUS
default 0x004A2004 if TIMER_IPQ40XX
default 0x101C0104 if TIMER_MCT
default 0xff81002C if TIMER_RK3288
--
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I589ca7f1a3b479f1c2b1b668a175a71583441ac9
Gerrit-Change-Number: 30029
Gerrit-PatchSet: 1
Gerrit-Owner: Julius Werner <jwerner(a)chromium.org>
Gerrit-Reviewer: HAOUAS Elyes <ehaouas(a)noos.fr>
Gerrit-Reviewer: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com>
Gerrit-MessageType: newchange
Michael Bacarella has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/30028
Change subject: Documentation/flash_tutorial/index.md: warn about dots painted on ICs
......................................................................
Documentation/flash_tutorial/index.md: warn about dots painted on ICs
I fried my mainboard because I tried to orient my chip by lining a blue dot on
the corner of my chip with a dot depicted on the chip datasheet. They
apparently have nothing to do with each other, and this is normal. Add
warning about this to the docs to hopefully spare others from a similar fate.
Signed-off-by: Michael Bacarella <michael.bacarella(a)gmail.com>
Change-Id: Ib634589aaa11f75bde2ef2e13d2cacc4cae19a3f
---
M Documentation/flash_tutorial/index.md
1 file changed, 2 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/28/30028/1
diff --git a/Documentation/flash_tutorial/index.md b/Documentation/flash_tutorial/index.md
index eb74ad0..342f55b 100644
--- a/Documentation/flash_tutorial/index.md
+++ b/Documentation/flash_tutorial/index.md
@@ -63,6 +63,8 @@
**WARNING:** Using the wrong method or accidentally using the wrong pinout might
permanently damage your hardware!
+**WARNING:** Do not rely on any dots painted on flash ICs to orient the pins! Although you may find dots on data sheet diagrams, they often do not correspond to dots painted on the flash IC.
+
## Using a layout file
On platforms where the flash IC is shared with other components you might want
to write only a part of the flash IC. On Intel for example there are IFD, ME and
--
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: Ib634589aaa11f75bde2ef2e13d2cacc4cae19a3f
Gerrit-Change-Number: 30028
Gerrit-PatchSet: 1
Gerrit-Owner: Michael Bacarella <michael.bacarella(a)gmail.com>
Gerrit-MessageType: newchange
Michael Bacarella has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/30027
Change subject: Documentation/mainboard/lenovo/t420.md: add pic of chip
......................................................................
Documentation/mainboard/lenovo/t420.md: add pic of chip
Provide pic of the flash IC with pinouts labeled, as well
as additional text about the chip.
Signed-off-by: Michael Bacarella <michael.bacarella(a)gmail.com>
Change-Id: I9046fa63dcd4d192836417efac68ca7587ac1c91
---
M Documentation/mainboard/lenovo/t420.md
A Documentation/mainboard/lenovo/t420_chip_location.png
2 files changed, 11 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/27/30027/1
diff --git a/Documentation/mainboard/lenovo/t420.md b/Documentation/mainboard/lenovo/t420.md
index ff7a0a9..9516a4c 100644
--- a/Documentation/mainboard/lenovo/t420.md
+++ b/Documentation/mainboard/lenovo/t420.md
@@ -1,8 +1,17 @@
# Lenovo T420
## Flashing instructions
-You have to disassemble the whole device, as the flash IC is on the bottom
-of the mainboard.
+The flash IC is located at the bottom center of the mainboard. Sadly,
+access to the IC is blocked by the magnesum frame, so you need to disassemble
+the entire laptop and remove the mainboard.
+
+Below is a picture of IC on the mainboard, with the pinouts labeled.
+
+[t420_chip_location]: t420_chip_location.png
+
+The chip will either be a Macronix MX25L6404E (shown above) or a Winbond
+W25Q64CVSIG. Do not rely on dots painted in the corner of the chip (such as
+the blue dot pictured) to orient the pins!
For more details have a look at [T420 / T520 / X220 / T420s / W520 common] and
diff --git a/Documentation/mainboard/lenovo/t420_chip_location.png b/Documentation/mainboard/lenovo/t420_chip_location.png
new file mode 100644
index 0000000..b9172ac
--- /dev/null
+++ b/Documentation/mainboard/lenovo/t420_chip_location.png
Binary files differ
--
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I9046fa63dcd4d192836417efac68ca7587ac1c91
Gerrit-Change-Number: 30027
Gerrit-PatchSet: 1
Gerrit-Owner: Michael Bacarella <michael.bacarella(a)gmail.com>
Gerrit-MessageType: newchange
Hello Patrick Rudolph, David Guckian, Vanessa Eusebio, build bot (Jenkins), David Guckian,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/30004
to look at the new patch set (#5).
Change subject: src: Don't use device_t
......................................................................
src: Don't use device_t
Use of device_t is deprecated.
Change-Id: Ic29891d78514db3b7eed48414a14e4ff579436c0
Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr>
---
M src/include/device/pci_ops.h
M src/include/device/smbus.h
M src/soc/amd/stoneyridge/include/soc/southbridge.h
M src/soc/amd/stoneyridge/southbridge.c
M src/soc/intel/common/block/pcr/pcr.c
M src/soc/intel/denverton_ns/include/soc/soc_util.h
M src/soc/intel/denverton_ns/soc_util.c
M src/southbridge/amd/sr5650/cmn.h
M src/southbridge/intel/lynxpoint/pch.c
9 files changed, 333 insertions(+), 75 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/04/30004/5
--
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Gerrit-Change-Id: Ic29891d78514db3b7eed48414a14e4ff579436c0
Gerrit-Change-Number: 30004
Gerrit-PatchSet: 5
Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr>
Gerrit-Reviewer: David Guckian
Gerrit-Reviewer: David Guckian <david.guckian(a)intel.com>
Gerrit-Reviewer: HAOUAS Elyes <ehaouas(a)noos.fr>
Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org>
Gerrit-Reviewer: Vanessa Eusebio <vanessa.f.eusebio(a)intel.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-MessageType: newpatchset