coreboot-gerrit December 2018

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Change in ...coreboot[master]: src: Remove useless include <device/pci_ids.h>
by HAOUAS Elyes (Code Review) 09 Dec '18

09 Dec '18

HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/30120 Change subject: src: Remove useless include <device/pci_ids.h> ...................................................................... src: Remove useless include <device/pci_ids.h> Change-Id: Ia640131479d4221ccd84613033f28de3932b8bff Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/cpu/amd/family_10h-family_15h/monotonic_timer.c M src/cpu/amd/family_10h-family_15h/powernow_acpi.c M src/device/azalia_device.c M src/device/oprom/realmode/x86_interrupts.c M src/device/pci_ops.c M src/device/pci_ops_mmconf.c M src/device/pcix_device.c M src/drivers/aspeed/common/aspeed_coreboot.h M src/drivers/sil/3114/sil_sata.c M src/drivers/xgi/common/xgi_coreboot.h M src/mainboard/adi/rcc-dff/acpi_tables.c M src/mainboard/advansus/a785e-i/acpi_tables.c M src/mainboard/advansus/a785e-i/get_bus_conf.c M src/mainboard/advansus/a785e-i/romstage.c M src/mainboard/amd/bettong/acpi_tables.c M src/mainboard/amd/bimini_fam10/acpi_tables.c M src/mainboard/amd/bimini_fam10/get_bus_conf.c M src/mainboard/amd/bimini_fam10/romstage.c M src/mainboard/amd/db-ft3b-lc/acpi_tables.c M src/mainboard/amd/db-ft3b-lc/romstage.c M src/mainboard/amd/inagua/acpi_tables.c M src/mainboard/amd/lamar/acpi_tables.c M src/mainboard/amd/lamar/romstage.c M src/mainboard/amd/mahogany_fam10/acpi_tables.c M src/mainboard/amd/mahogany_fam10/get_bus_conf.c M src/mainboard/amd/mahogany_fam10/romstage.c M src/mainboard/amd/olivehill/acpi_tables.c M src/mainboard/amd/olivehill/romstage.c M src/mainboard/amd/olivehillplus/acpi_tables.c M src/mainboard/amd/olivehillplus/romstage.c M src/mainboard/amd/parmer/acpi_tables.c M src/mainboard/amd/persimmon/acpi_tables.c M src/mainboard/amd/serengeti_cheetah_fam10/acpi_tables.c M src/mainboard/amd/serengeti_cheetah_fam10/get_bus_conf.c M src/mainboard/amd/serengeti_cheetah_fam10/romstage.c M src/mainboard/amd/south_station/acpi_tables.c M src/mainboard/amd/thatcher/acpi_tables.c M src/mainboard/amd/thatcher/romstage.c M src/mainboard/amd/tilapia_fam10/acpi_tables.c M src/mainboard/amd/tilapia_fam10/get_bus_conf.c M src/mainboard/amd/tilapia_fam10/romstage.c M src/mainboard/amd/torpedo/acpi_tables.c M src/mainboard/amd/union_station/acpi_tables.c M src/mainboard/aopen/dxplplusu/acpi_tables.c M src/mainboard/apple/macbook21/mainboard.c M src/mainboard/asrock/e350m1/acpi_tables.c M src/mainboard/asrock/imb-a180/acpi_tables.c M src/mainboard/asrock/imb-a180/romstage.c M src/mainboard/asus/am1i-a/acpi_tables.c M src/mainboard/asus/f2a85-m/acpi_tables.c M src/mainboard/asus/kcma-d8/acpi_tables.c M src/mainboard/asus/kcma-d8/get_bus_conf.c M src/mainboard/asus/kcma-d8/romstage.c M src/mainboard/asus/kfsn4-dre/acpi_tables.c M src/mainboard/asus/kfsn4-dre/get_bus_conf.c M src/mainboard/asus/kgpe-d16/acpi_tables.c M src/mainboard/asus/kgpe-d16/get_bus_conf.c M src/mainboard/asus/kgpe-d16/romstage.c M src/mainboard/asus/m4a78-em/acpi_tables.c M src/mainboard/asus/m4a78-em/get_bus_conf.c M src/mainboard/asus/m4a78-em/romstage.c M src/mainboard/asus/m4a785-m/acpi_tables.c M src/mainboard/asus/m4a785-m/get_bus_conf.c M src/mainboard/asus/m4a785-m/romstage.c M src/mainboard/asus/m5a88-v/acpi_tables.c M src/mainboard/asus/m5a88-v/get_bus_conf.c M src/mainboard/asus/m5a88-v/romstage.c M src/mainboard/avalue/eax-785e/acpi_tables.c M src/mainboard/avalue/eax-785e/get_bus_conf.c M src/mainboard/avalue/eax-785e/romstage.c M src/mainboard/bap/ode_e20XX/acpi_tables.c M src/mainboard/bap/ode_e21XX/acpi_tables.c M src/mainboard/bap/ode_e21XX/romstage.c M src/mainboard/biostar/a68n_5200/acpi_tables.c M src/mainboard/biostar/a68n_5200/romstage.c M src/mainboard/biostar/am1ml/acpi_tables.c M src/mainboard/elmex/pcm205400/acpi_tables.c M src/mainboard/emulation/qemu-q35/acpi_tables.c M src/mainboard/emulation/qemu-q35/mainboard.c M src/mainboard/esd/atom15/acpi_tables.c M src/mainboard/getac/p470/acpi_tables.c M src/mainboard/gigabyte/ma785gm/acpi_tables.c M src/mainboard/gigabyte/ma785gm/get_bus_conf.c M src/mainboard/gigabyte/ma785gm/romstage.c M src/mainboard/gigabyte/ma785gmt/acpi_tables.c M src/mainboard/gigabyte/ma785gmt/get_bus_conf.c M src/mainboard/gigabyte/ma785gmt/romstage.c M src/mainboard/gigabyte/ma78gm/acpi_tables.c M src/mainboard/gigabyte/ma78gm/get_bus_conf.c M src/mainboard/gigabyte/ma78gm/romstage.c M src/mainboard/gizmosphere/gizmo/acpi_tables.c M src/mainboard/gizmosphere/gizmo2/acpi_tables.c M src/mainboard/google/beltino/acpi_tables.c M src/mainboard/google/jecht/acpi_tables.c M src/mainboard/google/parrot/acpi_tables.c M src/mainboard/google/rambi/acpi_tables.c M src/mainboard/google/slippy/acpi_tables.c M src/mainboard/google/stout/acpi_tables.c M src/mainboard/hp/abm/acpi_tables.c M src/mainboard/hp/dl165_g6_fam10/get_bus_conf.c M src/mainboard/hp/dl165_g6_fam10/romstage.c M src/mainboard/hp/pavilion_m6_1035dx/acpi_tables.c M src/mainboard/iei/kino-780am2-fam10/acpi_tables.c M src/mainboard/iei/kino-780am2-fam10/get_bus_conf.c M src/mainboard/iei/kino-780am2-fam10/romstage.c M src/mainboard/intel/baskingridge/acpi_tables.c M src/mainboard/intel/bayleybay_fsp/acpi_tables.c M src/mainboard/intel/emeraldlake2/acpi_tables.c M src/mainboard/intel/harcuvar/acpi_tables.c M src/mainboard/intel/littleplains/acpi_tables.c M src/mainboard/intel/minnowmax/acpi_tables.c M src/mainboard/intel/mohonpeak/acpi_tables.c M src/mainboard/intel/strago/acpi_tables.c M src/mainboard/intel/wtm2/acpi_tables.c M src/mainboard/jetway/nf81-t56n-lf/acpi_tables.c M src/mainboard/jetway/pa78vm5/acpi_tables.c M src/mainboard/jetway/pa78vm5/get_bus_conf.c M src/mainboard/jetway/pa78vm5/romstage.c M src/mainboard/lenovo/g505s/acpi_tables.c M src/mainboard/lenovo/t400/acpi_tables.c M src/mainboard/lenovo/x200/acpi_tables.c M src/mainboard/lippert/frontrunner-af/acpi_tables.c M src/mainboard/lippert/toucan-af/acpi_tables.c M src/mainboard/msi/ms7721/acpi_tables.c M src/mainboard/msi/ms9652_fam10/acpi_tables.c M src/mainboard/msi/ms9652_fam10/get_bus_conf.c M src/mainboard/packardbell/ms2290/mainboard.c M src/mainboard/pcengines/apu1/acpi_tables.c M src/mainboard/pcengines/apu2/acpi_tables.c M src/mainboard/pcengines/apu2/romstage.c M src/mainboard/roda/rk9/acpi_tables.c M src/mainboard/samsung/lumpy/acpi_tables.c M src/mainboard/samsung/stumpy/acpi_tables.c M src/mainboard/scaleway/tagada/acpi_tables.c M src/mainboard/siemens/mc_tcu3/acpi_tables.c M src/mainboard/supermicro/h8dmr_fam10/get_bus_conf.c M src/mainboard/supermicro/h8qme_fam10/get_bus_conf.c M src/mainboard/supermicro/h8scm_fam10/acpi_tables.c M src/mainboard/supermicro/h8scm_fam10/get_bus_conf.c M src/mainboard/supermicro/h8scm_fam10/romstage.c M src/mainboard/tyan/s2912_fam10/get_bus_conf.c M src/mainboard/tyan/s2912_fam10/romstage.c M src/mainboard/via/epia-m850/romstage.c M src/northbridge/amd/amdfam10/get_pci1234.c M src/northbridge/amd/amdht/comlib.c M src/northbridge/amd/amdht/h3finit.c M src/northbridge/amd/amdht/h3ncmn.c M src/northbridge/amd/lx/northbridgeinit.c M src/northbridge/intel/gm45/acpi.c M src/northbridge/intel/gm45/northbridge.c M src/northbridge/intel/haswell/acpi.c M src/northbridge/intel/i945/acpi.c M src/northbridge/intel/nehalem/acpi.c M src/northbridge/intel/pineview/northbridge.c M src/northbridge/intel/sandybridge/acpi.c M src/northbridge/intel/sandybridge/common.c M src/northbridge/intel/x4x/acpi.c M src/northbridge/intel/x4x/northbridge.c M src/soc/amd/stoneyridge/include/soc/southbridge.h M src/soc/intel/apollolake/lpc.c M src/soc/intel/baytrail/scc.c M src/soc/intel/baytrail/spi.c M src/soc/intel/braswell/acpi.c M src/soc/intel/braswell/scc.c M src/soc/intel/braswell/spi.c M src/soc/intel/broadwell/me_status.c M src/soc/intel/broadwell/romstage/smbus.c M src/soc/intel/broadwell/romstage/spi.c M src/soc/intel/broadwell/smbus_common.c M src/soc/intel/broadwell/spi.c M src/soc/intel/cannonlake/bootblock/pch.c M src/soc/intel/cannonlake/lpc.c M src/soc/intel/fsp_baytrail/acpi.c M src/soc/intel/fsp_baytrail/include/soc/i2c.h M src/soc/intel/fsp_baytrail/spi.c M src/soc/intel/fsp_broadwell_de/smbus_common.c M src/soc/intel/icelake/bootblock/pch.c M src/soc/intel/icelake/lpc.c M src/soc/intel/quark/i2c.c M src/soc/intel/quark/romstage/pcie.c M src/soc/intel/skylake/lpc.c M src/soc/intel/skylake/me.c M src/southbridge/amd/agesa/hudson/bootblock.c M src/southbridge/amd/agesa/hudson/hudson.h M src/southbridge/amd/pi/hudson/hudson.h M src/southbridge/amd/rs780/cmn.c M src/southbridge/amd/rs780/pcie.c M src/southbridge/amd/rs780/rs780.c M src/southbridge/amd/rs780/rs780.h M src/southbridge/amd/sb700/bootblock.c M src/southbridge/amd/sb700/sb700.h M src/southbridge/amd/sb800/bootblock.c M src/southbridge/amd/sb800/sb800.h M src/southbridge/amd/sr5650/pcie.c M src/southbridge/amd/sr5650/sr5650.h M src/southbridge/intel/bd82x6x/early_me.c M src/southbridge/intel/bd82x6x/early_me_mrc.c M src/southbridge/intel/bd82x6x/early_smbus.c M src/southbridge/intel/bd82x6x/early_spi.c M src/southbridge/intel/bd82x6x/early_usb.c M src/southbridge/intel/bd82x6x/early_usb_mrc.c M src/southbridge/intel/common/spi.c M src/southbridge/intel/fsp_rangeley/early_smbus.c M src/southbridge/intel/fsp_rangeley/early_spi.c M src/southbridge/intel/fsp_rangeley/early_usb.c M src/southbridge/intel/i82371eb/acpi_tables.c M src/southbridge/intel/i82801dx/i82801dx.c M src/southbridge/intel/i82801gx/early_smbus.c M src/southbridge/intel/i82801ix/early_smbus.c M src/southbridge/intel/i82801jx/early_smbus.c M src/southbridge/intel/ibexpeak/early_smbus.c M src/southbridge/intel/ibexpeak/madt.c M src/southbridge/intel/lynxpoint/early_me.c M src/southbridge/intel/lynxpoint/early_smbus.c M src/southbridge/intel/lynxpoint/early_spi.c M src/southbridge/intel/lynxpoint/early_usb.c M src/southbridge/ti/pci7420/cardbus.c M src/southbridge/ti/pci7420/firewire.c M src/southbridge/ti/pcixx12/pcixx12.c 219 files changed, 0 insertions(+), 219 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/20/30120/1 diff --git a/src/cpu/amd/family_10h-family_15h/monotonic_timer.c b/src/cpu/amd/family_10h-family_15h/monotonic_timer.c index b1886ea..aff1cee 100644 --- a/src/cpu/amd/family_10h-family_15h/monotonic_timer.c +++ b/src/cpu/amd/family_10h-family_15h/monotonic_timer.c @@ -19,7 +19,6 @@ #include <cpu/amd/msr.h> #include <timer.h> #include <device/pci.h> -#include <device/pci_ids.h> #include <northbridge/amd/amdht/AsPsDefs.h> static struct monotonic_counter { diff --git a/src/cpu/amd/family_10h-family_15h/powernow_acpi.c b/src/cpu/amd/family_10h-family_15h/powernow_acpi.c index d228858..535b772 100644 --- a/src/cpu/amd/family_10h-family_15h/powernow_acpi.c +++ b/src/cpu/amd/family_10h-family_15h/powernow_acpi.c @@ -23,7 +23,6 @@ #include <arch/acpigen.h> #include <cpu/amd/powernow.h> #include <device/pci.h> -#include <device/pci_ids.h> #include <cpu/amd/mtrr.h> #include <cpu/amd/amdfam10_sysconf.h> #include <arch/cpu.h> diff --git a/src/device/azalia_device.c b/src/device/azalia_device.c index 5c2fcfc..364eec1 100644 --- a/src/device/azalia_device.c +++ b/src/device/azalia_device.c @@ -16,7 +16,6 @@ #include <console/console.h> #include <device/device.h> #include <device/pci.h> -#include <device/pci_ids.h> #include <device/pci_ops.h> #include <device/azalia_device.h> #include <arch/io.h> diff --git a/src/device/oprom/realmode/x86_interrupts.c b/src/device/oprom/realmode/x86_interrupts.c index 7ec77f8..e70b25d 100644 --- a/src/device/oprom/realmode/x86_interrupts.c +++ b/src/device/oprom/realmode/x86_interrupts.c @@ -19,7 +19,6 @@ #include <arch/registers.h> #include <console/console.h> #include <device/pci.h> -#include <device/pci_ids.h> #include <device/pci_ops.h> #include <string.h> diff --git a/src/device/pci_ops.c b/src/device/pci_ops.c index 202a9cd..82c22a7 100644 --- a/src/device/pci_ops.c +++ b/src/device/pci_ops.c @@ -17,7 +17,6 @@ #include <console/console.h> #include <device/pci.h> -#include <device/pci_ids.h> #include <device/pci_ops.h> static const struct pci_bus_operations *pci_bus_ops(struct bus *bus, struct device *dev) diff --git a/src/device/pci_ops_mmconf.c b/src/device/pci_ops_mmconf.c index abbab3f..04f3d23 100644 --- a/src/device/pci_ops_mmconf.c +++ b/src/device/pci_ops_mmconf.c @@ -13,7 +13,6 @@ #include <arch/io.h> #include <device/pci.h> -#include <device/pci_ids.h> #include <device/pci_ops.h> #if !defined(CONFIG_MMCONF_BASE_ADDRESS) || !CONFIG_MMCONF_BASE_ADDRESS diff --git a/src/device/pcix_device.c b/src/device/pcix_device.c index 31b74e5..1204660 100644 --- a/src/device/pcix_device.c +++ b/src/device/pcix_device.c @@ -17,7 +17,6 @@ #include <console/console.h> #include <device/device.h> #include <device/pci.h> -#include <device/pci_ids.h> #include <device/pcix.h> static void pcix_tune_dev(struct device *dev) diff --git a/src/drivers/aspeed/common/aspeed_coreboot.h b/src/drivers/aspeed/common/aspeed_coreboot.h index b974840..4798ec2 100644 --- a/src/drivers/aspeed/common/aspeed_coreboot.h +++ b/src/drivers/aspeed/common/aspeed_coreboot.h @@ -26,7 +26,6 @@ #include <console/console.h> #include <device/device.h> #include <device/pci.h> -#include <device/pci_ids.h> #include <device/pci_ops.h> /* coreboot <--> kernel code interface */ diff --git a/src/drivers/sil/3114/sil_sata.c b/src/drivers/sil/3114/sil_sata.c index 3c56266..95499a7 100644 --- a/src/drivers/sil/3114/sil_sata.c +++ b/src/drivers/sil/3114/sil_sata.c @@ -22,7 +22,6 @@ #include <console/console.h> #include <device/device.h> #include <device/pci.h> -#include <device/pci_ids.h> #include <device/pci_ops.h> static void si_sata_init(struct device *dev) diff --git a/src/drivers/xgi/common/xgi_coreboot.h b/src/drivers/xgi/common/xgi_coreboot.h index b9332e8..6c0fd6c 100644 --- a/src/drivers/xgi/common/xgi_coreboot.h +++ b/src/drivers/xgi/common/xgi_coreboot.h @@ -28,7 +28,6 @@ #include <console/console.h> #include <device/device.h> #include <device/pci.h> -#include <device/pci_ids.h> #include <device/pci_ops.h> #include "initdef.h" diff --git a/src/mainboard/adi/rcc-dff/acpi_tables.c b/src/mainboard/adi/rcc-dff/acpi_tables.c index 00a0b74..bc5f953 100644 --- a/src/mainboard/adi/rcc-dff/acpi_tables.c +++ b/src/mainboard/adi/rcc-dff/acpi_tables.c @@ -22,7 +22,6 @@ #include <arch/smp/mpspec.h> #include <device/device.h> #include <device/pci.h> -#include <device/pci_ids.h> #include <southbridge/intel/fsp_rangeley/nvs.h> #include <northbridge/intel/fsp_rangeley/northbridge.h> diff --git a/src/mainboard/advansus/a785e-i/acpi_tables.c b/src/mainboard/advansus/a785e-i/acpi_tables.c index 0cf4300..d7b6fef 100644 --- a/src/mainboard/advansus/a785e-i/acpi_tables.c +++ b/src/mainboard/advansus/a785e-i/acpi_tables.c @@ -17,7 +17,6 @@ #include <arch/acpi.h> #include <arch/ioapic.h> #include <device/pci.h> -#include <device/pci_ids.h> #include <cpu/amd/amdfam10_sysconf.h> #include "mb_sysconf.h" diff --git a/src/mainboard/advansus/a785e-i/get_bus_conf.c b/src/mainboard/advansus/a785e-i/get_bus_conf.c index 82c7df0..c390977 100644 --- a/src/mainboard/advansus/a785e-i/get_bus_conf.c +++ b/src/mainboard/advansus/a785e-i/get_bus_conf.c @@ -14,7 +14,6 @@ */ #include <device/pci.h> -#include <device/pci_ids.h> #include <string.h> #include <stdint.h> #include <stdlib.h> diff --git a/src/mainboard/advansus/a785e-i/romstage.c b/src/mainboard/advansus/a785e-i/romstage.c index e8e2ec7..c63c2fe 100644 --- a/src/mainboard/advansus/a785e-i/romstage.c +++ b/src/mainboard/advansus/a785e-i/romstage.c @@ -21,7 +21,6 @@ #include <stdint.h> #include <string.h> #include <device/pci_def.h> -#include <device/pci_ids.h> #include <arch/io.h> #include <device/pnp_def.h> #include <cpu/x86/lapic.h> diff --git a/src/mainboard/amd/bettong/acpi_tables.c b/src/mainboard/amd/bettong/acpi_tables.c index 9f1eb46..676318d 100644 --- a/src/mainboard/amd/bettong/acpi_tables.c +++ b/src/mainboard/amd/bettong/acpi_tables.c @@ -18,7 +18,6 @@ #include <arch/acpigen.h> #include <arch/ioapic.h> #include <device/pci.h> -#include <device/pci_ids.h> #define IO_APIC2_ADDR 0xFEC20000 diff --git a/src/mainboard/amd/bimini_fam10/acpi_tables.c b/src/mainboard/amd/bimini_fam10/acpi_tables.c index ca18f06..a140e28 100644 --- a/src/mainboard/amd/bimini_fam10/acpi_tables.c +++ b/src/mainboard/amd/bimini_fam10/acpi_tables.c @@ -17,7 +17,6 @@ #include <arch/acpi.h> #include <arch/ioapic.h> #include <device/pci.h> -#include <device/pci_ids.h> #include <cpu/amd/amdfam10_sysconf.h> #include "mb_sysconf.h" diff --git a/src/mainboard/amd/bimini_fam10/get_bus_conf.c b/src/mainboard/amd/bimini_fam10/get_bus_conf.c index d38d37c..8ad6730 100644 --- a/src/mainboard/amd/bimini_fam10/get_bus_conf.c +++ b/src/mainboard/amd/bimini_fam10/get_bus_conf.c @@ -14,7 +14,6 @@ */ #include <device/pci.h> -#include <device/pci_ids.h> #include <string.h> #include <stdint.h> #include <stdlib.h> diff --git a/src/mainboard/amd/bimini_fam10/romstage.c b/src/mainboard/amd/bimini_fam10/romstage.c index 9d05096..6c40f6e 100644 --- a/src/mainboard/amd/bimini_fam10/romstage.c +++ b/src/mainboard/amd/bimini_fam10/romstage.c @@ -22,7 +22,6 @@ #include <stdint.h> #include <string.h> #include <device/pci_def.h> -#include <device/pci_ids.h> #include <arch/io.h> #include <arch/cpu.h> #include <device/pnp_def.h> diff --git a/src/mainboard/amd/db-ft3b-lc/acpi_tables.c b/src/mainboard/amd/db-ft3b-lc/acpi_tables.c index ade8dd6..6188cd2 100644 --- a/src/mainboard/amd/db-ft3b-lc/acpi_tables.c +++ b/src/mainboard/amd/db-ft3b-lc/acpi_tables.c @@ -18,7 +18,6 @@ #include <arch/acpigen.h> #include <arch/ioapic.h> #include <device/pci.h> -#include <device/pci_ids.h> unsigned long acpi_fill_madt(unsigned long current) { diff --git a/src/mainboard/amd/db-ft3b-lc/romstage.c b/src/mainboard/amd/db-ft3b-lc/romstage.c index 4aceeea..712ba67 100644 --- a/src/mainboard/amd/db-ft3b-lc/romstage.c +++ b/src/mainboard/amd/db-ft3b-lc/romstage.c @@ -16,7 +16,6 @@ #include <stdint.h> #include <string.h> #include <device/pci_def.h> -#include <device/pci_ids.h> #include <arch/io.h> #include <arch/stages.h> #include <device/pnp_def.h> diff --git a/src/mainboard/amd/inagua/acpi_tables.c b/src/mainboard/amd/inagua/acpi_tables.c index 567c108..74be72f 100644 --- a/src/mainboard/amd/inagua/acpi_tables.c +++ b/src/mainboard/amd/inagua/acpi_tables.c @@ -18,7 +18,6 @@ #include <arch/acpigen.h> #include <arch/ioapic.h> #include <device/pci.h> -#include <device/pci_ids.h> unsigned long acpi_fill_madt(unsigned long current) { diff --git a/src/mainboard/amd/lamar/acpi_tables.c b/src/mainboard/amd/lamar/acpi_tables.c index 6466156..cfae02e 100644 --- a/src/mainboard/amd/lamar/acpi_tables.c +++ b/src/mainboard/amd/lamar/acpi_tables.c @@ -18,7 +18,6 @@ #include <arch/acpigen.h> #include <arch/ioapic.h> #include <device/pci.h> -#include <device/pci_ids.h> unsigned long acpi_fill_madt(unsigned long current) { diff --git a/src/mainboard/amd/lamar/romstage.c b/src/mainboard/amd/lamar/romstage.c index 7f811c5..4a99834 100644 --- a/src/mainboard/amd/lamar/romstage.c +++ b/src/mainboard/amd/lamar/romstage.c @@ -16,7 +16,6 @@ #include <stdint.h> #include <string.h> #include <device/pci_def.h> -#include <device/pci_ids.h> #include <arch/io.h> #include <arch/stages.h> #include <device/pnp_def.h> diff --git a/src/mainboard/amd/mahogany_fam10/acpi_tables.c b/src/mainboard/amd/mahogany_fam10/acpi_tables.c index 33234eb..3cba4e81 100644 --- a/src/mainboard/amd/mahogany_fam10/acpi_tables.c +++ b/src/mainboard/amd/mahogany_fam10/acpi_tables.c @@ -18,7 +18,6 @@ #include <arch/acpigen.h> #include <arch/ioapic.h> #include <device/pci.h> -#include <device/pci_ids.h> #include <cpu/amd/amdfam10_sysconf.h> #include "mb_sysconf.h" diff --git a/src/mainboard/amd/mahogany_fam10/get_bus_conf.c b/src/mainboard/amd/mahogany_fam10/get_bus_conf.c index 09aead7..eca0ba7 100644 --- a/src/mainboard/amd/mahogany_fam10/get_bus_conf.c +++ b/src/mainboard/amd/mahogany_fam10/get_bus_conf.c @@ -14,7 +14,6 @@ */ #include <device/pci.h> -#include <device/pci_ids.h> #include <string.h> #include <stdint.h> #include <stdlib.h> diff --git a/src/mainboard/amd/mahogany_fam10/romstage.c b/src/mainboard/amd/mahogany_fam10/romstage.c index 39ff7a0..ef7afde 100644 --- a/src/mainboard/amd/mahogany_fam10/romstage.c +++ b/src/mainboard/amd/mahogany_fam10/romstage.c @@ -24,7 +24,6 @@ #include <stdint.h> #include <string.h> #include <device/pci_def.h> -#include <device/pci_ids.h> #include <arch/io.h> #include <arch/cpu.h> #include <device/pnp_def.h> diff --git a/src/mainboard/amd/olivehill/acpi_tables.c b/src/mainboard/amd/olivehill/acpi_tables.c index d56a243..84ad76e 100644 --- a/src/mainboard/amd/olivehill/acpi_tables.c +++ b/src/mainboard/amd/olivehill/acpi_tables.c @@ -18,7 +18,6 @@ #include <arch/acpigen.h> #include <arch/ioapic.h> #include <device/pci.h> -#include <device/pci_ids.h> unsigned long acpi_fill_madt(unsigned long current) diff --git a/src/mainboard/amd/olivehill/romstage.c b/src/mainboard/amd/olivehill/romstage.c index 35ca4b1..fc55660 100644 --- a/src/mainboard/amd/olivehill/romstage.c +++ b/src/mainboard/amd/olivehill/romstage.c @@ -16,7 +16,6 @@ #include <stdint.h> #include <string.h> #include <device/pci_def.h> -#include <device/pci_ids.h> #include <arch/io.h> #include <arch/stages.h> #include <device/pnp_def.h> diff --git a/src/mainboard/amd/olivehillplus/acpi_tables.c b/src/mainboard/amd/olivehillplus/acpi_tables.c index ade8dd6..6188cd2 100644 --- a/src/mainboard/amd/olivehillplus/acpi_tables.c +++ b/src/mainboard/amd/olivehillplus/acpi_tables.c @@ -18,7 +18,6 @@ #include <arch/acpigen.h> #include <arch/ioapic.h> #include <device/pci.h> -#include <device/pci_ids.h> unsigned long acpi_fill_madt(unsigned long current) { diff --git a/src/mainboard/amd/olivehillplus/romstage.c b/src/mainboard/amd/olivehillplus/romstage.c index 3cd8b73..d7afe96 100644 --- a/src/mainboard/amd/olivehillplus/romstage.c +++ b/src/mainboard/amd/olivehillplus/romstage.c @@ -16,7 +16,6 @@ #include <stdint.h> #include <string.h> #include <device/pci_def.h> -#include <device/pci_ids.h> #include <arch/io.h> #include <arch/stages.h> #include <device/pnp_def.h> diff --git a/src/mainboard/amd/parmer/acpi_tables.c b/src/mainboard/amd/parmer/acpi_tables.c index 3cbca2d..cd28d9d 100644 --- a/src/mainboard/amd/parmer/acpi_tables.c +++ b/src/mainboard/amd/parmer/acpi_tables.c @@ -18,7 +18,6 @@ #include <arch/acpigen.h> #include <arch/ioapic.h> #include <device/pci.h> -#include <device/pci_ids.h> unsigned long acpi_fill_madt(unsigned long current) { diff --git a/src/mainboard/amd/persimmon/acpi_tables.c b/src/mainboard/amd/persimmon/acpi_tables.c index 0734faf..5727da8 100644 --- a/src/mainboard/amd/persimmon/acpi_tables.c +++ b/src/mainboard/amd/persimmon/acpi_tables.c @@ -18,7 +18,6 @@ #include <arch/acpigen.h> #include <arch/ioapic.h> #include <device/pci.h> -#include <device/pci_ids.h> unsigned long acpi_fill_madt(unsigned long current) diff --git a/src/mainboard/amd/serengeti_cheetah_fam10/acpi_tables.c b/src/mainboard/amd/serengeti_cheetah_fam10/acpi_tables.c index 03b849d..bf8ef2a 100644 --- a/src/mainboard/amd/serengeti_cheetah_fam10/acpi_tables.c +++ b/src/mainboard/amd/serengeti_cheetah_fam10/acpi_tables.c @@ -18,7 +18,6 @@ #include <arch/acpi.h> #include <arch/ioapic.h> #include <device/pci.h> -#include <device/pci_ids.h> #include <cpu/amd/amdfam10_sysconf.h> #include <cbfs.h> diff --git a/src/mainboard/amd/serengeti_cheetah_fam10/get_bus_conf.c b/src/mainboard/amd/serengeti_cheetah_fam10/get_bus_conf.c index 4e84fb2..5fc708d 100644 --- a/src/mainboard/amd/serengeti_cheetah_fam10/get_bus_conf.c +++ b/src/mainboard/amd/serengeti_cheetah_fam10/get_bus_conf.c @@ -15,7 +15,6 @@ #include <console/console.h> #include <device/pci.h> -#include <device/pci_ids.h> #include <string.h> #include <stdint.h> #include <cpu/amd/multicore.h> diff --git a/src/mainboard/amd/serengeti_cheetah_fam10/romstage.c b/src/mainboard/amd/serengeti_cheetah_fam10/romstage.c index e923513..fcb10b1 100644 --- a/src/mainboard/amd/serengeti_cheetah_fam10/romstage.c +++ b/src/mainboard/amd/serengeti_cheetah_fam10/romstage.c @@ -22,7 +22,6 @@ #include <stdint.h> #include <string.h> #include <device/pci_def.h> -#include <device/pci_ids.h> #include <arch/io.h> #include <arch/cpu.h> #include <device/pnp_def.h> diff --git a/src/mainboard/amd/south_station/acpi_tables.c b/src/mainboard/amd/south_station/acpi_tables.c index 567c108..74be72f 100644 --- a/src/mainboard/amd/south_station/acpi_tables.c +++ b/src/mainboard/amd/south_station/acpi_tables.c @@ -18,7 +18,6 @@ #include <arch/acpigen.h> #include <arch/ioapic.h> #include <device/pci.h> -#include <device/pci_ids.h> unsigned long acpi_fill_madt(unsigned long current) { diff --git a/src/mainboard/amd/thatcher/acpi_tables.c b/src/mainboard/amd/thatcher/acpi_tables.c index 3cbca2d..cd28d9d 100644 --- a/src/mainboard/amd/thatcher/acpi_tables.c +++ b/src/mainboard/amd/thatcher/acpi_tables.c @@ -18,7 +18,6 @@ #include <arch/acpigen.h> #include <arch/ioapic.h> #include <device/pci.h> -#include <device/pci_ids.h> unsigned long acpi_fill_madt(unsigned long current) { diff --git a/src/mainboard/amd/thatcher/romstage.c b/src/mainboard/amd/thatcher/romstage.c index d4097ff..645afd4 100644 --- a/src/mainboard/amd/thatcher/romstage.c +++ b/src/mainboard/amd/thatcher/romstage.c @@ -16,7 +16,6 @@ #include <stdint.h> #include <string.h> #include <device/pci_def.h> -#include <device/pci_ids.h> #include <arch/acpi.h> #include <arch/io.h> #include <arch/stages.h> diff --git a/src/mainboard/amd/tilapia_fam10/acpi_tables.c b/src/mainboard/amd/tilapia_fam10/acpi_tables.c index 49d6923..6261a96 100644 --- a/src/mainboard/amd/tilapia_fam10/acpi_tables.c +++ b/src/mainboard/amd/tilapia_fam10/acpi_tables.c @@ -17,7 +17,6 @@ #include <arch/acpi.h> #include <arch/ioapic.h> #include <device/pci.h> -#include <device/pci_ids.h> #include <cpu/amd/amdfam10_sysconf.h> #include "mb_sysconf.h" diff --git a/src/mainboard/amd/tilapia_fam10/get_bus_conf.c b/src/mainboard/amd/tilapia_fam10/get_bus_conf.c index 09aead7..eca0ba7 100644 --- a/src/mainboard/amd/tilapia_fam10/get_bus_conf.c +++ b/src/mainboard/amd/tilapia_fam10/get_bus_conf.c @@ -14,7 +14,6 @@ */ #include <device/pci.h> -#include <device/pci_ids.h> #include <string.h> #include <stdint.h> #include <stdlib.h> diff --git a/src/mainboard/amd/tilapia_fam10/romstage.c b/src/mainboard/amd/tilapia_fam10/romstage.c index 4e1a72e..0001f93 100644 --- a/src/mainboard/amd/tilapia_fam10/romstage.c +++ b/src/mainboard/amd/tilapia_fam10/romstage.c @@ -22,7 +22,6 @@ #include <stdint.h> #include <string.h> #include <device/pci_def.h> -#include <device/pci_ids.h> #include <arch/io.h> #include <arch/cpu.h> #include <device/pnp_def.h> diff --git a/src/mainboard/amd/torpedo/acpi_tables.c b/src/mainboard/amd/torpedo/acpi_tables.c index a0c75ab..e3beb74 100644 --- a/src/mainboard/amd/torpedo/acpi_tables.c +++ b/src/mainboard/amd/torpedo/acpi_tables.c @@ -18,7 +18,6 @@ #include <arch/ioapic.h> #include <arch/io.h> #include <device/pci.h> -#include <device/pci_ids.h> extern u32 apicid_sb900; diff --git a/src/mainboard/amd/union_station/acpi_tables.c b/src/mainboard/amd/union_station/acpi_tables.c index 567c108..74be72f 100644 --- a/src/mainboard/amd/union_station/acpi_tables.c +++ b/src/mainboard/amd/union_station/acpi_tables.c @@ -18,7 +18,6 @@ #include <arch/acpigen.h> #include <arch/ioapic.h> #include <device/pci.h> -#include <device/pci_ids.h> unsigned long acpi_fill_madt(unsigned long current) { diff --git a/src/mainboard/aopen/dxplplusu/acpi_tables.c b/src/mainboard/aopen/dxplplusu/acpi_tables.c index e60b314..2981403 100644 --- a/src/mainboard/aopen/dxplplusu/acpi_tables.c +++ b/src/mainboard/aopen/dxplplusu/acpi_tables.c @@ -21,7 +21,6 @@ #include <string.h> #include <arch/acpi.h> #include <device/pci.h> -#include <device/pci_ids.h> #include <assert.h> #include "bus.h" diff --git a/src/mainboard/apple/macbook21/mainboard.c b/src/mainboard/apple/macbook21/mainboard.c index 49d3427..3f4d6e6 100644 --- a/src/mainboard/apple/macbook21/mainboard.c +++ b/src/mainboard/apple/macbook21/mainboard.c @@ -20,7 +20,6 @@ #include <delay.h> #include <device/pci_def.h> #include <device/pci_ops.h> -#include <device/pci_ids.h> #include <arch/interrupt.h> #include <northbridge/intel/i945/i945.h> #include <arch/x86/include/arch/acpigen.h> diff --git a/src/mainboard/asrock/e350m1/acpi_tables.c b/src/mainboard/asrock/e350m1/acpi_tables.c index 2cd7e2a..a61d91e 100644 --- a/src/mainboard/asrock/e350m1/acpi_tables.c +++ b/src/mainboard/asrock/e350m1/acpi_tables.c @@ -18,7 +18,6 @@ #include <arch/acpigen.h> #include <arch/ioapic.h> #include <device/pci.h> -#include <device/pci_ids.h> #include <string.h> unsigned long acpi_fill_madt(unsigned long current) diff --git a/src/mainboard/asrock/imb-a180/acpi_tables.c b/src/mainboard/asrock/imb-a180/acpi_tables.c index d56a243..84ad76e 100644 --- a/src/mainboard/asrock/imb-a180/acpi_tables.c +++ b/src/mainboard/asrock/imb-a180/acpi_tables.c @@ -18,7 +18,6 @@ #include <arch/acpigen.h> #include <arch/ioapic.h> #include <device/pci.h> -#include <device/pci_ids.h> unsigned long acpi_fill_madt(unsigned long current) diff --git a/src/mainboard/asrock/imb-a180/romstage.c b/src/mainboard/asrock/imb-a180/romstage.c index 8a5e05d..3a1472b 100644 --- a/src/mainboard/asrock/imb-a180/romstage.c +++ b/src/mainboard/asrock/imb-a180/romstage.c @@ -16,7 +16,6 @@ #include <stdint.h> #include <string.h> #include <device/pci_def.h> -#include <device/pci_ids.h> #include <arch/acpi.h> #include <arch/io.h> #include <arch/stages.h> diff --git a/src/mainboard/asus/am1i-a/acpi_tables.c b/src/mainboard/asus/am1i-a/acpi_tables.c index f151490..68cd239 100644 --- a/src/mainboard/asus/am1i-a/acpi_tables.c +++ b/src/mainboard/asus/am1i-a/acpi_tables.c @@ -18,7 +18,6 @@ #include <arch/acpigen.h> #include <arch/ioapic.h> #include <device/pci.h> -#include <device/pci_ids.h> unsigned long acpi_fill_madt(unsigned long current) diff --git a/src/mainboard/asus/f2a85-m/acpi_tables.c b/src/mainboard/asus/f2a85-m/acpi_tables.c index 45e59d2..f94fde0 100644 --- a/src/mainboard/asus/f2a85-m/acpi_tables.c +++ b/src/mainboard/asus/f2a85-m/acpi_tables.c @@ -18,7 +18,6 @@ #include <arch/acpigen.h> #include <arch/ioapic.h> #include <device/pci.h> -#include <device/pci_ids.h> #include <string.h> unsigned long acpi_fill_madt(unsigned long current) diff --git a/src/mainboard/asus/kcma-d8/acpi_tables.c b/src/mainboard/asus/kcma-d8/acpi_tables.c index 9c2f294..7da1390 100644 --- a/src/mainboard/asus/kcma-d8/acpi_tables.c +++ b/src/mainboard/asus/kcma-d8/acpi_tables.c @@ -18,7 +18,6 @@ #include <arch/acpi.h> #include <arch/ioapic.h> #include <device/pci.h> -#include <device/pci_ids.h> #include <cpu/amd/amdfam10_sysconf.h> #include "mb_sysconf.h" diff --git a/src/mainboard/asus/kcma-d8/get_bus_conf.c b/src/mainboard/asus/kcma-d8/get_bus_conf.c index 014ef53..62b726c 100644 --- a/src/mainboard/asus/kcma-d8/get_bus_conf.c +++ b/src/mainboard/asus/kcma-d8/get_bus_conf.c @@ -15,7 +15,6 @@ */ #include <device/pci.h> -#include <device/pci_ids.h> #include <string.h> #include <stdint.h> #include <stdlib.h> diff --git a/src/mainboard/asus/kcma-d8/romstage.c b/src/mainboard/asus/kcma-d8/romstage.c index 5b12845..12c0926 100644 --- a/src/mainboard/asus/kcma-d8/romstage.c +++ b/src/mainboard/asus/kcma-d8/romstage.c @@ -20,7 +20,6 @@ #include <stdint.h> #include <string.h> #include <device/pci_def.h> -#include <device/pci_ids.h> #include <arch/io.h> #include <arch/cpu.h> #include <device/pnp_def.h> diff --git a/src/mainboard/asus/kfsn4-dre/acpi_tables.c b/src/mainboard/asus/kfsn4-dre/acpi_tables.c index dd5a076..36f55af 100644 --- a/src/mainboard/asus/kfsn4-dre/acpi_tables.c +++ b/src/mainboard/asus/kfsn4-dre/acpi_tables.c @@ -26,7 +26,6 @@ #include <arch/io.h> #include <arch/smp/mpspec.h> #include <device/pci.h> -#include <device/pci_ids.h> #include <cpu/amd/amdfam10_sysconf.h> /* APIC */ diff --git a/src/mainboard/asus/kfsn4-dre/get_bus_conf.c b/src/mainboard/asus/kfsn4-dre/get_bus_conf.c index 5c8c75e..c8bf9a8 100644 --- a/src/mainboard/asus/kfsn4-dre/get_bus_conf.c +++ b/src/mainboard/asus/kfsn4-dre/get_bus_conf.c @@ -20,7 +20,6 @@ #include <console/console.h> #include <device/pci.h> -#include <device/pci_ids.h> #include <string.h> #include <stdint.h> #include <stdlib.h> diff --git a/src/mainboard/asus/kgpe-d16/acpi_tables.c b/src/mainboard/asus/kgpe-d16/acpi_tables.c index 9c2f294..7da1390 100644 --- a/src/mainboard/asus/kgpe-d16/acpi_tables.c +++ b/src/mainboard/asus/kgpe-d16/acpi_tables.c @@ -18,7 +18,6 @@ #include <arch/acpi.h> #include <arch/ioapic.h> #include <device/pci.h> -#include <device/pci_ids.h> #include <cpu/amd/amdfam10_sysconf.h> #include "mb_sysconf.h" diff --git a/src/mainboard/asus/kgpe-d16/get_bus_conf.c b/src/mainboard/asus/kgpe-d16/get_bus_conf.c index 014ef53..62b726c 100644 --- a/src/mainboard/asus/kgpe-d16/get_bus_conf.c +++ b/src/mainboard/asus/kgpe-d16/get_bus_conf.c @@ -15,7 +15,6 @@ */ #include <device/pci.h> -#include <device/pci_ids.h> #include <string.h> #include <stdint.h> #include <stdlib.h> diff --git a/src/mainboard/asus/kgpe-d16/romstage.c b/src/mainboard/asus/kgpe-d16/romstage.c index bfa4042..1efbda8 100644 --- a/src/mainboard/asus/kgpe-d16/romstage.c +++ b/src/mainboard/asus/kgpe-d16/romstage.c @@ -20,7 +20,6 @@ #include <stdint.h> #include <string.h> #include <device/pci_def.h> -#include <device/pci_ids.h> #include <arch/io.h> #include <arch/cpu.h> #include <device/pnp_def.h> diff --git a/src/mainboard/asus/m4a78-em/acpi_tables.c b/src/mainboard/asus/m4a78-em/acpi_tables.c index ca0c0a3..8b5f1b5 100644 --- a/src/mainboard/asus/m4a78-em/acpi_tables.c +++ b/src/mainboard/asus/m4a78-em/acpi_tables.c @@ -17,7 +17,6 @@ #include <arch/acpi.h> #include <arch/ioapic.h> #include <device/pci.h> -#include <device/pci_ids.h> #include <cpu/amd/amdfam10_sysconf.h> #include "mb_sysconf.h" diff --git a/src/mainboard/asus/m4a78-em/get_bus_conf.c b/src/mainboard/asus/m4a78-em/get_bus_conf.c index 09aead7..eca0ba7 100644 --- a/src/mainboard/asus/m4a78-em/get_bus_conf.c +++ b/src/mainboard/asus/m4a78-em/get_bus_conf.c @@ -14,7 +14,6 @@ */ #include <device/pci.h> -#include <device/pci_ids.h> #include <string.h> #include <stdint.h> #include <stdlib.h> diff --git a/src/mainboard/asus/m4a78-em/romstage.c b/src/mainboard/asus/m4a78-em/romstage.c index 96d80cc..3175a02 100644 --- a/src/mainboard/asus/m4a78-em/romstage.c +++ b/src/mainboard/asus/m4a78-em/romstage.c @@ -23,7 +23,6 @@ #include <stdint.h> #include <string.h> #include <device/pci_def.h> -#include <device/pci_ids.h> #include <arch/io.h> #include <arch/cpu.h> #include <device/pnp_def.h> diff --git a/src/mainboard/asus/m4a785-m/acpi_tables.c b/src/mainboard/asus/m4a785-m/acpi_tables.c index 48c70d1..541e483 100644 --- a/src/mainboard/asus/m4a785-m/acpi_tables.c +++ b/src/mainboard/asus/m4a785-m/acpi_tables.c @@ -19,7 +19,6 @@ #include <arch/acpigen.h> #include <arch/ioapic.h> #include <device/pci.h> -#include <device/pci_ids.h> #include <cpu/amd/amdfam10_sysconf.h> #include "mb_sysconf.h" diff --git a/src/mainboard/asus/m4a785-m/get_bus_conf.c b/src/mainboard/asus/m4a785-m/get_bus_conf.c index 09aead7..eca0ba7 100644 --- a/src/mainboard/asus/m4a785-m/get_bus_conf.c +++ b/src/mainboard/asus/m4a785-m/get_bus_conf.c @@ -14,7 +14,6 @@ */ #include <device/pci.h> -#include <device/pci_ids.h> #include <string.h> #include <stdint.h> #include <stdlib.h> diff --git a/src/mainboard/asus/m4a785-m/romstage.c b/src/mainboard/asus/m4a785-m/romstage.c index 8eb9226..8dbaefa 100644 --- a/src/mainboard/asus/m4a785-m/romstage.c +++ b/src/mainboard/asus/m4a785-m/romstage.c @@ -24,7 +24,6 @@ #include <stdint.h> #include <string.h> #include <device/pci_def.h> -#include <device/pci_ids.h> #include <arch/io.h> #include <arch/cpu.h> #include <device/pnp_def.h> diff --git a/src/mainboard/asus/m5a88-v/acpi_tables.c b/src/mainboard/asus/m5a88-v/acpi_tables.c index 0cf4300..d7b6fef 100644 --- a/src/mainboard/asus/m5a88-v/acpi_tables.c +++ b/src/mainboard/asus/m5a88-v/acpi_tables.c @@ -17,7 +17,6 @@ #include <arch/acpi.h> #include <arch/ioapic.h> #include <device/pci.h> -#include <device/pci_ids.h> #include <cpu/amd/amdfam10_sysconf.h> #include "mb_sysconf.h" diff --git a/src/mainboard/asus/m5a88-v/get_bus_conf.c b/src/mainboard/asus/m5a88-v/get_bus_conf.c index a57b738..7806305 100644 --- a/src/mainboard/asus/m5a88-v/get_bus_conf.c +++ b/src/mainboard/asus/m5a88-v/get_bus_conf.c @@ -14,7 +14,6 @@ */ #include <device/pci.h> -#include <device/pci_ids.h> #include <string.h> #include <stdint.h> #include <stdlib.h> diff --git a/src/mainboard/asus/m5a88-v/romstage.c b/src/mainboard/asus/m5a88-v/romstage.c index bb43dd5..3ad33ec 100644 --- a/src/mainboard/asus/m5a88-v/romstage.c +++ b/src/mainboard/asus/m5a88-v/romstage.c @@ -23,7 +23,6 @@ #include <stdint.h> #include <string.h> #include <device/pci_def.h> -#include <device/pci_ids.h> #include <arch/io.h> #include <arch/cpu.h> #include <device/pnp_def.h> diff --git a/src/mainboard/avalue/eax-785e/acpi_tables.c b/src/mainboard/avalue/eax-785e/acpi_tables.c index 0cf4300..d7b6fef 100644 --- a/src/mainboard/avalue/eax-785e/acpi_tables.c +++ b/src/mainboard/avalue/eax-785e/acpi_tables.c @@ -17,7 +17,6 @@ #include <arch/acpi.h> #include <arch/ioapic.h> #include <device/pci.h> -#include <device/pci_ids.h> #include <cpu/amd/amdfam10_sysconf.h> #include "mb_sysconf.h" diff --git a/src/mainboard/avalue/eax-785e/get_bus_conf.c b/src/mainboard/avalue/eax-785e/get_bus_conf.c index a57b738..7806305 100644 --- a/src/mainboard/avalue/eax-785e/get_bus_conf.c +++ b/src/mainboard/avalue/eax-785e/get_bus_conf.c @@ -14,7 +14,6 @@ */ #include <device/pci.h> -#include <device/pci_ids.h> #include <string.h> #include <stdint.h> #include <stdlib.h> diff --git a/src/mainboard/avalue/eax-785e/romstage.c b/src/mainboard/avalue/eax-785e/romstage.c index ba7e7ad..85ff722 100644 --- a/src/mainboard/avalue/eax-785e/romstage.c +++ b/src/mainboard/avalue/eax-785e/romstage.c @@ -21,7 +21,6 @@ #include <stdint.h> #include <string.h> #include <device/pci_def.h> -#include <device/pci_ids.h> #include <arch/io.h> #include <arch/cpu.h> #include <device/pnp_def.h> diff --git a/src/mainboard/bap/ode_e20XX/acpi_tables.c b/src/mainboard/bap/ode_e20XX/acpi_tables.c index d56a243..84ad76e 100644 --- a/src/mainboard/bap/ode_e20XX/acpi_tables.c +++ b/src/mainboard/bap/ode_e20XX/acpi_tables.c @@ -18,7 +18,6 @@ #include <arch/acpigen.h> #include <arch/ioapic.h> #include <device/pci.h> -#include <device/pci_ids.h> unsigned long acpi_fill_madt(unsigned long current) diff --git a/src/mainboard/bap/ode_e21XX/acpi_tables.c b/src/mainboard/bap/ode_e21XX/acpi_tables.c index ade8dd6..6188cd2 100644 --- a/src/mainboard/bap/ode_e21XX/acpi_tables.c +++ b/src/mainboard/bap/ode_e21XX/acpi_tables.c @@ -18,7 +18,6 @@ #include <arch/acpigen.h> #include <arch/ioapic.h> #include <device/pci.h> -#include <device/pci_ids.h> unsigned long acpi_fill_madt(unsigned long current) { diff --git a/src/mainboard/bap/ode_e21XX/romstage.c b/src/mainboard/bap/ode_e21XX/romstage.c index eefda26..ea7dcb0 100644 --- a/src/mainboard/bap/ode_e21XX/romstage.c +++ b/src/mainboard/bap/ode_e21XX/romstage.c @@ -16,7 +16,6 @@ #include <stdint.h> #include <string.h> #include <device/pci_def.h> -#include <device/pci_ids.h> #include <arch/io.h> #include <arch/stages.h> #include <device/pnp_def.h> diff --git a/src/mainboard/biostar/a68n_5200/acpi_tables.c b/src/mainboard/biostar/a68n_5200/acpi_tables.c index d56a243..84ad76e 100644 --- a/src/mainboard/biostar/a68n_5200/acpi_tables.c +++ b/src/mainboard/biostar/a68n_5200/acpi_tables.c @@ -18,7 +18,6 @@ #include <arch/acpigen.h> #include <arch/ioapic.h> #include <device/pci.h> -#include <device/pci_ids.h> unsigned long acpi_fill_madt(unsigned long current) diff --git a/src/mainboard/biostar/a68n_5200/romstage.c b/src/mainboard/biostar/a68n_5200/romstage.c index e081a58..43b2c82 100644 --- a/src/mainboard/biostar/a68n_5200/romstage.c +++ b/src/mainboard/biostar/a68n_5200/romstage.c @@ -18,7 +18,6 @@ #include <stdint.h> #include <string.h> #include <device/pci_def.h> -#include <device/pci_ids.h> #include <arch/io.h> #include <arch/stages.h> #include <device/pnp_def.h> diff --git a/src/mainboard/biostar/am1ml/acpi_tables.c b/src/mainboard/biostar/am1ml/acpi_tables.c index f151490..68cd239 100644 --- a/src/mainboard/biostar/am1ml/acpi_tables.c +++ b/src/mainboard/biostar/am1ml/acpi_tables.c @@ -18,7 +18,6 @@ #include <arch/acpigen.h> #include <arch/ioapic.h> #include <device/pci.h> -#include <device/pci_ids.h> unsigned long acpi_fill_madt(unsigned long current) diff --git a/src/mainboard/elmex/pcm205400/acpi_tables.c b/src/mainboard/elmex/pcm205400/acpi_tables.c index 0734faf..5727da8 100644 --- a/src/mainboard/elmex/pcm205400/acpi_tables.c +++ b/src/mainboard/elmex/pcm205400/acpi_tables.c @@ -18,7 +18,6 @@ #include <arch/acpigen.h> #include <arch/ioapic.h> #include <device/pci.h> -#include <device/pci_ids.h> unsigned long acpi_fill_madt(unsigned long current) diff --git a/src/mainboard/emulation/qemu-q35/acpi_tables.c b/src/mainboard/emulation/qemu-q35/acpi_tables.c index 5a36cb1..b8df509 100644 --- a/src/mainboard/emulation/qemu-q35/acpi_tables.c +++ b/src/mainboard/emulation/qemu-q35/acpi_tables.c @@ -21,7 +21,6 @@ #include <arch/smp/mpspec.h> #include <device/device.h> #include <device/pci.h> -#include <device/pci_ids.h> #include "../qemu-i440fx/fw_cfg.h" #include "../qemu-i440fx/acpi.h" diff --git a/src/mainboard/emulation/qemu-q35/mainboard.c b/src/mainboard/emulation/qemu-q35/mainboard.c index f89b0a8..90a32f4 100644 --- a/src/mainboard/emulation/qemu-q35/mainboard.c +++ b/src/mainboard/emulation/qemu-q35/mainboard.c @@ -16,7 +16,6 @@ #include <device/device.h> #include <device/pci.h> -#include <device/pci_ids.h> #include <device/pci_ops.h> #include <pc80/keyboard.h> #include <drivers/intel/gma/i915.h> diff --git a/src/mainboard/esd/atom15/acpi_tables.c b/src/mainboard/esd/atom15/acpi_tables.c index a7f71e2..bdb201c 100644 --- a/src/mainboard/esd/atom15/acpi_tables.c +++ b/src/mainboard/esd/atom15/acpi_tables.c @@ -22,7 +22,6 @@ #include <arch/smp/mpspec.h> #include <device/device.h> #include <device/pci.h> -#include <device/pci_ids.h> #include <soc/acpi.h> #include <soc/nvs.h> #include <soc/iomap.h> diff --git a/src/mainboard/getac/p470/acpi_tables.c b/src/mainboard/getac/p470/acpi_tables.c index 30364ba..162c20a 100644 --- a/src/mainboard/getac/p470/acpi_tables.c +++ b/src/mainboard/getac/p470/acpi_tables.c @@ -22,7 +22,6 @@ #include <arch/smp/mpspec.h> #include <device/device.h> #include <device/pci.h> -#include <device/pci_ids.h> #include <southbridge/intel/i82801gx/nvs.h> #include "mainboard.h" diff --git a/src/mainboard/gigabyte/ma785gm/acpi_tables.c b/src/mainboard/gigabyte/ma785gm/acpi_tables.c index 49d6923..6261a96 100644 --- a/src/mainboard/gigabyte/ma785gm/acpi_tables.c +++ b/src/mainboard/gigabyte/ma785gm/acpi_tables.c @@ -17,7 +17,6 @@ #include <arch/acpi.h> #include <arch/ioapic.h> #include <device/pci.h> -#include <device/pci_ids.h> #include <cpu/amd/amdfam10_sysconf.h> #include "mb_sysconf.h" diff --git a/src/mainboard/gigabyte/ma785gm/get_bus_conf.c b/src/mainboard/gigabyte/ma785gm/get_bus_conf.c index 09aead7..eca0ba7 100644 --- a/src/mainboard/gigabyte/ma785gm/get_bus_conf.c +++ b/src/mainboard/gigabyte/ma785gm/get_bus_conf.c @@ -14,7 +14,6 @@ */ #include <device/pci.h> -#include <device/pci_ids.h> #include <string.h> #include <stdint.h> #include <stdlib.h> diff --git a/src/mainboard/gigabyte/ma785gm/romstage.c b/src/mainboard/gigabyte/ma785gm/romstage.c index 098baac..3a777f2 100644 --- a/src/mainboard/gigabyte/ma785gm/romstage.c +++ b/src/mainboard/gigabyte/ma785gm/romstage.c @@ -20,7 +20,6 @@ #include <stdint.h> #include <string.h> #include <device/pci_def.h> -#include <device/pci_ids.h> #include <arch/io.h> #include <arch/cpu.h> #include <device/pnp_def.h> diff --git a/src/mainboard/gigabyte/ma785gmt/acpi_tables.c b/src/mainboard/gigabyte/ma785gmt/acpi_tables.c index ed5772d..0cdcdb7 100644 --- a/src/mainboard/gigabyte/ma785gmt/acpi_tables.c +++ b/src/mainboard/gigabyte/ma785gmt/acpi_tables.c @@ -17,7 +17,6 @@ #include <arch/acpi.h> #include <arch/ioapic.h> #include <device/pci.h> -#include <device/pci_ids.h> #include <cpu/amd/amdfam10_sysconf.h> unsigned long acpi_fill_madt(unsigned long current) diff --git a/src/mainboard/gigabyte/ma785gmt/get_bus_conf.c b/src/mainboard/gigabyte/ma785gmt/get_bus_conf.c index 09aead7..eca0ba7 100644 --- a/src/mainboard/gigabyte/ma785gmt/get_bus_conf.c +++ b/src/mainboard/gigabyte/ma785gmt/get_bus_conf.c @@ -14,7 +14,6 @@ */ #include <device/pci.h> -#include <device/pci_ids.h> #include <string.h> #include <stdint.h> #include <stdlib.h> diff --git a/src/mainboard/gigabyte/ma785gmt/romstage.c b/src/mainboard/gigabyte/ma785gmt/romstage.c index 05d2e04..d08e1e0 100644 --- a/src/mainboard/gigabyte/ma785gmt/romstage.c +++ b/src/mainboard/gigabyte/ma785gmt/romstage.c @@ -20,7 +20,6 @@ #include <stdint.h> #include <string.h> #include <device/pci_def.h> -#include <device/pci_ids.h> #include <arch/io.h> #include <arch/cpu.h> #include <device/pnp_def.h> diff --git a/src/mainboard/gigabyte/ma78gm/acpi_tables.c b/src/mainboard/gigabyte/ma78gm/acpi_tables.c index ed5772d..0cdcdb7 100644 --- a/src/mainboard/gigabyte/ma78gm/acpi_tables.c +++ b/src/mainboard/gigabyte/ma78gm/acpi_tables.c @@ -17,7 +17,6 @@ #include <arch/acpi.h> #include <arch/ioapic.h> #include <device/pci.h> -#include <device/pci_ids.h> #include <cpu/amd/amdfam10_sysconf.h> unsigned long acpi_fill_madt(unsigned long current) diff --git a/src/mainboard/gigabyte/ma78gm/get_bus_conf.c b/src/mainboard/gigabyte/ma78gm/get_bus_conf.c index 09aead7..eca0ba7 100644 --- a/src/mainboard/gigabyte/ma78gm/get_bus_conf.c +++ b/src/mainboard/gigabyte/ma78gm/get_bus_conf.c @@ -14,7 +14,6 @@ */ #include <device/pci.h> -#include <device/pci_ids.h> #include <string.h> #include <stdint.h> #include <stdlib.h> diff --git a/src/mainboard/gigabyte/ma78gm/romstage.c b/src/mainboard/gigabyte/ma78gm/romstage.c index 536a041..7e85498 100644 --- a/src/mainboard/gigabyte/ma78gm/romstage.c +++ b/src/mainboard/gigabyte/ma78gm/romstage.c @@ -23,7 +23,6 @@ #include <stdint.h> #include <string.h> #include <device/pci_def.h> -#include <device/pci_ids.h> #include <arch/io.h> #include <arch/cpu.h> #include <device/pnp_def.h> diff --git a/src/mainboard/gizmosphere/gizmo/acpi_tables.c b/src/mainboard/gizmosphere/gizmo/acpi_tables.c index 2db0a46..644ab96 100644 --- a/src/mainboard/gizmosphere/gizmo/acpi_tables.c +++ b/src/mainboard/gizmosphere/gizmo/acpi_tables.c @@ -19,7 +19,6 @@ #include <arch/acpigen.h> #include <arch/ioapic.h> #include <device/pci.h> -#include <device/pci_ids.h> unsigned long acpi_fill_madt(unsigned long current) { diff --git a/src/mainboard/gizmosphere/gizmo2/acpi_tables.c b/src/mainboard/gizmosphere/gizmo2/acpi_tables.c index d56a243..84ad76e 100644 --- a/src/mainboard/gizmosphere/gizmo2/acpi_tables.c +++ b/src/mainboard/gizmosphere/gizmo2/acpi_tables.c @@ -18,7 +18,6 @@ #include <arch/acpigen.h> #include <arch/ioapic.h> #include <device/pci.h> -#include <device/pci_ids.h> unsigned long acpi_fill_madt(unsigned long current) diff --git a/src/mainboard/google/beltino/acpi_tables.c b/src/mainboard/google/beltino/acpi_tables.c index 3f6e9de..f7b51a9 100644 --- a/src/mainboard/google/beltino/acpi_tables.c +++ b/src/mainboard/google/beltino/acpi_tables.c @@ -21,7 +21,6 @@ #include <arch/smp/mpspec.h> #include <device/device.h> #include <device/pci.h> -#include <device/pci_ids.h> #include <ec/google/chromeec/ec.h> #include <southbridge/intel/lynxpoint/nvs.h> #include <southbridge/intel/lynxpoint/pch.h> diff --git a/src/mainboard/google/jecht/acpi_tables.c b/src/mainboard/google/jecht/acpi_tables.c index 4e86f87..9bc1816 100644 --- a/src/mainboard/google/jecht/acpi_tables.c +++ b/src/mainboard/google/jecht/acpi_tables.c @@ -21,7 +21,6 @@ #include <arch/smp/mpspec.h> #include <device/device.h> #include <device/pci.h> -#include <device/pci_ids.h> #include <soc/acpi.h> #include <soc/nvs.h> #include <variant/thermal.h> diff --git a/src/mainboard/google/parrot/acpi_tables.c b/src/mainboard/google/parrot/acpi_tables.c index 36139b1..61dcde1 100644 --- a/src/mainboard/google/parrot/acpi_tables.c +++ b/src/mainboard/google/parrot/acpi_tables.c @@ -20,7 +20,6 @@ #include <arch/smp/mpspec.h> #include <device/device.h> #include <device/pci.h> -#include <device/pci_ids.h> #include <vendorcode/google/chromeos/gnvs.h> #include <ec/compal/ene932/ec.h> #include "ec.h" diff --git a/src/mainboard/google/rambi/acpi_tables.c b/src/mainboard/google/rambi/acpi_tables.c index ecfab56..d9f511a 100644 --- a/src/mainboard/google/rambi/acpi_tables.c +++ b/src/mainboard/google/rambi/acpi_tables.c @@ -21,7 +21,6 @@ #include <arch/smp/mpspec.h> #include <device/device.h> #include <device/pci.h> -#include <device/pci_ids.h> #include <soc/acpi.h> #include <soc/nvs.h> #include <soc/iomap.h> diff --git a/src/mainboard/google/slippy/acpi_tables.c b/src/mainboard/google/slippy/acpi_tables.c index b17f5a6..0ffd054 100644 --- a/src/mainboard/google/slippy/acpi_tables.c +++ b/src/mainboard/google/slippy/acpi_tables.c @@ -21,7 +21,6 @@ #include <arch/smp/mpspec.h> #include <device/device.h> #include <device/pci.h> -#include <device/pci_ids.h> #include <vendorcode/google/chromeos/gnvs.h> #include <ec/google/chromeec/ec.h> diff --git a/src/mainboard/google/stout/acpi_tables.c b/src/mainboard/google/stout/acpi_tables.c index 735d70f..9fbdcfc 100644 --- a/src/mainboard/google/stout/acpi_tables.c +++ b/src/mainboard/google/stout/acpi_tables.c @@ -20,7 +20,6 @@ #include <arch/smp/mpspec.h> #include <device/device.h> #include <device/pci.h> -#include <device/pci_ids.h> #include <vendorcode/google/chromeos/gnvs.h> #include <bootmode.h> #include <ec/quanta/it8518/ec.h> diff --git a/src/mainboard/hp/abm/acpi_tables.c b/src/mainboard/hp/abm/acpi_tables.c index d56a243..84ad76e 100644 --- a/src/mainboard/hp/abm/acpi_tables.c +++ b/src/mainboard/hp/abm/acpi_tables.c @@ -18,7 +18,6 @@ #include <arch/acpigen.h> #include <arch/ioapic.h> #include <device/pci.h> -#include <device/pci_ids.h> unsigned long acpi_fill_madt(unsigned long current) diff --git a/src/mainboard/hp/dl165_g6_fam10/get_bus_conf.c b/src/mainboard/hp/dl165_g6_fam10/get_bus_conf.c index b29fb2c..c43509c 100644 --- a/src/mainboard/hp/dl165_g6_fam10/get_bus_conf.c +++ b/src/mainboard/hp/dl165_g6_fam10/get_bus_conf.c @@ -17,7 +17,6 @@ #include <console/console.h> #include <device/pci.h> -#include <device/pci_ids.h> #include <string.h> #include <stdint.h> #include <cpu/amd/multicore.h> diff --git a/src/mainboard/hp/dl165_g6_fam10/romstage.c b/src/mainboard/hp/dl165_g6_fam10/romstage.c index 1b2b40b..5b19688 100644 --- a/src/mainboard/hp/dl165_g6_fam10/romstage.c +++ b/src/mainboard/hp/dl165_g6_fam10/romstage.c @@ -27,7 +27,6 @@ #include <stdint.h> #include <string.h> #include <device/pci_def.h> -#include <device/pci_ids.h> #include <arch/io.h> #include <arch/cpu.h> #include <device/pnp_def.h> diff --git a/src/mainboard/hp/pavilion_m6_1035dx/acpi_tables.c b/src/mainboard/hp/pavilion_m6_1035dx/acpi_tables.c index 45e59d2..f94fde0 100644 --- a/src/mainboard/hp/pavilion_m6_1035dx/acpi_tables.c +++ b/src/mainboard/hp/pavilion_m6_1035dx/acpi_tables.c @@ -18,7 +18,6 @@ #include <arch/acpigen.h> #include <arch/ioapic.h> #include <device/pci.h> -#include <device/pci_ids.h> #include <string.h> unsigned long acpi_fill_madt(unsigned long current) diff --git a/src/mainboard/iei/kino-780am2-fam10/acpi_tables.c b/src/mainboard/iei/kino-780am2-fam10/acpi_tables.c index 33234eb..3cba4e81 100644 --- a/src/mainboard/iei/kino-780am2-fam10/acpi_tables.c +++ b/src/mainboard/iei/kino-780am2-fam10/acpi_tables.c @@ -18,7 +18,6 @@ #include <arch/acpigen.h> #include <arch/ioapic.h> #include <device/pci.h> -#include <device/pci_ids.h> #include <cpu/amd/amdfam10_sysconf.h> #include "mb_sysconf.h" diff --git a/src/mainboard/iei/kino-780am2-fam10/get_bus_conf.c b/src/mainboard/iei/kino-780am2-fam10/get_bus_conf.c index 09aead7..eca0ba7 100644 --- a/src/mainboard/iei/kino-780am2-fam10/get_bus_conf.c +++ b/src/mainboard/iei/kino-780am2-fam10/get_bus_conf.c @@ -14,7 +14,6 @@ */ #include <device/pci.h> -#include <device/pci_ids.h> #include <string.h> #include <stdint.h> #include <stdlib.h> diff --git a/src/mainboard/iei/kino-780am2-fam10/romstage.c b/src/mainboard/iei/kino-780am2-fam10/romstage.c index fc1b32f..72146e7 100644 --- a/src/mainboard/iei/kino-780am2-fam10/romstage.c +++ b/src/mainboard/iei/kino-780am2-fam10/romstage.c @@ -23,7 +23,6 @@ #include <stdint.h> #include <string.h> #include <device/pci_def.h> -#include <device/pci_ids.h> #include <arch/io.h> #include <arch/cpu.h> #include <device/pnp_def.h> diff --git a/src/mainboard/intel/baskingridge/acpi_tables.c b/src/mainboard/intel/baskingridge/acpi_tables.c index d6dce61..c5293dc 100644 --- a/src/mainboard/intel/baskingridge/acpi_tables.c +++ b/src/mainboard/intel/baskingridge/acpi_tables.c @@ -21,7 +21,6 @@ #include <arch/smp/mpspec.h> #include <device/device.h> #include <device/pci.h> -#include <device/pci_ids.h> #include <vendorcode/google/chromeos/gnvs.h> #include <southbridge/intel/lynxpoint/pch.h> diff --git a/src/mainboard/intel/bayleybay_fsp/acpi_tables.c b/src/mainboard/intel/bayleybay_fsp/acpi_tables.c index 1536e2d..0a16565 100644 --- a/src/mainboard/intel/bayleybay_fsp/acpi_tables.c +++ b/src/mainboard/intel/bayleybay_fsp/acpi_tables.c @@ -22,7 +22,6 @@ #include <arch/smp/mpspec.h> #include <device/device.h> #include <device/pci.h> -#include <device/pci_ids.h> #include <soc/acpi.h> #include <soc/nvs.h> #include <soc/iomap.h> diff --git a/src/mainboard/intel/emeraldlake2/acpi_tables.c b/src/mainboard/intel/emeraldlake2/acpi_tables.c index 6c7d87a..d5deff0 100644 --- a/src/mainboard/intel/emeraldlake2/acpi_tables.c +++ b/src/mainboard/intel/emeraldlake2/acpi_tables.c @@ -20,7 +20,6 @@ #include <arch/smp/mpspec.h> #include <device/device.h> #include <device/pci.h> -#include <device/pci_ids.h> #include <vendorcode/google/chromeos/gnvs.h> #include <southbridge/intel/bd82x6x/nvs.h> diff --git a/src/mainboard/intel/harcuvar/acpi_tables.c b/src/mainboard/intel/harcuvar/acpi_tables.c index 3d83d3c..92cf5a2 100644 --- a/src/mainboard/intel/harcuvar/acpi_tables.c +++ b/src/mainboard/intel/harcuvar/acpi_tables.c @@ -23,7 +23,6 @@ #include <arch/smp/mpspec.h> #include <device/device.h> #include <device/pci.h> -#include <device/pci_ids.h> #include <cpu/x86/msr.h> #include <soc/acpi.h> diff --git a/src/mainboard/intel/littleplains/acpi_tables.c b/src/mainboard/intel/littleplains/acpi_tables.c index 00a0b74..bc5f953 100644 --- a/src/mainboard/intel/littleplains/acpi_tables.c +++ b/src/mainboard/intel/littleplains/acpi_tables.c @@ -22,7 +22,6 @@ #include <arch/smp/mpspec.h> #include <device/device.h> #include <device/pci.h> -#include <device/pci_ids.h> #include <southbridge/intel/fsp_rangeley/nvs.h> #include <northbridge/intel/fsp_rangeley/northbridge.h> diff --git a/src/mainboard/intel/minnowmax/acpi_tables.c b/src/mainboard/intel/minnowmax/acpi_tables.c index a7f71e2..bdb201c 100644 --- a/src/mainboard/intel/minnowmax/acpi_tables.c +++ b/src/mainboard/intel/minnowmax/acpi_tables.c @@ -22,7 +22,6 @@ #include <arch/smp/mpspec.h> #include <device/device.h> #include <device/pci.h> -#include <device/pci_ids.h> #include <soc/acpi.h> #include <soc/nvs.h> #include <soc/iomap.h> diff --git a/src/mainboard/intel/mohonpeak/acpi_tables.c b/src/mainboard/intel/mohonpeak/acpi_tables.c index 00a0b74..bc5f953 100644 --- a/src/mainboard/intel/mohonpeak/acpi_tables.c +++ b/src/mainboard/intel/mohonpeak/acpi_tables.c @@ -22,7 +22,6 @@ #include <arch/smp/mpspec.h> #include <device/device.h> #include <device/pci.h> -#include <device/pci_ids.h> #include <southbridge/intel/fsp_rangeley/nvs.h> #include <northbridge/intel/fsp_rangeley/northbridge.h> diff --git a/src/mainboard/intel/strago/acpi_tables.c b/src/mainboard/intel/strago/acpi_tables.c index d830c3a..62fcc19 100644 --- a/src/mainboard/intel/strago/acpi_tables.c +++ b/src/mainboard/intel/strago/acpi_tables.c @@ -20,7 +20,6 @@ #include <arch/smp/mpspec.h> #include <device/device.h> #include <device/pci.h> -#include <device/pci_ids.h> #include <soc/acpi.h> #include <soc/iomap.h> #include <soc/nvs.h> diff --git a/src/mainboard/intel/wtm2/acpi_tables.c b/src/mainboard/intel/wtm2/acpi_tables.c index 7579b2b..16cd0c6 100644 --- a/src/mainboard/intel/wtm2/acpi_tables.c +++ b/src/mainboard/intel/wtm2/acpi_tables.c @@ -21,7 +21,6 @@ #include <arch/smp/mpspec.h> #include <device/device.h> #include <device/pci.h> -#include <device/pci_ids.h> #include <soc/acpi.h> #include <soc/nvs.h> #include "thermal.h" diff --git a/src/mainboard/jetway/nf81-t56n-lf/acpi_tables.c b/src/mainboard/jetway/nf81-t56n-lf/acpi_tables.c index 2cd7e2a..a61d91e 100644 --- a/src/mainboard/jetway/nf81-t56n-lf/acpi_tables.c +++ b/src/mainboard/jetway/nf81-t56n-lf/acpi_tables.c @@ -18,7 +18,6 @@ #include <arch/acpigen.h> #include <arch/ioapic.h> #include <device/pci.h> -#include <device/pci_ids.h> #include <string.h> unsigned long acpi_fill_madt(unsigned long current) diff --git a/src/mainboard/jetway/pa78vm5/acpi_tables.c b/src/mainboard/jetway/pa78vm5/acpi_tables.c index 87881b0..8c6a096 100644 --- a/src/mainboard/jetway/pa78vm5/acpi_tables.c +++ b/src/mainboard/jetway/pa78vm5/acpi_tables.c @@ -18,7 +18,6 @@ #include <arch/acpi.h> #include <arch/ioapic.h> #include <device/pci.h> -#include <device/pci_ids.h> #include <cpu/amd/amdfam10_sysconf.h> unsigned long acpi_fill_madt(unsigned long current) diff --git a/src/mainboard/jetway/pa78vm5/get_bus_conf.c b/src/mainboard/jetway/pa78vm5/get_bus_conf.c index 09aead7..eca0ba7 100644 --- a/src/mainboard/jetway/pa78vm5/get_bus_conf.c +++ b/src/mainboard/jetway/pa78vm5/get_bus_conf.c @@ -14,7 +14,6 @@ */ #include <device/pci.h> -#include <device/pci_ids.h> #include <string.h> #include <stdint.h> #include <stdlib.h> diff --git a/src/mainboard/jetway/pa78vm5/romstage.c b/src/mainboard/jetway/pa78vm5/romstage.c index f75c5a4..45ee1c2 100644 --- a/src/mainboard/jetway/pa78vm5/romstage.c +++ b/src/mainboard/jetway/pa78vm5/romstage.c @@ -24,7 +24,6 @@ #include <stdint.h> #include <string.h> #include <device/pci_def.h> -#include <device/pci_ids.h> #include <arch/io.h> #include <arch/cpu.h> #include <device/pnp_def.h> diff --git a/src/mainboard/lenovo/g505s/acpi_tables.c b/src/mainboard/lenovo/g505s/acpi_tables.c index 45e59d2..f94fde0 100644 --- a/src/mainboard/lenovo/g505s/acpi_tables.c +++ b/src/mainboard/lenovo/g505s/acpi_tables.c @@ -18,7 +18,6 @@ #include <arch/acpigen.h> #include <arch/ioapic.h> #include <device/pci.h> -#include <device/pci_ids.h> #include <string.h> unsigned long acpi_fill_madt(unsigned long current) diff --git a/src/mainboard/lenovo/t400/acpi_tables.c b/src/mainboard/lenovo/t400/acpi_tables.c index 2893d39..24c3a79 100644 --- a/src/mainboard/lenovo/t400/acpi_tables.c +++ b/src/mainboard/lenovo/t400/acpi_tables.c @@ -22,7 +22,6 @@ #include <arch/smp/mpspec.h> #include <device/device.h> #include <device/pci.h> -#include <device/pci_ids.h> #include <southbridge/intel/i82801ix/nvs.h> void acpi_create_gnvs(global_nvs_t *gnvs) diff --git a/src/mainboard/lenovo/x200/acpi_tables.c b/src/mainboard/lenovo/x200/acpi_tables.c index 2893d39..24c3a79 100644 --- a/src/mainboard/lenovo/x200/acpi_tables.c +++ b/src/mainboard/lenovo/x200/acpi_tables.c @@ -22,7 +22,6 @@ #include <arch/smp/mpspec.h> #include <device/device.h> #include <device/pci.h> -#include <device/pci_ids.h> #include <southbridge/intel/i82801ix/nvs.h> void acpi_create_gnvs(global_nvs_t *gnvs) diff --git a/src/mainboard/lippert/frontrunner-af/acpi_tables.c b/src/mainboard/lippert/frontrunner-af/acpi_tables.c index 567c108..74be72f 100644 --- a/src/mainboard/lippert/frontrunner-af/acpi_tables.c +++ b/src/mainboard/lippert/frontrunner-af/acpi_tables.c @@ -18,7 +18,6 @@ #include <arch/acpigen.h> #include <arch/ioapic.h> #include <device/pci.h> -#include <device/pci_ids.h> unsigned long acpi_fill_madt(unsigned long current) { diff --git a/src/mainboard/lippert/toucan-af/acpi_tables.c b/src/mainboard/lippert/toucan-af/acpi_tables.c index 567c108..74be72f 100644 --- a/src/mainboard/lippert/toucan-af/acpi_tables.c +++ b/src/mainboard/lippert/toucan-af/acpi_tables.c @@ -18,7 +18,6 @@ #include <arch/acpigen.h> #include <arch/ioapic.h> #include <device/pci.h> -#include <device/pci_ids.h> unsigned long acpi_fill_madt(unsigned long current) { diff --git a/src/mainboard/msi/ms7721/acpi_tables.c b/src/mainboard/msi/ms7721/acpi_tables.c index 45e59d2..f94fde0 100644 --- a/src/mainboard/msi/ms7721/acpi_tables.c +++ b/src/mainboard/msi/ms7721/acpi_tables.c @@ -18,7 +18,6 @@ #include <arch/acpigen.h> #include <arch/ioapic.h> #include <device/pci.h> -#include <device/pci_ids.h> #include <string.h> unsigned long acpi_fill_madt(unsigned long current) diff --git a/src/mainboard/msi/ms9652_fam10/acpi_tables.c b/src/mainboard/msi/ms9652_fam10/acpi_tables.c index 1ab1029..5b00374 100644 --- a/src/mainboard/msi/ms9652_fam10/acpi_tables.c +++ b/src/mainboard/msi/ms9652_fam10/acpi_tables.c @@ -23,7 +23,6 @@ #include <arch/acpi.h> #include <arch/smp/mpspec.h> #include <device/device.h> -#include <device/pci_ids.h> #include <cpu/amd/powernow.h> #include <device/pci.h> #include <cpu/amd/amdfam10_sysconf.h> diff --git a/src/mainboard/msi/ms9652_fam10/get_bus_conf.c b/src/mainboard/msi/ms9652_fam10/get_bus_conf.c index 9c744ce..4f9499b 100644 --- a/src/mainboard/msi/ms9652_fam10/get_bus_conf.c +++ b/src/mainboard/msi/ms9652_fam10/get_bus_conf.c @@ -17,7 +17,6 @@ #include <console/console.h> #include <device/pci.h> -#include <device/pci_ids.h> #include <string.h> #include <stdint.h> #include <cpu/amd/multicore.h> diff --git a/src/mainboard/packardbell/ms2290/mainboard.c b/src/mainboard/packardbell/ms2290/mainboard.c index 77a626d..de9f13d 100644 --- a/src/mainboard/packardbell/ms2290/mainboard.c +++ b/src/mainboard/packardbell/ms2290/mainboard.c @@ -22,7 +22,6 @@ #include <delay.h> #include <device/pci_def.h> #include <device/pci_ops.h> -#include <device/pci_ids.h> #include <northbridge/intel/nehalem/nehalem.h> #include <southbridge/intel/bd82x6x/pch.h> #include <ec/acpi/ec.h> diff --git a/src/mainboard/pcengines/apu1/acpi_tables.c b/src/mainboard/pcengines/apu1/acpi_tables.c index 0734faf..5727da8 100644 --- a/src/mainboard/pcengines/apu1/acpi_tables.c +++ b/src/mainboard/pcengines/apu1/acpi_tables.c @@ -18,7 +18,6 @@ #include <arch/acpigen.h> #include <arch/ioapic.h> #include <device/pci.h> -#include <device/pci_ids.h> unsigned long acpi_fill_madt(unsigned long current) diff --git a/src/mainboard/pcengines/apu2/acpi_tables.c b/src/mainboard/pcengines/apu2/acpi_tables.c index ade8dd6..6188cd2 100644 --- a/src/mainboard/pcengines/apu2/acpi_tables.c +++ b/src/mainboard/pcengines/apu2/acpi_tables.c @@ -18,7 +18,6 @@ #include <arch/acpigen.h> #include <arch/ioapic.h> #include <device/pci.h> -#include <device/pci_ids.h> unsigned long acpi_fill_madt(unsigned long current) { diff --git a/src/mainboard/pcengines/apu2/romstage.c b/src/mainboard/pcengines/apu2/romstage.c index 55a89fb..329e798 100644 --- a/src/mainboard/pcengines/apu2/romstage.c +++ b/src/mainboard/pcengines/apu2/romstage.c @@ -16,7 +16,6 @@ #include <stdint.h> #include <string.h> #include <device/pci_def.h> -#include <device/pci_ids.h> #include <arch/io.h> #include <arch/stages.h> #include <device/pnp.h> diff --git a/src/mainboard/roda/rk9/acpi_tables.c b/src/mainboard/roda/rk9/acpi_tables.c index b673784..7ddc5b8 100644 --- a/src/mainboard/roda/rk9/acpi_tables.c +++ b/src/mainboard/roda/rk9/acpi_tables.c @@ -22,7 +22,6 @@ #include <arch/smp/mpspec.h> #include <device/device.h> #include <device/pci.h> -#include <device/pci_ids.h> #include <southbridge/intel/i82801ix/nvs.h> void acpi_create_gnvs(global_nvs_t *gnvs) diff --git a/src/mainboard/samsung/lumpy/acpi_tables.c b/src/mainboard/samsung/lumpy/acpi_tables.c index c801b34..e1364b6 100644 --- a/src/mainboard/samsung/lumpy/acpi_tables.c +++ b/src/mainboard/samsung/lumpy/acpi_tables.c @@ -20,7 +20,6 @@ #include <arch/smp/mpspec.h> #include <device/device.h> #include <device/pci.h> -#include <device/pci_ids.h> #include <ec/acpi/ec.h> #if IS_ENABLED(CONFIG_CHROMEOS) #include <vendorcode/google/chromeos/gnvs.h> diff --git a/src/mainboard/samsung/stumpy/acpi_tables.c b/src/mainboard/samsung/stumpy/acpi_tables.c index f875b88..ad3b29c 100644 --- a/src/mainboard/samsung/stumpy/acpi_tables.c +++ b/src/mainboard/samsung/stumpy/acpi_tables.c @@ -20,7 +20,6 @@ #include <arch/smp/mpspec.h> #include <device/device.h> #include <device/pci.h> -#include <device/pci_ids.h> #include <vendorcode/google/chromeos/gnvs.h> #include <southbridge/intel/bd82x6x/nvs.h> diff --git a/src/mainboard/scaleway/tagada/acpi_tables.c b/src/mainboard/scaleway/tagada/acpi_tables.c index 3d83d3c..92cf5a2 100644 --- a/src/mainboard/scaleway/tagada/acpi_tables.c +++ b/src/mainboard/scaleway/tagada/acpi_tables.c @@ -23,7 +23,6 @@ #include <arch/smp/mpspec.h> #include <device/device.h> #include <device/pci.h> -#include <device/pci_ids.h> #include <cpu/x86/msr.h> #include <soc/acpi.h> diff --git a/src/mainboard/siemens/mc_tcu3/acpi_tables.c b/src/mainboard/siemens/mc_tcu3/acpi_tables.c index 1536e2d..0a16565 100644 --- a/src/mainboard/siemens/mc_tcu3/acpi_tables.c +++ b/src/mainboard/siemens/mc_tcu3/acpi_tables.c @@ -22,7 +22,6 @@ #include <arch/smp/mpspec.h> #include <device/device.h> #include <device/pci.h> -#include <device/pci_ids.h> #include <soc/acpi.h> #include <soc/nvs.h> #include <soc/iomap.h> diff --git a/src/mainboard/supermicro/h8dmr_fam10/get_bus_conf.c b/src/mainboard/supermicro/h8dmr_fam10/get_bus_conf.c index 58b5ba4..0982138 100644 --- a/src/mainboard/supermicro/h8dmr_fam10/get_bus_conf.c +++ b/src/mainboard/supermicro/h8dmr_fam10/get_bus_conf.c @@ -17,7 +17,6 @@ #include <console/console.h> #include <device/pci.h> -#include <device/pci_ids.h> #include <string.h> #include <stdint.h> #include <cpu/amd/multicore.h> diff --git a/src/mainboard/supermicro/h8qme_fam10/get_bus_conf.c b/src/mainboard/supermicro/h8qme_fam10/get_bus_conf.c index b319558..280267e 100644 --- a/src/mainboard/supermicro/h8qme_fam10/get_bus_conf.c +++ b/src/mainboard/supermicro/h8qme_fam10/get_bus_conf.c @@ -17,7 +17,6 @@ #include <console/console.h> #include <device/pci.h> -#include <device/pci_ids.h> #include <string.h> #include <stdint.h> #include <cpu/amd/multicore.h> diff --git a/src/mainboard/supermicro/h8scm_fam10/acpi_tables.c b/src/mainboard/supermicro/h8scm_fam10/acpi_tables.c index 1d6e7cb..4b2095a 100644 --- a/src/mainboard/supermicro/h8scm_fam10/acpi_tables.c +++ b/src/mainboard/supermicro/h8scm_fam10/acpi_tables.c @@ -17,7 +17,6 @@ #include <arch/acpi.h> #include <arch/ioapic.h> #include <device/pci.h> -#include <device/pci_ids.h> #include <cpu/amd/amdfam10_sysconf.h> #include "mb_sysconf.h" diff --git a/src/mainboard/supermicro/h8scm_fam10/get_bus_conf.c b/src/mainboard/supermicro/h8scm_fam10/get_bus_conf.c index 3410673..bab194f 100644 --- a/src/mainboard/supermicro/h8scm_fam10/get_bus_conf.c +++ b/src/mainboard/supermicro/h8scm_fam10/get_bus_conf.c @@ -14,7 +14,6 @@ */ #include <device/pci.h> -#include <device/pci_ids.h> #include <string.h> #include <stdint.h> #include <stdlib.h> diff --git a/src/mainboard/supermicro/h8scm_fam10/romstage.c b/src/mainboard/supermicro/h8scm_fam10/romstage.c index 3eeaeda..0ad1218 100644 --- a/src/mainboard/supermicro/h8scm_fam10/romstage.c +++ b/src/mainboard/supermicro/h8scm_fam10/romstage.c @@ -23,7 +23,6 @@ #include <stdint.h> #include <string.h> #include <device/pci_def.h> -#include <device/pci_ids.h> #include <arch/io.h> #include <arch/cpu.h> #include <device/pnp_def.h> diff --git a/src/mainboard/tyan/s2912_fam10/get_bus_conf.c b/src/mainboard/tyan/s2912_fam10/get_bus_conf.c index 7164940..9f95b65 100644 --- a/src/mainboard/tyan/s2912_fam10/get_bus_conf.c +++ b/src/mainboard/tyan/s2912_fam10/get_bus_conf.c @@ -17,7 +17,6 @@ #include <console/console.h> #include <device/pci.h> -#include <device/pci_ids.h> #include <string.h> #include <stdint.h> #include <cpu/amd/multicore.h> diff --git a/src/mainboard/tyan/s2912_fam10/romstage.c b/src/mainboard/tyan/s2912_fam10/romstage.c index 1734b3a..746ffd6 100644 --- a/src/mainboard/tyan/s2912_fam10/romstage.c +++ b/src/mainboard/tyan/s2912_fam10/romstage.c @@ -21,7 +21,6 @@ #include <stdint.h> #include <string.h> #include <device/pci_def.h> -#include <device/pci_ids.h> #include <arch/io.h> #include <arch/cpu.h> #include <device/pnp_def.h> diff --git a/src/mainboard/via/epia-m850/romstage.c b/src/mainboard/via/epia-m850/romstage.c index dd303b7..d9ed0e6 100644 --- a/src/mainboard/via/epia-m850/romstage.c +++ b/src/mainboard/via/epia-m850/romstage.c @@ -19,7 +19,6 @@ */ #include <stdint.h> #include <device/pci_def.h> -#include <device/pci_ids.h> #include <arch/io.h> #include <device/pnp_def.h> #include <console/console.h> diff --git a/src/northbridge/amd/amdfam10/get_pci1234.c b/src/northbridge/amd/amdfam10/get_pci1234.c index fee31b6..d9dd2ce 100644 --- a/src/northbridge/amd/amdfam10/get_pci1234.c +++ b/src/northbridge/amd/amdfam10/get_pci1234.c @@ -14,7 +14,6 @@ */ #include <device/pci.h> -#include <device/pci_ids.h> #include <string.h> #include <stdint.h> diff --git a/src/northbridge/amd/amdht/comlib.c b/src/northbridge/amd/amdht/comlib.c index 85cbbc4..7d9a547 100644 --- a/src/northbridge/amd/amdht/comlib.c +++ b/src/northbridge/amd/amdht/comlib.c @@ -21,7 +21,6 @@ #include <console/console.h> #include <cpu/amd/msr.h> #include <device/pci_def.h> -#include <device/pci_ids.h> /* diff --git a/src/northbridge/amd/amdht/h3finit.c b/src/northbridge/amd/amdht/h3finit.c index ee1a4d4..436cb59 100644 --- a/src/northbridge/amd/amdht/h3finit.c +++ b/src/northbridge/amd/amdht/h3finit.c @@ -33,7 +33,6 @@ #include <cpu/x86/lapic_def.h> #include <cpu/amd/msr.h> #include <device/pci_def.h> -#include <device/pci_ids.h> #include <northbridge/amd/amdfam10/raminit.h> #include <northbridge/amd/amdfam10/amdfam10.h> diff --git a/src/northbridge/amd/amdht/h3ncmn.c b/src/northbridge/amd/amdht/h3ncmn.c index abb7458..8370b58 100644 --- a/src/northbridge/amd/amdht/h3ncmn.c +++ b/src/northbridge/amd/amdht/h3ncmn.c @@ -32,7 +32,6 @@ #include <device/pci.h> #include <cpu/amd/msr.h> #include <device/pci_def.h> -#include <device/pci_ids.h> #include <northbridge/amd/amdfam10/raminit.h> #include <northbridge/amd/amdfam10/amdfam10.h> diff --git a/src/northbridge/amd/lx/northbridgeinit.c b/src/northbridge/amd/lx/northbridgeinit.c index c7db156..9655c0e 100644 --- a/src/northbridge/amd/lx/northbridgeinit.c +++ b/src/northbridge/amd/lx/northbridgeinit.c @@ -19,7 +19,6 @@ #include <stdint.h> #include <device/device.h> #include <device/pci.h> -#include <device/pci_ids.h> #include <stdlib.h> #include <string.h> #include "northbridge.h" diff --git a/src/northbridge/intel/gm45/acpi.c b/src/northbridge/intel/gm45/acpi.c index 673478c..467c6c1 100644 --- a/src/northbridge/intel/gm45/acpi.c +++ b/src/northbridge/intel/gm45/acpi.c @@ -21,7 +21,6 @@ #include <arch/acpigen.h> #include <device/device.h> #include <device/pci.h> -#include <device/pci_ids.h> #include "gm45.h" unsigned long acpi_fill_mcfg(unsigned long current) diff --git a/src/northbridge/intel/gm45/northbridge.c b/src/northbridge/intel/gm45/northbridge.c index a001a67..a04f7f3 100644 --- a/src/northbridge/intel/gm45/northbridge.c +++ b/src/northbridge/intel/gm45/northbridge.c @@ -19,7 +19,6 @@ #include <stdint.h> #include <device/device.h> #include <device/pci.h> -#include <device/pci_ids.h> #include <stdlib.h> #include <string.h> #include <cpu/cpu.h> diff --git a/src/northbridge/intel/haswell/acpi.c b/src/northbridge/intel/haswell/acpi.c index b3ceed9..a73432a 100644 --- a/src/northbridge/intel/haswell/acpi.c +++ b/src/northbridge/intel/haswell/acpi.c @@ -20,7 +20,6 @@ #include <arch/acpi.h> #include <device/device.h> #include <device/pci.h> -#include <device/pci_ids.h> #include "haswell.h" #include <southbridge/intel/lynxpoint/pch.h> diff --git a/src/northbridge/intel/i945/acpi.c b/src/northbridge/intel/i945/acpi.c index 0ce7e4b..c36044f 100644 --- a/src/northbridge/intel/i945/acpi.c +++ b/src/northbridge/intel/i945/acpi.c @@ -20,7 +20,6 @@ #include <arch/acpigen.h> #include <device/device.h> #include <device/pci.h> -#include <device/pci_ids.h> #include "i945.h" unsigned long acpi_fill_mcfg(unsigned long current) diff --git a/src/northbridge/intel/nehalem/acpi.c b/src/northbridge/intel/nehalem/acpi.c index 7a106c9..08fc09c 100644 --- a/src/northbridge/intel/nehalem/acpi.c +++ b/src/northbridge/intel/nehalem/acpi.c @@ -21,7 +21,6 @@ #include <types.h> #include <device/device.h> #include <device/pci.h> -#include <device/pci_ids.h> #include "nehalem.h" unsigned long acpi_fill_mcfg(unsigned long current) diff --git a/src/northbridge/intel/pineview/northbridge.c b/src/northbridge/intel/pineview/northbridge.c index 192c24e..33e8089 100644 --- a/src/northbridge/intel/pineview/northbridge.c +++ b/src/northbridge/intel/pineview/northbridge.c @@ -20,7 +20,6 @@ #include <stdint.h> #include <device/device.h> #include <device/pci.h> -#include <device/pci_ids.h> #include <stdlib.h> #include <string.h> #include <cpu/cpu.h> diff --git a/src/northbridge/intel/sandybridge/acpi.c b/src/northbridge/intel/sandybridge/acpi.c index 88ac2b1..0a31c85 100644 --- a/src/northbridge/intel/sandybridge/acpi.c +++ b/src/northbridge/intel/sandybridge/acpi.c @@ -20,7 +20,6 @@ #include <arch/acpi.h> #include <device/device.h> #include <device/pci.h> -#include <device/pci_ids.h> #include "sandybridge.h" #include <southbridge/intel/bd82x6x/pch.h> diff --git a/src/northbridge/intel/sandybridge/common.c b/src/northbridge/intel/sandybridge/common.c index 72b5603..8bfd476 100644 --- a/src/northbridge/intel/sandybridge/common.c +++ b/src/northbridge/intel/sandybridge/common.c @@ -19,7 +19,6 @@ #include <console/console.h> #include <device/device.h> #include <device/pci.h> -#include <device/pci_ids.h> #include "sandybridge.h" enum platform_type get_platform_type(void) diff --git a/src/northbridge/intel/x4x/acpi.c b/src/northbridge/intel/x4x/acpi.c index 0f235a4..1b016bc 100644 --- a/src/northbridge/intel/x4x/acpi.c +++ b/src/northbridge/intel/x4x/acpi.c @@ -22,7 +22,6 @@ #include <arch/acpigen.h> #include <device/device.h> #include <device/pci.h> -#include <device/pci_ids.h> #include "x4x.h" unsigned long acpi_fill_mcfg(unsigned long current) diff --git a/src/northbridge/intel/x4x/northbridge.c b/src/northbridge/intel/x4x/northbridge.c index d6094ac..af3019c 100644 --- a/src/northbridge/intel/x4x/northbridge.c +++ b/src/northbridge/intel/x4x/northbridge.c @@ -20,7 +20,6 @@ #include <stdint.h> #include <device/device.h> #include <device/pci.h> -#include <device/pci_ids.h> #include <stdlib.h> #include <string.h> #include <cpu/cpu.h> diff --git a/src/soc/amd/stoneyridge/include/soc/southbridge.h b/src/soc/amd/stoneyridge/include/soc/southbridge.h index 32756cd..88aa7db 100644 --- a/src/soc/amd/stoneyridge/include/soc/southbridge.h +++ b/src/soc/amd/stoneyridge/include/soc/southbridge.h @@ -19,7 +19,6 @@ #include <arch/io.h> #include <types.h> -#include <device/pci_ids.h> #include <device/device.h> #include <device/pci_def.h> #include <soc/iomap.h> diff --git a/src/soc/intel/apollolake/lpc.c b/src/soc/intel/apollolake/lpc.c index 451aa73..a20b82a 100644 --- a/src/soc/intel/apollolake/lpc.c +++ b/src/soc/intel/apollolake/lpc.c @@ -16,7 +16,6 @@ #include <console/console.h> #include <device/pci.h> -#include <device/pci_ids.h> #include <intelblocks/lpc_lib.h> #include <intelblocks/rtc.h> #include <soc/gpio.h> diff --git a/src/soc/intel/baytrail/scc.c b/src/soc/intel/baytrail/scc.c index 7f97f09..a6b4fe3 100644 --- a/src/soc/intel/baytrail/scc.c +++ b/src/soc/intel/baytrail/scc.c @@ -18,7 +18,6 @@ #include <console/console.h> #include <device/device.h> #include <device/pci.h> -#include <device/pci_ids.h> #include <reg_script.h> #include <soc/iosf.h> diff --git a/src/soc/intel/baytrail/spi.c b/src/soc/intel/baytrail/spi.c index d81b878..d893816 100644 --- a/src/soc/intel/baytrail/spi.c +++ b/src/soc/intel/baytrail/spi.c @@ -21,7 +21,6 @@ #include <arch/io.h> #include <commonlib/helpers.h> #include <console/console.h> -#include <device/pci_ids.h> #include <spi_flash.h> #include <spi-generic.h> diff --git a/src/soc/intel/braswell/acpi.c b/src/soc/intel/braswell/acpi.c index 5c66ea1..efddc3b 100644 --- a/src/soc/intel/braswell/acpi.c +++ b/src/soc/intel/braswell/acpi.c @@ -28,7 +28,6 @@ #include <cpu/x86/smm.h> #include <cpu/x86/tsc.h> #include <device/pci.h> -#include <device/pci_ids.h> #include <ec/google/chromeec/ec.h> #include <drivers/intel/gma/opregion.h> #include <rules.h> diff --git a/src/soc/intel/braswell/scc.c b/src/soc/intel/braswell/scc.c index 17fc685..5c874e1 100644 --- a/src/soc/intel/braswell/scc.c +++ b/src/soc/intel/braswell/scc.c @@ -19,7 +19,6 @@ #include <console/console.h> #include <device/device.h> #include <device/pci.h> -#include <device/pci_ids.h> #include <soc/iosf.h> #include <soc/nvs.h> #include <soc/ramstage.h> diff --git a/src/soc/intel/braswell/spi.c b/src/soc/intel/braswell/spi.c index 0f42a90..a5f835d 100644 --- a/src/soc/intel/braswell/spi.c +++ b/src/soc/intel/braswell/spi.c @@ -19,7 +19,6 @@ #include <commonlib/helpers.h> #include <console/console.h> #include <delay.h> -#include <device/pci_ids.h> #include <rules.h> #include <soc/lpc.h> #include <soc/pci_devs.h> diff --git a/src/soc/intel/broadwell/me_status.c b/src/soc/intel/broadwell/me_status.c index 819e94c..3748701 100644 --- a/src/soc/intel/broadwell/me_status.c +++ b/src/soc/intel/broadwell/me_status.c @@ -16,7 +16,6 @@ #include <arch/io.h> #include <console/console.h> #include <device/pci.h> -#include <device/pci_ids.h> #include <stdlib.h> #include <string.h> #include <soc/pci_devs.h> diff --git a/src/soc/intel/broadwell/romstage/smbus.c b/src/soc/intel/broadwell/romstage/smbus.c index 3f9dcd0..fd886c4 100644 --- a/src/soc/intel/broadwell/romstage/smbus.c +++ b/src/soc/intel/broadwell/romstage/smbus.c @@ -15,7 +15,6 @@ */ #include <arch/io.h> -#include <device/pci_ids.h> #include <device/pci_def.h> #include <reg_script.h> #include <soc/iomap.h> diff --git a/src/soc/intel/broadwell/romstage/spi.c b/src/soc/intel/broadwell/romstage/spi.c index c4a5452..2fd1fc8 100644 --- a/src/soc/intel/broadwell/romstage/spi.c +++ b/src/soc/intel/broadwell/romstage/spi.c @@ -15,7 +15,6 @@ #include <arch/io.h> #include <console/console.h> -#include <device/pci_ids.h> #include <device/pci_def.h> #include <delay.h> #include <soc/spi.h> diff --git a/src/soc/intel/broadwell/smbus_common.c b/src/soc/intel/broadwell/smbus_common.c index bec988f..99ed55b 100644 --- a/src/soc/intel/broadwell/smbus_common.c +++ b/src/soc/intel/broadwell/smbus_common.c @@ -21,7 +21,6 @@ #include <device/path.h> #include <device/smbus_def.h> #include <device/pci.h> -#include <device/pci_ids.h> #include <soc/ramstage.h> #include <soc/smbus.h> diff --git a/src/soc/intel/broadwell/spi.c b/src/soc/intel/broadwell/spi.c index 2b2d603..2317c9a 100644 --- a/src/soc/intel/broadwell/spi.c +++ b/src/soc/intel/broadwell/spi.c @@ -20,7 +20,6 @@ #include <delay.h> #include <arch/io.h> #include <console/console.h> -#include <device/pci_ids.h> #include <spi_flash.h> #include <spi-generic.h> #include <soc/pci_devs.h> diff --git a/src/soc/intel/cannonlake/bootblock/pch.c b/src/soc/intel/cannonlake/bootblock/pch.c index b06c81b..73e159a 100644 --- a/src/soc/intel/cannonlake/bootblock/pch.c +++ b/src/soc/intel/cannonlake/bootblock/pch.c @@ -16,7 +16,6 @@ #include <console/console.h> #include <device/device.h> -#include <device/pci_ids.h> #include <intelblocks/fast_spi.h> #include <intelblocks/gspi.h> #include <intelblocks/lpc_lib.h> diff --git a/src/soc/intel/cannonlake/lpc.c b/src/soc/intel/cannonlake/lpc.c index 0195cef..c33b3c3 100644 --- a/src/soc/intel/cannonlake/lpc.c +++ b/src/soc/intel/cannonlake/lpc.c @@ -19,7 +19,6 @@ #include <delay.h> #include <device/device.h> #include <device/pci.h> -#include <device/pci_ids.h> #include <pc80/isa-dma.h> #include <pc80/i8259.h> #include <arch/io.h> diff --git a/src/soc/intel/fsp_baytrail/acpi.c b/src/soc/intel/fsp_baytrail/acpi.c index fb14af9..8fcbb52 100644 --- a/src/soc/intel/fsp_baytrail/acpi.c +++ b/src/soc/intel/fsp_baytrail/acpi.c @@ -29,7 +29,6 @@ #include <device/device.h> #include <device/pci.h> #include <soc/baytrail.h> -#include <device/pci_ids.h> #include <soc/pci_devs.h> #include <soc/acpi.h> #include <string.h> diff --git a/src/soc/intel/fsp_baytrail/include/soc/i2c.h b/src/soc/intel/fsp_baytrail/include/soc/i2c.h index 4efb9bd..7ac5f8f 100644 --- a/src/soc/intel/fsp_baytrail/include/soc/i2c.h +++ b/src/soc/intel/fsp_baytrail/include/soc/i2c.h @@ -18,7 +18,6 @@ #include <arch/io.h> #include <console/console.h> -#include <device/pci_ids.h> #include <device/pci_def.h> #include <stdlib.h> diff --git a/src/soc/intel/fsp_baytrail/spi.c b/src/soc/intel/fsp_baytrail/spi.c index 26d2281..4537bcc 100644 --- a/src/soc/intel/fsp_baytrail/spi.c +++ b/src/soc/intel/fsp_baytrail/spi.c @@ -22,7 +22,6 @@ #include <delay.h> #include <arch/io.h> #include <console/console.h> -#include <device/pci_ids.h> #include <spi_flash.h> #include <spi-generic.h> diff --git a/src/soc/intel/fsp_broadwell_de/smbus_common.c b/src/soc/intel/fsp_broadwell_de/smbus_common.c index 20e8f09..e179b55 100644 --- a/src/soc/intel/fsp_broadwell_de/smbus_common.c +++ b/src/soc/intel/fsp_broadwell_de/smbus_common.c @@ -21,7 +21,6 @@ #include <device/path.h> #include <device/smbus_def.h> #include <device/pci.h> -#include <device/pci_ids.h> #include <soc/ramstage.h> #include <soc/smbus.h> diff --git a/src/soc/intel/icelake/bootblock/pch.c b/src/soc/intel/icelake/bootblock/pch.c index 5268856..28d669a 100644 --- a/src/soc/intel/icelake/bootblock/pch.c +++ b/src/soc/intel/icelake/bootblock/pch.c @@ -15,7 +15,6 @@ #include <console/console.h> #include <device/device.h> -#include <device/pci_ids.h> #include <intelblocks/fast_spi.h> #include <intelblocks/gspi.h> #include <intelblocks/lpc_lib.h> diff --git a/src/soc/intel/icelake/lpc.c b/src/soc/intel/icelake/lpc.c index 9bf1b78..422ba1e 100644 --- a/src/soc/intel/icelake/lpc.c +++ b/src/soc/intel/icelake/lpc.c @@ -18,7 +18,6 @@ #include <delay.h> #include <device/device.h> #include <device/pci.h> -#include <device/pci_ids.h> #include <pc80/isa-dma.h> #include <pc80/i8259.h> #include <arch/io.h> diff --git a/src/soc/intel/quark/i2c.c b/src/soc/intel/quark/i2c.c index 2a194af..a3bfb3b 100644 --- a/src/soc/intel/quark/i2c.c +++ b/src/soc/intel/quark/i2c.c @@ -19,7 +19,6 @@ #include <device/device.h> #include <device/i2c_simple.h> #include <device/pci.h> -#include <device/pci_ids.h> #include <soc/i2c.h> #include <soc/ramstage.h> #include <soc/reg_access.h> diff --git a/src/soc/intel/quark/romstage/pcie.c b/src/soc/intel/quark/romstage/pcie.c index bdc3902..dc54a32 100644 --- a/src/soc/intel/quark/romstage/pcie.c +++ b/src/soc/intel/quark/romstage/pcie.c @@ -15,7 +15,6 @@ #include <delay.h> #include <device/device.h> -#include <device/pci_ids.h> #include <soc/pci_devs.h> #include <soc/reg_access.h> #include <soc/romstage.h> diff --git a/src/soc/intel/skylake/lpc.c b/src/soc/intel/skylake/lpc.c index 73757f2..8d97822 100644 --- a/src/soc/intel/skylake/lpc.c +++ b/src/soc/intel/skylake/lpc.c @@ -19,7 +19,6 @@ #include <delay.h> #include <device/device.h> #include <device/pci.h> -#include <device/pci_ids.h> #include <pc80/isa-dma.h> #include <pc80/i8259.h> #include <arch/io.h> diff --git a/src/soc/intel/skylake/me.c b/src/soc/intel/skylake/me.c index 6baa568..64a94ab 100644 --- a/src/soc/intel/skylake/me.c +++ b/src/soc/intel/skylake/me.c @@ -18,7 +18,6 @@ #include <commonlib/helpers.h> #include <console/console.h> #include <device/pci.h> -#include <device/pci_ids.h> #include <intelblocks/cse.h> #include <soc/iomap.h> #include <soc/me.h> diff --git a/src/southbridge/amd/agesa/hudson/bootblock.c b/src/southbridge/amd/agesa/hudson/bootblock.c index 32b1298..bb6a54b 100644 --- a/src/southbridge/amd/agesa/hudson/bootblock.c +++ b/src/southbridge/amd/agesa/hudson/bootblock.c @@ -15,7 +15,6 @@ #include <stdint.h> #include <arch/io.h> -#include <device/pci_ids.h> /* * Enable 4MB (LPC) ROM access at 0xFFC00000 - 0xFFFFFFFF. diff --git a/src/southbridge/amd/agesa/hudson/hudson.h b/src/southbridge/amd/agesa/hudson/hudson.h index 165d33f..bd49e8f 100644 --- a/src/southbridge/amd/agesa/hudson/hudson.h +++ b/src/southbridge/amd/agesa/hudson/hudson.h @@ -17,7 +17,6 @@ #ifndef HUDSON_H #define HUDSON_H -#include <device/pci_ids.h> #include <device/device.h> #include "chip.h" diff --git a/src/southbridge/amd/pi/hudson/hudson.h b/src/southbridge/amd/pi/hudson/hudson.h index 922c608..27ae4ed 100644 --- a/src/southbridge/amd/pi/hudson/hudson.h +++ b/src/southbridge/amd/pi/hudson/hudson.h @@ -18,7 +18,6 @@ #define HUDSON_H #include <types.h> -#include <device/pci_ids.h> #include <device/device.h> #include "chip.h" diff --git a/src/southbridge/amd/rs780/cmn.c b/src/southbridge/amd/rs780/cmn.c index 23cd877..16270d6 100644 --- a/src/southbridge/amd/rs780/cmn.c +++ b/src/southbridge/amd/rs780/cmn.c @@ -18,7 +18,6 @@ #include <arch/cpu.h> #include <device/device.h> #include <device/pci.h> -#include <device/pci_ids.h> #include <device/pci_ops.h> #include <cpu/x86/msr.h> #include <cpu/amd/mtrr.h> diff --git a/src/southbridge/amd/rs780/pcie.c b/src/southbridge/amd/rs780/pcie.c index adf5401..437a62a 100644 --- a/src/southbridge/amd/rs780/pcie.c +++ b/src/southbridge/amd/rs780/pcie.c @@ -16,7 +16,6 @@ #include <console/console.h> #include <device/device.h> #include <device/pci.h> -#include <device/pci_ids.h> #include <device/pci_ops.h> #include <delay.h> #include "rs780.h" diff --git a/src/southbridge/amd/rs780/rs780.c b/src/southbridge/amd/rs780/rs780.c index 3c9393d..36b37cc 100644 --- a/src/southbridge/amd/rs780/rs780.c +++ b/src/southbridge/amd/rs780/rs780.c @@ -18,7 +18,6 @@ #include <arch/acpi.h> #include <device/device.h> #include <device/pci.h> -#include <device/pci_ids.h> #include <device/pci_ops.h> #include <cpu/x86/msr.h> #include <cpu/amd/mtrr.h> diff --git a/src/southbridge/amd/rs780/rs780.h b/src/southbridge/amd/rs780/rs780.h index e96608e..354555f 100644 --- a/src/southbridge/amd/rs780/rs780.h +++ b/src/southbridge/amd/rs780/rs780.h @@ -18,7 +18,6 @@ #include <rules.h> #include <stdint.h> -#include <device/pci_ids.h> #include "chip.h" #include "rev.h" diff --git a/src/southbridge/amd/sb700/bootblock.c b/src/southbridge/amd/sb700/bootblock.c index e77db5c..364fa01 100644 --- a/src/southbridge/amd/sb700/bootblock.c +++ b/src/southbridge/amd/sb700/bootblock.c @@ -16,7 +16,6 @@ #include <stdint.h> #include <arch/io.h> -#include <device/pci_ids.h> #define IO_MEM_PORT_DECODE_ENABLE_5 0x48 #define IO_MEM_PORT_DECODE_ENABLE_6 0x4a diff --git a/src/southbridge/amd/sb700/sb700.h b/src/southbridge/amd/sb700/sb700.h index 73c0b37..0b638f6 100644 --- a/src/southbridge/amd/sb700/sb700.h +++ b/src/southbridge/amd/sb700/sb700.h @@ -17,7 +17,6 @@ #ifndef SB700_H #define SB700_H -#include <device/pci_ids.h> #include "chip.h" /* Power management index/data registers */ diff --git a/src/southbridge/amd/sb800/bootblock.c b/src/southbridge/amd/sb800/bootblock.c index e95d4e9..b08d477 100644 --- a/src/southbridge/amd/sb800/bootblock.c +++ b/src/southbridge/amd/sb800/bootblock.c @@ -15,7 +15,6 @@ #include <stdint.h> #include <arch/io.h> -#include <device/pci_ids.h> /* * Enable 4MB (LPC) ROM access at 0xFFC00000 - 0xFFFFFFFF. diff --git a/src/southbridge/amd/sb800/sb800.h b/src/southbridge/amd/sb800/sb800.h index a65c68a9..3715a3a 100644 --- a/src/southbridge/amd/sb800/sb800.h +++ b/src/southbridge/amd/sb800/sb800.h @@ -17,7 +17,6 @@ #ifndef SB800_H #define SB800_H -#include <device/pci_ids.h> #include "chip.h" /* Power management index/data registers */ diff --git a/src/southbridge/amd/sr5650/pcie.c b/src/southbridge/amd/sr5650/pcie.c index 159f3e4..f2fd539 100644 --- a/src/southbridge/amd/sr5650/pcie.c +++ b/src/southbridge/amd/sr5650/pcie.c @@ -17,7 +17,6 @@ #include <console/console.h> #include <device/device.h> #include <device/pci.h> -#include <device/pci_ids.h> #include <device/pci_ops.h> #include <delay.h> #include "sr5650.h" diff --git a/src/southbridge/amd/sr5650/sr5650.h b/src/southbridge/amd/sr5650/sr5650.h index 2e6b728..06a4279 100644 --- a/src/southbridge/amd/sr5650/sr5650.h +++ b/src/southbridge/amd/sr5650/sr5650.h @@ -19,7 +19,6 @@ #include <stdint.h> #include <arch/acpi.h> -#include <device/pci_ids.h> #include "chip.h" #include "rev.h" diff --git a/src/southbridge/intel/bd82x6x/early_me.c b/src/southbridge/intel/bd82x6x/early_me.c index bda139b..ee149d0 100644 --- a/src/southbridge/intel/bd82x6x/early_me.c +++ b/src/southbridge/intel/bd82x6x/early_me.c @@ -17,7 +17,6 @@ #include <arch/io.h> #include <console/console.h> #include <delay.h> -#include <device/pci_ids.h> #include <device/pci_def.h> #include <halt.h> #include <string.h> diff --git a/src/southbridge/intel/bd82x6x/early_me_mrc.c b/src/southbridge/intel/bd82x6x/early_me_mrc.c index a6562c7..ed27573 100644 --- a/src/southbridge/intel/bd82x6x/early_me_mrc.c +++ b/src/southbridge/intel/bd82x6x/early_me_mrc.c @@ -17,7 +17,6 @@ #include <arch/io.h> #include <console/console.h> #include <delay.h> -#include <device/pci_ids.h> #include <device/pci_def.h> #include <halt.h> #include <string.h> diff --git a/src/southbridge/intel/bd82x6x/early_smbus.c b/src/southbridge/intel/bd82x6x/early_smbus.c index 4c67aea..3cd98ac 100644 --- a/src/southbridge/intel/bd82x6x/early_smbus.c +++ b/src/southbridge/intel/bd82x6x/early_smbus.c @@ -16,7 +16,6 @@ #include <arch/io.h> #include <console/console.h> -#include <device/pci_ids.h> #include <device/pci_def.h> #include <southbridge/intel/common/smbus.h> #include "pch.h" diff --git a/src/southbridge/intel/bd82x6x/early_spi.c b/src/southbridge/intel/bd82x6x/early_spi.c index 1400837..e3f07ad 100644 --- a/src/southbridge/intel/bd82x6x/early_spi.c +++ b/src/southbridge/intel/bd82x6x/early_spi.c @@ -16,7 +16,6 @@ #include <arch/io.h> #include <console/console.h> -#include <device/pci_ids.h> #include <device/pci_def.h> #include <delay.h> #include "pch.h" diff --git a/src/southbridge/intel/bd82x6x/early_usb.c b/src/southbridge/intel/bd82x6x/early_usb.c index 1044953..c34b3ec 100644 --- a/src/southbridge/intel/bd82x6x/early_usb.c +++ b/src/southbridge/intel/bd82x6x/early_usb.c @@ -15,7 +15,6 @@ */ #include <arch/io.h> -#include <device/pci_ids.h> #include <device/pci_def.h> #include <northbridge/intel/sandybridge/sandybridge.h> #include "pch.h" diff --git a/src/southbridge/intel/bd82x6x/early_usb_mrc.c b/src/southbridge/intel/bd82x6x/early_usb_mrc.c index 8006d95..e4fadad 100644 --- a/src/southbridge/intel/bd82x6x/early_usb_mrc.c +++ b/src/southbridge/intel/bd82x6x/early_usb_mrc.c @@ -15,7 +15,6 @@ */ #include <arch/io.h> -#include <device/pci_ids.h> #include <device/pci_def.h> #include "pch.h" diff --git a/src/southbridge/intel/common/spi.c b/src/southbridge/intel/common/spi.c index fe3bf2a..3ca0d6c 100644 --- a/src/southbridge/intel/common/spi.c +++ b/src/southbridge/intel/common/spi.c @@ -25,7 +25,6 @@ #include <delay.h> #include <arch/io.h> #include <console/console.h> -#include <device/pci_ids.h> #include <device/pci.h> #include <spi_flash.h> diff --git a/src/southbridge/intel/fsp_rangeley/early_smbus.c b/src/southbridge/intel/fsp_rangeley/early_smbus.c index 84b750e..9b47837 100644 --- a/src/southbridge/intel/fsp_rangeley/early_smbus.c +++ b/src/southbridge/intel/fsp_rangeley/early_smbus.c @@ -16,7 +16,6 @@ #include <arch/io.h> #include <console/console.h> -#include <device/pci_ids.h> #include <device/pci_def.h> #include <southbridge/intel/common/smbus.h> #include "soc.h" diff --git a/src/southbridge/intel/fsp_rangeley/early_spi.c b/src/southbridge/intel/fsp_rangeley/early_spi.c index dbf6003..3c4f2d7 100644 --- a/src/southbridge/intel/fsp_rangeley/early_spi.c +++ b/src/southbridge/intel/fsp_rangeley/early_spi.c @@ -16,7 +16,6 @@ #include <arch/io.h> #include <console/console.h> -#include <device/pci_ids.h> #include <device/pci_def.h> #include <delay.h> #include "soc.h" diff --git a/src/southbridge/intel/fsp_rangeley/early_usb.c b/src/southbridge/intel/fsp_rangeley/early_usb.c index 3bb8dab..0bcd09d 100644 --- a/src/southbridge/intel/fsp_rangeley/early_usb.c +++ b/src/southbridge/intel/fsp_rangeley/early_usb.c @@ -15,7 +15,6 @@ */ #include <arch/io.h> -#include <device/pci_ids.h> #include <device/pci_def.h> #include "soc.h" diff --git a/src/southbridge/intel/i82371eb/acpi_tables.c b/src/southbridge/intel/i82371eb/acpi_tables.c index 9a720e2..7c6d3b4 100644 --- a/src/southbridge/intel/i82371eb/acpi_tables.c +++ b/src/southbridge/intel/i82371eb/acpi_tables.c @@ -21,7 +21,6 @@ #include <arch/acpigen.h> #include <arch/smp/mpspec.h> #include <device/device.h> -#include <device/pci_ids.h> #include "i82371eb.h" static int determine_total_number_of_cores(void) diff --git a/src/southbridge/intel/i82801dx/i82801dx.c b/src/southbridge/intel/i82801dx/i82801dx.c index fc38207..8db591c 100644 --- a/src/southbridge/intel/i82801dx/i82801dx.c +++ b/src/southbridge/intel/i82801dx/i82801dx.c @@ -16,7 +16,6 @@ #include <device/device.h> #include <device/pci.h> -#include <device/pci_ids.h> #include "i82801dx.h" void i82801dx_enable(struct device *dev) diff --git a/src/southbridge/intel/i82801gx/early_smbus.c b/src/southbridge/intel/i82801gx/early_smbus.c index bb5caf5..698458b 100644 --- a/src/southbridge/intel/i82801gx/early_smbus.c +++ b/src/southbridge/intel/i82801gx/early_smbus.c @@ -16,7 +16,6 @@ #include <arch/io.h> #include <console/console.h> -#include <device/pci_ids.h> #include <device/pci_def.h> #include <southbridge/intel/common/smbus.h> #include "i82801gx.h" diff --git a/src/southbridge/intel/i82801ix/early_smbus.c b/src/southbridge/intel/i82801ix/early_smbus.c index 0e4195c..0dda0c8 100644 --- a/src/southbridge/intel/i82801ix/early_smbus.c +++ b/src/southbridge/intel/i82801ix/early_smbus.c @@ -17,7 +17,6 @@ #include <arch/io.h> #include <console/console.h> -#include <device/pci_ids.h> #include <device/pci_def.h> #include <southbridge/intel/common/smbus.h> #include "i82801ix.h" diff --git a/src/southbridge/intel/i82801jx/early_smbus.c b/src/southbridge/intel/i82801jx/early_smbus.c index 16932e0..bd68955 100644 --- a/src/southbridge/intel/i82801jx/early_smbus.c +++ b/src/southbridge/intel/i82801jx/early_smbus.c @@ -17,7 +17,6 @@ #include <arch/io.h> #include <console/console.h> -#include <device/pci_ids.h> #include <device/pci_def.h> #include <southbridge/intel/common/smbus.h> #include "i82801jx.h" diff --git a/src/southbridge/intel/ibexpeak/early_smbus.c b/src/southbridge/intel/ibexpeak/early_smbus.c index b7823eb..8760a82 100644 --- a/src/southbridge/intel/ibexpeak/early_smbus.c +++ b/src/southbridge/intel/ibexpeak/early_smbus.c @@ -16,7 +16,6 @@ #include <arch/io.h> #include <console/console.h> -#include <device/pci_ids.h> #include <device/pci_def.h> #include <southbridge/intel/common/smbus.h> #include "pch.h" diff --git a/src/southbridge/intel/ibexpeak/madt.c b/src/southbridge/intel/ibexpeak/madt.c index e02cd88..585df93 100644 --- a/src/southbridge/intel/ibexpeak/madt.c +++ b/src/southbridge/intel/ibexpeak/madt.c @@ -23,7 +23,6 @@ #include <arch/smp/mpspec.h> #include <device/device.h> #include <device/pci.h> -#include <device/pci_ids.h> unsigned long acpi_fill_madt(unsigned long current) { diff --git a/src/southbridge/intel/lynxpoint/early_me.c b/src/southbridge/intel/lynxpoint/early_me.c index 674534f..e02a16c 100644 --- a/src/southbridge/intel/lynxpoint/early_me.c +++ b/src/southbridge/intel/lynxpoint/early_me.c @@ -17,7 +17,6 @@ #include <arch/io.h> #include <console/console.h> #include <delay.h> -#include <device/pci_ids.h> #include <halt.h> #include <string.h> #include "me.h" diff --git a/src/southbridge/intel/lynxpoint/early_smbus.c b/src/southbridge/intel/lynxpoint/early_smbus.c index 4c67aea..3cd98ac 100644 --- a/src/southbridge/intel/lynxpoint/early_smbus.c +++ b/src/southbridge/intel/lynxpoint/early_smbus.c @@ -16,7 +16,6 @@ #include <arch/io.h> #include <console/console.h> -#include <device/pci_ids.h> #include <device/pci_def.h> #include <southbridge/intel/common/smbus.h> #include "pch.h" diff --git a/src/southbridge/intel/lynxpoint/early_spi.c b/src/southbridge/intel/lynxpoint/early_spi.c index 1400837..e3f07ad 100644 --- a/src/southbridge/intel/lynxpoint/early_spi.c +++ b/src/southbridge/intel/lynxpoint/early_spi.c @@ -16,7 +16,6 @@ #include <arch/io.h> #include <console/console.h> -#include <device/pci_ids.h> #include <device/pci_def.h> #include <delay.h> #include "pch.h" diff --git a/src/southbridge/intel/lynxpoint/early_usb.c b/src/southbridge/intel/lynxpoint/early_usb.c index 60ab09d..4b44716 100644 --- a/src/southbridge/intel/lynxpoint/early_usb.c +++ b/src/southbridge/intel/lynxpoint/early_usb.c @@ -15,7 +15,6 @@ */ #include <arch/io.h> -#include <device/pci_ids.h> #include <device/pci_def.h> #include "pch.h" diff --git a/src/southbridge/ti/pci7420/cardbus.c b/src/southbridge/ti/pci7420/cardbus.c index 910b0c8..3c88529 100644 --- a/src/southbridge/ti/pci7420/cardbus.c +++ b/src/southbridge/ti/pci7420/cardbus.c @@ -18,7 +18,6 @@ #include <device/device.h> #include <device/pci.h> #include <device/pci_ops.h> -#include <device/pci_ids.h> #include <console/console.h> #include <device/cardbus.h> #include "pci7420.h" diff --git a/src/southbridge/ti/pci7420/firewire.c b/src/southbridge/ti/pci7420/firewire.c index e42b6a6..1379d59 100644 --- a/src/southbridge/ti/pci7420/firewire.c +++ b/src/southbridge/ti/pci7420/firewire.c @@ -18,7 +18,6 @@ #include <device/device.h> #include <device/pci.h> #include <device/pci_ops.h> -#include <device/pci_ids.h> #include <console/console.h> #include <device/cardbus.h> #include "pci7420.h" diff --git a/src/southbridge/ti/pcixx12/pcixx12.c b/src/southbridge/ti/pcixx12/pcixx12.c index ab7231e..6385ba9 100644 --- a/src/southbridge/ti/pcixx12/pcixx12.c +++ b/src/southbridge/ti/pcixx12/pcixx12.c @@ -17,7 +17,6 @@ #include <device/device.h> #include <device/pci.h> #include <device/pci_ops.h> -#include <device/pci_ids.h> #include <console/console.h> #include <device/cardbus.h> -- To view, visit https://review.coreboot.org/c/coreboot/+/30120 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia640131479d4221ccd84613033f28de3932b8bff Gerrit-Change-Number: 30120 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-MessageType: newchange

1 0

Change in ...coreboot[master]: [WIP]arch/x86: Support x86_64 exceptions
by build bot (Jenkins) (Code Review) 09 Dec '18

09 Dec '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/30117 ) Change subject: [WIP]arch/x86: Support x86_64 exceptions ...................................................................... Patch Set 3: (2 comments) https://review.coreboot.org/#/c/30117/3/src/arch/x86/include/arch/registers… File src/arch/x86/include/arch/registers.h: https://review.coreboot.org/#/c/30117/3/src/arch/x86/include/arch/registers… PS3, Line 23: #define DOWNTO8(A) \ macros should not use a trailing semicolon https://review.coreboot.org/#/c/30117/3/src/arch/x86/include/arch/registers… PS3, Line 41: #define DOWNTO16(A) \ macros should not use a trailing semicolon -- To view, visit https://review.coreboot.org/c/coreboot/+/30117 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Idd12c90a95cc2989eb9b2a718740a84222193f48 Gerrit-Change-Number: 30117 Gerrit-PatchSet: 3 Gerrit-Owner: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Sun, 09 Dec 2018 14:57:24 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

1 0

Change in ...coreboot[master]: [WIP]pci_drivers/cpu_drivers: Fix constructed arrays on 64bit platforms
by build bot (Jenkins) (Code Review) 09 Dec '18

09 Dec '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/30116 ) Change subject: [WIP]pci_drivers/cpu_drivers: Fix constructed arrays on 64bit platforms ...................................................................... Patch Set 3: (14 comments) https://review.coreboot.org/#/c/30116/3/src/arch/arm/include/armv7/arch/cpu… File src/arch/arm/include/armv7/arch/cpu.h: https://review.coreboot.org/#/c/30116/3/src/arch/arm/include/armv7/arch/cpu… PS3, Line 29: } __attribute__ ((aligned (CONFIG_DRIVER_ALIGN))); space prohibited between function name and open parenthesis '(' https://review.coreboot.org/#/c/30116/3/src/arch/arm/include/armv7/arch/cpu… PS3, Line 30: _Static_assert(sizeof(struct cpu_driver) <= CONFIG_DRIVER_ALIGN, \ Avoid unnecessary line continuations https://review.coreboot.org/#/c/30116/3/src/arch/arm64/include/armv8/arch/c… File src/arch/arm64/include/armv8/arch/cpu.h: https://review.coreboot.org/#/c/30116/3/src/arch/arm64/include/armv8/arch/c… PS3, Line 26: struct cpu_driver { } __attribute__ ((aligned (CONFIG_DRIVER_ALIGN))); space prohibited between function name and open parenthesis '(' https://review.coreboot.org/#/c/30116/3/src/arch/arm64/include/armv8/arch/c… PS3, Line 27: _Static_assert(sizeof(struct cpu_driver) <= CONFIG_DRIVER_ALIGN, \ Avoid unnecessary line continuations https://review.coreboot.org/#/c/30116/3/src/arch/mips/include/arch/cpu.h File src/arch/mips/include/arch/cpu.h: https://review.coreboot.org/#/c/30116/3/src/arch/mips/include/arch/cpu.h@28 PS3, Line 28: } __attribute__ ((aligned (CONFIG_DRIVER_ALIGN))); space prohibited between function name and open parenthesis '(' https://review.coreboot.org/#/c/30116/3/src/arch/mips/include/arch/cpu.h@29 PS3, Line 29: _Static_assert(sizeof(struct cpu_driver) <= CONFIG_DRIVER_ALIGN, \ Avoid unnecessary line continuations https://review.coreboot.org/#/c/30116/3/src/arch/ppc64/include/arch/cpu.h File src/arch/ppc64/include/arch/cpu.h: https://review.coreboot.org/#/c/30116/3/src/arch/ppc64/include/arch/cpu.h@27 PS3, Line 27: } __attribute__ ((aligned (CONFIG_DRIVER_ALIGN))); space prohibited between function name and open parenthesis '(' https://review.coreboot.org/#/c/30116/3/src/arch/ppc64/include/arch/cpu.h@28 PS3, Line 28: _Static_assert(sizeof(struct cpu_driver) <= CONFIG_DRIVER_ALIGN, \ Avoid unnecessary line continuations https://review.coreboot.org/#/c/30116/3/src/arch/riscv/include/arch/cpu.h File src/arch/riscv/include/arch/cpu.h: https://review.coreboot.org/#/c/30116/3/src/arch/riscv/include/arch/cpu.h@29 PS3, Line 29: } __attribute__ ((aligned (CONFIG_DRIVER_ALIGN))); space prohibited between function name and open parenthesis '(' https://review.coreboot.org/#/c/30116/3/src/arch/riscv/include/arch/cpu.h@30 PS3, Line 30: _Static_assert(sizeof(struct cpu_driver) <= CONFIG_DRIVER_ALIGN, \ Avoid unnecessary line continuations https://review.coreboot.org/#/c/30116/3/src/arch/x86/include/arch/cpu.h File src/arch/x86/include/arch/cpu.h: https://review.coreboot.org/#/c/30116/3/src/arch/x86/include/arch/cpu.h@183 PS3, Line 183: } __attribute__ ((aligned (CONFIG_DRIVER_ALIGN))); space prohibited between function name and open parenthesis '(' https://review.coreboot.org/#/c/30116/3/src/arch/x86/include/arch/cpu.h@184 PS3, Line 184: _Static_assert(sizeof(struct cpu_driver) <= CONFIG_DRIVER_ALIGN, \ Avoid unnecessary line continuations https://review.coreboot.org/#/c/30116/3/src/include/device/pci.h File src/include/device/pci.h: https://review.coreboot.org/#/c/30116/3/src/include/device/pci.h@57 PS3, Line 57: } __attribute__ ((aligned (CONFIG_DRIVER_ALIGN))); space prohibited between function name and open parenthesis '(' https://review.coreboot.org/#/c/30116/3/src/include/device/pci.h@58 PS3, Line 58: _Static_assert(sizeof(struct pci_driver) <= CONFIG_DRIVER_ALIGN, \ Avoid unnecessary line continuations -- To view, visit https://review.coreboot.org/c/coreboot/+/30116 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I2491d47ed03dcfd8db110dfb181b2c5281449591 Gerrit-Change-Number: 30116 Gerrit-PatchSet: 3 Gerrit-Owner: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Jonathan Neuschäfer <j.neuschaefer(a)gmx.net> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Philipp Hug <philipp(a)hug.cx> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: ron minnich <rminnich(a)gmail.com> Gerrit-Comment-Date: Sun, 09 Dec 2018 14:56:57 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in ...coreboot[master]: sb/intel/lynxpoint: Handle H81 only having 6 PCIe root ports
by Patrick Rudolph (Code Review) 09 Dec '18

09 Dec '18

Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/30077 ) Change subject: sb/intel/lynxpoint: Handle H81 only having 6 PCIe root ports ...................................................................... Patch Set 2: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/30077 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If3ce217e8a4f4ea4e111e4525b03dbbfc63f92b0 Gerrit-Change-Number: 30077 Gerrit-PatchSet: 2 Gerrit-Owner: Tristan Corrick <tristan(a)corrick.kiwi> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Tristan Corrick <tristan(a)corrick.kiwi> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Sun, 09 Dec 2018 14:37:45 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in ...coreboot[master]: [WIP]arch/x86: Support x86_64 exceptions
by build bot (Jenkins) (Code Review) 09 Dec '18

09 Dec '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/30117 ) Change subject: [WIP]arch/x86: Support x86_64 exceptions ...................................................................... Patch Set 2: (2 comments) https://review.coreboot.org/#/c/30117/2/src/arch/x86/include/arch/registers… File src/arch/x86/include/arch/registers.h: https://review.coreboot.org/#/c/30117/2/src/arch/x86/include/arch/registers… PS2, Line 23: #define DOWNTO8(A) \ macros should not use a trailing semicolon https://review.coreboot.org/#/c/30117/2/src/arch/x86/include/arch/registers… PS2, Line 41: #define DOWNTO16(A) \ macros should not use a trailing semicolon -- To view, visit https://review.coreboot.org/c/coreboot/+/30117 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Idd12c90a95cc2989eb9b2a718740a84222193f48 Gerrit-Change-Number: 30117 Gerrit-PatchSet: 2 Gerrit-Owner: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Sun, 09 Dec 2018 14:30:29 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in ...coreboot[master]: [WIP]pci_drivers/cpu_drivers: Fix constructed arrays on 64bit platforms
by build bot (Jenkins) (Code Review) 09 Dec '18

09 Dec '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/30116 ) Change subject: [WIP]pci_drivers/cpu_drivers: Fix constructed arrays on 64bit platforms ...................................................................... Patch Set 2: (7 comments) https://review.coreboot.org/#/c/30116/2/src/arch/arm/include/armv7/arch/cpu… File src/arch/arm/include/armv7/arch/cpu.h: https://review.coreboot.org/#/c/30116/2/src/arch/arm/include/armv7/arch/cpu… PS2, Line 29: } __attribute__ ((aligned (CONFIG_DRIVER_ALIGN))); space prohibited between function name and open parenthesis '(' https://review.coreboot.org/#/c/30116/2/src/arch/arm64/include/armv8/arch/c… File src/arch/arm64/include/armv8/arch/cpu.h: https://review.coreboot.org/#/c/30116/2/src/arch/arm64/include/armv8/arch/c… PS2, Line 26: struct cpu_driver { } __attribute__ ((aligned (CONFIG_DRIVER_ALIGN))); space prohibited between function name and open parenthesis '(' https://review.coreboot.org/#/c/30116/2/src/arch/mips/include/arch/cpu.h File src/arch/mips/include/arch/cpu.h: https://review.coreboot.org/#/c/30116/2/src/arch/mips/include/arch/cpu.h@28 PS2, Line 28: } __attribute__ ((aligned (CONFIG_DRIVER_ALIGN))); space prohibited between function name and open parenthesis '(' https://review.coreboot.org/#/c/30116/2/src/arch/ppc64/include/arch/cpu.h File src/arch/ppc64/include/arch/cpu.h: https://review.coreboot.org/#/c/30116/2/src/arch/ppc64/include/arch/cpu.h@27 PS2, Line 27: } __attribute__ ((aligned (CONFIG_DRIVER_ALIGN))); space prohibited between function name and open parenthesis '(' https://review.coreboot.org/#/c/30116/2/src/arch/riscv/include/arch/cpu.h File src/arch/riscv/include/arch/cpu.h: https://review.coreboot.org/#/c/30116/2/src/arch/riscv/include/arch/cpu.h@29 PS2, Line 29: } __attribute__ ((aligned (CONFIG_DRIVER_ALIGN))); space prohibited between function name and open parenthesis '(' https://review.coreboot.org/#/c/30116/2/src/arch/x86/include/arch/cpu.h File src/arch/x86/include/arch/cpu.h: https://review.coreboot.org/#/c/30116/2/src/arch/x86/include/arch/cpu.h@183 PS2, Line 183: } __attribute__ ((aligned (CONFIG_DRIVER_ALIGN))); space prohibited between function name and open parenthesis '(' https://review.coreboot.org/#/c/30116/2/src/include/device/pci.h File src/include/device/pci.h: https://review.coreboot.org/#/c/30116/2/src/include/device/pci.h@57 PS2, Line 57: } __attribute__ ((aligned (CONFIG_DRIVER_ALIGN))); space prohibited between function name and open parenthesis '(' -- To view, visit https://review.coreboot.org/c/coreboot/+/30116 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I2491d47ed03dcfd8db110dfb181b2c5281449591 Gerrit-Change-Number: 30116 Gerrit-PatchSet: 2 Gerrit-Owner: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Jonathan Neuschäfer <j.neuschaefer(a)gmx.net> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Philipp Hug <philipp(a)hug.cx> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: ron minnich <rminnich(a)gmail.com> Gerrit-Comment-Date: Sun, 09 Dec 2018 14:29:55 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in ...coreboot[master]: [WIP]arch/x86: Support x86_64 exceptions
by build bot (Jenkins) (Code Review) 09 Dec '18

09 Dec '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/30117 ) Change subject: [WIP]arch/x86: Support x86_64 exceptions ...................................................................... Patch Set 1: (2 comments) https://review.coreboot.org/#/c/30117/1/src/arch/x86/include/arch/registers… File src/arch/x86/include/arch/registers.h: https://review.coreboot.org/#/c/30117/1/src/arch/x86/include/arch/registers… PS1, Line 23: #define DOWNTO8(A) \ macros should not use a trailing semicolon https://review.coreboot.org/#/c/30117/1/src/arch/x86/include/arch/registers… PS1, Line 41: #define DOWNTO16(A) \ macros should not use a trailing semicolon -- To view, visit https://review.coreboot.org/c/coreboot/+/30117 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Idd12c90a95cc2989eb9b2a718740a84222193f48 Gerrit-Change-Number: 30117 Gerrit-PatchSet: 1 Gerrit-Owner: Patrick Rudolph <siro(a)das-labor.org> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Sun, 09 Dec 2018 13:38:52 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in ...coreboot[master]: [WIP]pci_drivers/cpu_drivers: Fix constructed arrays on 64bit platforms
by build bot (Jenkins) (Code Review) 09 Dec '18

09 Dec '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/30116 ) Change subject: [WIP]pci_drivers/cpu_drivers: Fix constructed arrays on 64bit platforms ...................................................................... Patch Set 1: (7 comments) https://review.coreboot.org/#/c/30116/1/src/arch/arm/include/armv7/arch/cpu… File src/arch/arm/include/armv7/arch/cpu.h: https://review.coreboot.org/#/c/30116/1/src/arch/arm/include/armv7/arch/cpu… PS1, Line 30: } __attribute__ ((aligned (ARCH_VLA_ALIGN_SIZE))); space prohibited between function name and open parenthesis '(' https://review.coreboot.org/#/c/30116/1/src/arch/arm64/include/armv8/arch/c… File src/arch/arm64/include/armv8/arch/cpu.h: https://review.coreboot.org/#/c/30116/1/src/arch/arm64/include/armv8/arch/c… PS1, Line 27: struct cpu_driver { } __attribute__ ((aligned (ARCH_VLA_ALIGN_SIZE))); space prohibited between function name and open parenthesis '(' https://review.coreboot.org/#/c/30116/1/src/arch/mips/include/arch/cpu.h File src/arch/mips/include/arch/cpu.h: https://review.coreboot.org/#/c/30116/1/src/arch/mips/include/arch/cpu.h@29 PS1, Line 29: } __attribute__ ((aligned (ARCH_VLA_ALIGN_SIZE))); space prohibited between function name and open parenthesis '(' https://review.coreboot.org/#/c/30116/1/src/arch/ppc64/include/arch/cpu.h File src/arch/ppc64/include/arch/cpu.h: https://review.coreboot.org/#/c/30116/1/src/arch/ppc64/include/arch/cpu.h@28 PS1, Line 28: } __attribute__ ((aligned (ARCH_VLA_ALIGN_SIZE))); space prohibited between function name and open parenthesis '(' https://review.coreboot.org/#/c/30116/1/src/arch/riscv/include/arch/cpu.h File src/arch/riscv/include/arch/cpu.h: https://review.coreboot.org/#/c/30116/1/src/arch/riscv/include/arch/cpu.h@30 PS1, Line 30: } __attribute__ ((aligned (ARCH_VLA_ALIGN_SIZE))); space prohibited between function name and open parenthesis '(' https://review.coreboot.org/#/c/30116/1/src/arch/x86/include/arch/cpu.h File src/arch/x86/include/arch/cpu.h: https://review.coreboot.org/#/c/30116/1/src/arch/x86/include/arch/cpu.h@184 PS1, Line 184: } __attribute__ ((aligned (ARCH_VLA_ALIGN_SIZE))); space prohibited between function name and open parenthesis '(' https://review.coreboot.org/#/c/30116/1/src/include/device/pci.h File src/include/device/pci.h: https://review.coreboot.org/#/c/30116/1/src/include/device/pci.h@58 PS1, Line 58: } __attribute__ ((aligned (ARCH_VLA_ALIGN_SIZE))); space prohibited between function name and open parenthesis '(' -- To view, visit https://review.coreboot.org/c/coreboot/+/30116 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I2491d47ed03dcfd8db110dfb181b2c5281449591 Gerrit-Change-Number: 30116 Gerrit-PatchSet: 1 Gerrit-Owner: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Jonathan Neuschäfer <j.neuschaefer(a)gmx.net> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Philipp Hug <philipp(a)hug.cx> Gerrit-Reviewer: ron minnich <rminnich(a)gmail.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Sun, 09 Dec 2018 13:38:41 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in ...coreboot[master]: arch/x86/mmu: Port armv8 MMU to x86_64
by Patrick Rudolph (Code Review) 09 Dec '18

09 Dec '18

Patrick Rudolph has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/30119 Change subject: arch/x86/mmu: Port armv8 MMU to x86_64 ...................................................................... arch/x86/mmu: Port armv8 MMU to x86_64 Add functions to setup page tables for long mode. Required to support x86_64, as the MMU is always active. Tested on qemu. Change-Id: I6e8b46e65925823a84b8ccd647c7d6848aa20992 Signed-off-by: Patrick Rudolph <siro(a)das-labor.org> --- M src/arch/x86/Kconfig A src/arch/x86/include/arch/mmu.h A src/arch/x86/mmu.c M src/commonlib/include/commonlib/cbmem_id.h 4 files changed, 486 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/19/30119/1 diff --git a/src/arch/x86/Kconfig b/src/arch/x86/Kconfig index 7c8371e..11389c0 100644 --- a/src/arch/x86/Kconfig +++ b/src/arch/x86/Kconfig @@ -317,6 +317,13 @@ help The number of 4KiB pages that should be pre-allocated for page tables. +config NUM_PAGE_TABLE_PAGES + int + default 128 + depends on ARCH_X86 + help + The number of 4KiB pages that should be available for ramstage. + # Provide the interrupt handlers to every stage. Not all # stages may take advantage. config IDT_IN_EVERY_STAGE diff --git a/src/arch/x86/include/arch/mmu.h b/src/arch/x86/include/arch/mmu.h new file mode 100644 index 0000000..4cb0354 --- /dev/null +++ b/src/arch/x86/include/arch/mmu.h @@ -0,0 +1,103 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2014 Google Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef __ARCH_X86_MMU_H__ +#define __ARCH_X86_MMU_H__ + +#include <types.h> + +/* Memory attributes for mmap regions + * These attributes act as tag values for memrange regions + */ + +/* Descriptor attributes */ + +#define DESC_MASK 0xeaf +#define INVALID_DESC 0 +#define TABLE_DESC 0x623 +#define PAGE_DESC 0x4a3 +#define BLOCK_DESC 0x2a3 + +#define AVAIL_SHIFT 9 +#define AVAIL_MASK (7 << AVAIL_SHIFT) +#define AVAIL_INVAL 0 +#define AVAIL_TABLE 3 +#define AVAIL_PAGE 2 +#define AVAIL_BLOCK 1 + + +/* Block descriptor */ +#define BLOCK_NS (1 << 5) + +#define BLOCK_AP_RW (0 << 7) +#define BLOCK_AP_RO (1 << 7) + +#define BLOCK_ACCESS (1 << 10) + +#define BLOCK_XN (1ULL << 54) + +#define BLOCK_SH_SHIFT (8) +#define BLOCK_SH_NON_SHAREABLE (0 << BLOCK_SH_SHIFT) +#define BLOCK_SH_UNPREDICTABLE (1 << BLOCK_SH_SHIFT) +#define BLOCK_SH_OUTER_SHAREABLE (2 << BLOCK_SH_SHIFT) +#define BLOCK_SH_INNER_SHAREABLE (3 << BLOCK_SH_SHIFT) + +/* Sentinel descriptor to mark first PTE of an unused table. It must be a value + * that cannot occur naturally as part of a page table. (Bits [1:0] = 0b00 makes + * this an unmapped page, but some page attribute bits are still set.) */ +#define UNUSED_DESC 0x6EbAAD0BBADbA000ULL + +/* XLAT Table Init Attributes */ + +#define VA_START 0x0 +#define BITS_PER_VA 48 +/* Granule size of 4KB is being used */ +#define GRANULE_SIZE_SHIFT 12 +#define GRANULE_SIZE (1 << GRANULE_SIZE_SHIFT) +#define XLAT_ADDR_MASK ((1ULL << BITS_PER_VA) - GRANULE_SIZE) +#define GRANULE_SIZE_MASK ((1ULL << GRANULE_SIZE_SHIFT) - 1) + +#define BITS_RESOLVED_PER_LVL (GRANULE_SIZE_SHIFT - 3) +#define L0_ADDR_SHIFT (GRANULE_SIZE_SHIFT + BITS_RESOLVED_PER_LVL * 3) +#define L1_ADDR_SHIFT (GRANULE_SIZE_SHIFT + BITS_RESOLVED_PER_LVL * 2) +#define L2_ADDR_SHIFT (GRANULE_SIZE_SHIFT + BITS_RESOLVED_PER_LVL * 1) +#define L3_ADDR_SHIFT (GRANULE_SIZE_SHIFT + BITS_RESOLVED_PER_LVL * 0) + +#define L0_ADDR_MASK (((1ULL << BITS_RESOLVED_PER_LVL) - 1) << L0_ADDR_SHIFT) +#define L1_ADDR_MASK (((1ULL << BITS_RESOLVED_PER_LVL) - 1) << L1_ADDR_SHIFT) +#define L2_ADDR_MASK (((1ULL << BITS_RESOLVED_PER_LVL) - 1) << L2_ADDR_SHIFT) +#define L3_ADDR_MASK (((1ULL << BITS_RESOLVED_PER_LVL) - 1) << L3_ADDR_SHIFT) + +/* These macros give the size of the region addressed by each entry of a xlat + table at any given level */ +#define L3_XLAT_SIZE (1ULL << L3_ADDR_SHIFT) +#define L2_XLAT_SIZE (1ULL << L2_ADDR_SHIFT) +#define L1_XLAT_SIZE (1ULL << L1_ADDR_SHIFT) +#define L0_XLAT_SIZE (1ULL << L0_ADDR_SHIFT) + +#define PAT_UC 0 +#define PAT_WC 1 +#define PAT_WT 4 +#define PAT_WP 5 +#define PAT_WB 6 +#define PAT_UC_MINUS 7 + +/* Initialize MMU registers and page table memory region. */ +void mmu_init(void *new_page_table); +/* Install page tables */ +void mmu_enable(void *new_page_table); +void mmu_config_range(uint64_t start, uint64_t size, uint64_t tag); + +#endif /* __ARCH_X86_MMU_H__ */ diff --git a/src/arch/x86/mmu.c b/src/arch/x86/mmu.c new file mode 100644 index 0000000..39802f0 --- /dev/null +++ b/src/arch/x86/mmu.c @@ -0,0 +1,375 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2014 Google Inc. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + */ + +#include <assert.h> +#include <stdlib.h> +#include <stdint.h> +#include <string.h> +#include <symbols.h> + +#include <console/console.h> +#include <arch/mmu.h> +#include <arch/cache.h> +#include <cpu/x86/msr.h> +#include <cbmem.h> + +/* This just caches the next free table slot (okay to do since they fill up from + * bottom to top and can never be freed up again). It will reset to its initial + * value on stage transition, so we still need to check it for UNUSED_DESC. */ +static CAR_GLOBAL uint64_t *next_free_table; +static CAR_GLOBAL uint64_t *page_tables; + +#define PTE_PRES (1ULL << 0) +#define PTE_RW (1ULL << 1) +#define PTE_US (1ULL << 2) +#define PTE_PWT (1ULL << 3) +#define PTE_PCD (1ULL << 4) +#define PTE_A (1ULL << 5) +#define PTE_D (1ULL << 6) +#define PTE_PAT (1ULL << 7) +#define PTE_G (1ULL << 8) +#define PTE_XD (1ULL << 63) +#define PDE_PS (1ULL << 7) + +#define BLOCK_INDEX_MASK (PTE_PWT | PTE_PCD | PTE_PRES | PTE_RW | PTE_A | PTE_D) +#define BLOCK_INDEX_SHIFT 0 +#define BLOCK_INDEX_MEM_NORMAL (PTE_PRES | PTE_RW | PTE_A | PTE_D) + +static void print_tag(int level, uint64_t pat) +{ + switch (pat) { + case PAT_UC: + printk(level, "UC\n"); + break; + case PAT_WC: + printk(level, "WC\n"); + break; + case PAT_WT: + printk(level, "WT\n"); + break; + case PAT_WP: + printk(level, "WP\n"); + break; + case PAT_WB: + printk(level, "WB\n"); + break; + case PAT_UC_MINUS: + printk(level, "UC-\n"); + break; + default: + break; + } +} + +static uint64_t pte_pat_flags(unsigned long pat) +{ + switch (pat) { + case PAT_UC: + return 0 | PTE_PCD | PTE_PWT; + case PAT_WC: + return 0 | 0 | PTE_PWT; + case PAT_WT: + return PTE_PAT | PTE_PCD | PTE_PWT; + case PAT_WP: + return PTE_PAT | 0 | PTE_PWT; + case PAT_WB: + return 0 | 0 | 0; + case PAT_UC_MINUS: + return 0 | PTE_PCD | 0; + default: + printk(BIOS_ERR, "MMU: PTE PAT defaulting to WB: %lx\n", pat); + return 0 | 0 | 0; + } +} + +static uint64_t *pagetable(void) +{ + return car_get_var(page_tables); +} + +static uint64_t *epagetable(void) +{ + return (uint64_t *)((u8 *)car_get_var(page_tables) + + (CONFIG_NUM_PAGE_TABLE_PAGES * 4 * KiB)); +} + +/* Func : get_block_attr + * Desc : Get block descriptor attributes based on the value of tag in memrange + * region + */ +static uint64_t get_block_attr(unsigned long tag, bool ps) +{ + uint64_t flags = PTE_PRES | PTE_RW | PTE_US | PTE_A | PTE_D; + flags |= pte_pat_flags(tag); + if (ps) { + if (flags & PTE_PAT) { + /* If PS=1 PAT is at position 12 instead of 7 */ + flags &= ~PTE_PAT; + flags |= (PTE_PAT << 5); + } + flags |= PDE_PS; + } + return flags; +} + +/* Func : setup_new_table + * Desc : Get next free table from pagetable and set it up to match + * old parent entry. + */ +static uint64_t *setup_new_table(uint64_t desc, uint64_t xlat_size) +{ + uint64_t *nft = car_get_var(next_free_table); + while (nft[0] != UNUSED_DESC) { + car_set_var(next_free_table, car_get_var(next_free_table) + + GRANULE_SIZE/sizeof(*next_free_table)); + nft = car_get_var(next_free_table); + if (epagetable() - car_get_var(next_free_table) <= 0) + die("Ran out of page table space!"); + } + + uint64_t frame_base = desc & XLAT_ADDR_MASK; + printk(BIOS_DEBUG, "MMU: Backing address range [0x%llx:0x%llx) with " + "new page table @%p\n", frame_base, frame_base + + (xlat_size << BITS_RESOLVED_PER_LVL), nft); + + if (desc == INVALID_DESC) { + memset(nft, 0, GRANULE_SIZE); + } else { + /* Can reuse old parent entry, but may need to adjust type. */ + if (xlat_size == L3_XLAT_SIZE) + desc |= PAGE_DESC; + + int i = 0; + for (; i < GRANULE_SIZE/sizeof(*next_free_table); i++) { + nft[i] = desc; + desc += xlat_size; + } + } + + return nft; +} + +/* Func: get_next_level_table + * Desc: Check if the table entry is a valid descriptor. If not, initialize new + * table, update the entry and return the table addr. If valid, return the addr + */ +static uint64_t *get_next_level_table(uint64_t *ptr, size_t xlat_size) +{ + uint64_t desc = *ptr; + + if ((desc & DESC_MASK) != TABLE_DESC) { + uint64_t *new_table = setup_new_table(desc, xlat_size); + desc = ((uintptr_t)new_table) | TABLE_DESC; + *ptr = desc; + } + return (uint64_t *)(uintptr_t)(desc & XLAT_ADDR_MASK); +} + +/* + Func : init_xlat_table + * Desc : Given a base address and size, it identifies the indices within + * different level XLAT tables which map the given base addr. Similar to table + * walk, except that all invalid entries during the walk are updated + * accordingly. On success, it returns the size of the block/page addressed by + * the final table. + */ +static uint64_t init_xlat_table(uint64_t base_addr, + uint64_t size, + uint64_t tag) +{ + uint64_t l0_index = (base_addr & L0_ADDR_MASK) >> L0_ADDR_SHIFT; + uint64_t l1_index = (base_addr & L1_ADDR_MASK) >> L1_ADDR_SHIFT; + uint64_t l2_index = (base_addr & L2_ADDR_MASK) >> L2_ADDR_SHIFT; + uint64_t l3_index = (base_addr & L3_ADDR_MASK) >> L3_ADDR_SHIFT; + uint64_t *table = pagetable(); + uint64_t desc; + + /* check if CPU supports 1GB huge tables */ + const bool hugepage_1gb = !!(cpuid_edx(0x80000001) & (1 << 26)); + + /* L0 entry stores a table descriptor (doesn't support blocks) */ + table = get_next_level_table(&table[l0_index], L1_XLAT_SIZE); + + /* L1 table lookup */ + if ((size >= L1_XLAT_SIZE) && + IS_ALIGNED(base_addr, (1UL << L1_ADDR_SHIFT)) && + hugepage_1gb) { + /* If block address is aligned and size is greater than + * or equal to size addressed by each L1 entry, we can + * directly store a block desc */ + desc = base_addr | BLOCK_DESC | get_block_attr(tag, 1); + table[l1_index] = desc; + /* L2 lookup is not required */ + return L1_XLAT_SIZE; + } + + /* L1 entry stores a table descriptor */ + table = get_next_level_table(&table[l1_index], L2_XLAT_SIZE); + + /* L2 table lookup */ + if ((size >= L2_XLAT_SIZE) && + IS_ALIGNED(base_addr, (1UL << L2_ADDR_SHIFT))) { + /* If block address is aligned and size is greater than + * or equal to size addressed by each L2 entry, we can + * directly store a block desc */ + desc = base_addr | BLOCK_DESC | get_block_attr(tag, 1); + table[l2_index] = desc; + /* L3 lookup is not required */ + return L2_XLAT_SIZE; + } + + /* L2 entry stores a table descriptor */ + table = get_next_level_table(&table[l2_index], L3_XLAT_SIZE); + + /* L3 table lookup */ + desc = base_addr | PAGE_DESC | get_block_attr(tag, 0); + table[l3_index] = desc; + return L3_XLAT_SIZE; +} + +/* Func : sanity_check + * Desc : Check address/size alignment of a table or page. + */ +static void sanity_check(uint64_t addr, uint64_t size) +{ + assert(!(addr & GRANULE_SIZE_MASK) && + !(size & GRANULE_SIZE_MASK) && + (addr + size < (1ULL << BITS_PER_VA)) && + size >= GRANULE_SIZE); +} + +/* Func : get_pte + * Desc : Returns the page table entry governing a specific address. */ +static uint64_t get_pte(uint64_t addr) +{ + int shift = L0_ADDR_SHIFT; + /* Using pointer here is OK, as _pagetable must be in 32bit space */ + uint64_t *pte = pagetable(); + + while (1) { + int index = ((uintptr_t)addr >> shift) & + ((1ULL << BITS_RESOLVED_PER_LVL) - 1); + + if ((pte[index] & DESC_MASK) != TABLE_DESC || + shift <= GRANULE_SIZE_SHIFT) + return pte[index]; + + pte = (uint64_t *)(uintptr_t)(pte[index] & XLAT_ADDR_MASK); + shift -= BITS_RESOLVED_PER_LVL; + } +} + +/* Func : assert_correct_pagetable_mapping + * Desc : Asserts that mapping for addr matches the access type used by the + * page table walk (i.e. addr is correctly mapped to be part of the pagetable). + */ +static void assert_correct_pagetable_mapping(uint64_t addr) +{ + return; + + uint64_t pte = get_pte(addr); + assert(((pte >> BLOCK_INDEX_SHIFT) & BLOCK_INDEX_MASK) + == BLOCK_INDEX_MEM_NORMAL); +} + +/* Func : mmu_config_range + * Desc : This function repeatedly calls init_xlat_table with the base + * address. Based on size returned from init_xlat_table, base_addr is updated + * and subsequent calls are made for initializing the xlat table until the whole + * region is initialized. + */ +void mmu_config_range(uint64_t start, uint64_t size, uint64_t tag) +{ + uint64_t base_addr = start; + uint64_t temp_size = size; + + printk(BIOS_INFO, "MMU: Mapping address range [0x%llx:0x%llx) as ", + start, start + size); + print_tag(BIOS_INFO, tag); + + sanity_check(base_addr, temp_size); + + while (temp_size) + temp_size -= init_xlat_table(base_addr + (size - temp_size), + temp_size, tag); + +} + +/** + * @brief Init MMU for long mode + * + * @param new_page_table The new area for page tables. Must not overlap with + * currently installed page tables. + * + * Can be called multiple times, as long as the new page table area does not + * overlap with page tables in use. + * If paging isn't active, there are no limitations. + */ +void mmu_init(void *new_page_table) +{ + assert(new_page_table); + assert(pagetable() != new_page_table); + + car_set_var(page_tables, new_page_table); + car_set_var(next_free_table, new_page_table); + + /* Initially mark all table slots unused (first PTE == UNUSED_DESC). */ + uint64_t *table = pagetable(); + for (; epagetable() - table > 0; table += GRANULE_SIZE/sizeof(*table)) + table[0] = UNUSED_DESC; + + printk(BIOS_DEBUG, "MMU: Initialize the root table (L0)\n"); + /* Initialize the root table (L0) to be completely unmapped. */ + uint64_t *root = setup_new_table(INVALID_DESC, L0_XLAT_SIZE); + assert(root == pagetable()); +} + +/* Func : mmu_enable + * Desc : Install page tables, enable PAE and enable long mode. + */ +void mmu_enable(void *new_page_table) +{ + assert_correct_pagetable_mapping((uintptr_t)new_page_table); + assert_correct_pagetable_mapping((uintptr_t)new_page_table + + (CONFIG_NUM_PAGE_TABLE_PAGES * 4 * KiB) - 1); + + /* Load the new page table address */ + write_cr3((uintptr_t)new_page_table); + + printk(BIOS_INFO, "MMU: Installed new page tables\n"); + + CRx_TYPE cr0; + + cr0 = read_cr0(); + if (!(cr0 & CR0_PG)) { + /* Enable paging */ + cr0 |= CR0_PG; + write_cr0(cr0); + } +} diff --git a/src/commonlib/include/commonlib/cbmem_id.h b/src/commonlib/include/commonlib/cbmem_id.h index 2e0eeb6..4a37663 100644 --- a/src/commonlib/include/commonlib/cbmem_id.h +++ b/src/commonlib/include/commonlib/cbmem_id.h @@ -46,6 +46,7 @@ #define CBMEM_ID_NONE 0x00000000 #define CBMEM_ID_PIRQ 0x49525154 #define CBMEM_ID_POWER_STATE 0x50535454 +#define CBMEM_ID_PAGE 0x50414745 #define CBMEM_ID_RAM_OOPS 0x05430095 #define CBMEM_ID_RAMSTAGE 0x9a357a9e #define CBMEM_ID_RAMSTAGE_CACHE 0x9a3ca54e -- To view, visit https://review.coreboot.org/c/coreboot/+/30119 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6e8b46e65925823a84b8ccd647c7d6848aa20992 Gerrit-Change-Number: 30119 Gerrit-PatchSet: 1 Gerrit-Owner: Patrick Rudolph <siro(a)das-labor.org> Gerrit-MessageType: newchange

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Change in ...coreboot[master]: arch/x86/boot: Call payload in protected mode
by Patrick Rudolph (Code Review) 09 Dec '18

09 Dec '18

Patrick Rudolph has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/30118 Change subject: arch/x86/boot: Call payload in protected mode ...................................................................... arch/x86/boot: Call payload in protected mode On ARCH_RAMSTAGE_X86_64 call the payload in protected mode. Add a helper function to call arbitraty code in protected mode, similar to the real mode call handler. Tested using SeaBios as payload. Untested for anything else. Change-Id: I6552ac30f1b6205e08e16d251328e01ce3fbfd14 Signed-off-by: Patrick Rudolph <siro(a)das-labor.org> --- M src/arch/x86/boot.c M src/arch/x86/c_start.S M src/include/program_loading.h 3 files changed, 186 insertions(+), 10 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/18/30118/1 diff --git a/src/arch/x86/boot.c b/src/arch/x86/boot.c index 2967cf6..cb9f34b 100644 --- a/src/arch/x86/boot.c +++ b/src/arch/x86/boot.c @@ -32,13 +32,20 @@ void arch_prog_run(struct prog *prog) { - __asm__ volatile ( -#ifdef __x86_64__ - "jmp *%%rdi\n" +#ifdef __ARCH_x86_64__ +#if ENV_RAMSTAGE + protected_mode_call(false, (uintptr_t)prog_entry(prog), + (uintptr_t)prog_entry_arg(prog)); #else - "jmp *%%edi\n" -#endif - + __asm__ volatile ( + "jmp *%%rdi\n" :: "D"(prog_entry(prog)) ); +#endif +#else + __asm__ volatile ( + "jmp *%%edi\n" + :: "D"(prog_entry(prog)) + ); +#endif } diff --git a/src/arch/x86/c_start.S b/src/arch/x86/c_start.S index 6426ef3..8148e58 100644 --- a/src/arch/x86/c_start.S +++ b/src/arch/x86/c_start.S @@ -50,7 +50,7 @@ movl %eax, %gs #ifdef __x86_64__ mov $0x48, %ecx - call SetCodeSelector + call SetCodeSelector64 #endif post_code(POST_ENTRY_C_START) /* post 13 */ @@ -207,7 +207,7 @@ .section ".text._start", "ax", @progbits #ifdef __x86_64__ -SetCodeSelector: +SetCodeSelector64: # save rsp because iret will align it to a 16 byte boundary mov %rsp, %rdx @@ -219,14 +219,14 @@ push %rsp pushfq push %rcx # cx is code segment selector from caller - mov $setCodeSelectorLongJump, %rax + mov $setCodeSelectorLongJump64, %rax push %rax # the iret will continue at next instruction, with the new cs value # loaded iretq -setCodeSelectorLongJump: +setCodeSelectorLongJump64: # restore rsp, it might not have been 16-byte aligned on entry mov %rdx, %rsp ret @@ -237,3 +237,161 @@ .previous .code32 #endif + +#ifdef __ARCH_x86_64__ + + /* + * Functions to handle mode switches from longmode to protected + * mode. Similar to realmode switches. + */ + .section .bss, "aw", @nobits + + .section ".text._mode_switch", "ax", @progbits +.code64 + + .globl protected_mode_call +protected_mode_call: + + push %rbp + mov %rsp, %rbp + + /* Preserve registers */ + push %rbx + push %r12 + push %r13 + push %r14 + push %r15 + + /* Arguments to stack */ + push %rdi + push %rsi + push %rdx + + /* Ensure cache is clean. */ + invd + + /* Running in compatibility mode? */ + mov -48(%rbp), %rax + test %rax, %rax + jne 1f + + /* Disable paging */ + mov %cr0, %rax + and $0x7FFFFFFF, %rax + mov %rax, %cr0 + + /* Disable long mode */ + mov $0xC0000080, %rcx + rdmsr + and $(~0x100), %rax + wrmsr + + /* Disable PAE */ + mov %cr4, %rax + and $(~0x20), %rax + mov %rax, %cr4 +1: + /* Set 32-bit code segment and ss */ + mov $0x10, %rcx + call SetCodeSelector32 + +.code32 + /* Use flat 32-bit data segment. */ + movl $0x18, %eax + movl %eax, %ds + movl %eax, %es + movl %eax, %ss + movl %eax, %fs + movl %eax, %gs + + movl -56(%ebp), %eax /* Function to call */ + movl -64(%ebp), %ebx /* Argument 0 */ + + /* Align the stack */ + andl $0xFFFFFFF0, %esp + subl $12, %esp + pushl %ebx /* Argument 0 */ + + call *%eax + + pushl %eax + pushl $0 + + /* Running in compatibility mode? */ + mov -48(%ebp), %eax + test %eax, %eax + jne 1f + + /* Enable PAE */ + mov %cr4, %eax + or $0x20, %eax + mov %eax, %cr4 + + /* Enable long mode */ + mov $0xC0000080, %ecx + rdmsr + or $0x100, %eax + wrmsr + + /* Enable paging */ + mov %cr0, %eax + or $0x80000000, %eax + mov %eax, %cr0 + + /* Just to be sure ... */ + lgdt %cs:gdtaddr +1: + /* Back to long mode */ + ljmp $0x48, $1f +.code64 +1: movl $0x18, %eax + movl %eax, %ds + movl %eax, %es + movl %eax, %ss + movl %eax, %fs + movl %eax, %gs + + /* Place return value in rax */ + pop %rax + + /* Restore registers */ + pop %r15 + pop %r14 + pop %r13 + pop %r12 + pop %rbx + + /* Restore stack pointer */ + mov %rbp, %rsp + pop %rbp + + ret + +.code64 +SetCodeSelector32: + # save rsp because iret will align it to a 16 byte boundary + mov %rsp, %rdx + + # use iret to jump to a 32-bit offset in a new code segment + # iret will pop cs:rip, flags, then ss:rsp + mov %ss, %ax # need to push ss.. + push %rax # push ss instuction not valid in x64 mode, + # so use ax + push %rsp + pushfq + push %rcx # cx is code segment selector from caller + mov $setCodeSelectorLongJump32, %rax + push %rax + + # the iret will continue at next instruction, with the new cs value + # loaded + iretq + +.code32 +setCodeSelectorLongJump32: + # restore esp, it might not have been 16-byte aligned on entry + mov %edx, %esp + ret + + .previous +#endif diff --git a/src/include/program_loading.h b/src/include/program_loading.h index 468f0b3..84e5194 100644 --- a/src/include/program_loading.h +++ b/src/include/program_loading.h @@ -182,6 +182,17 @@ * if ramstage overwrites low memory. */ void backup_ramstage_section(uintptr_t base, size_t size); +/* Run function in protected mode. + * @arg compatibility_mode Use 32-bit compatibility mode instead of + * protected mode + * @arg func_ptr Function to call in protected mode + * @arg Argument to pass to called function + * + * @return The called function returned value +*/ +uint32_t protected_mode_call(bool compatibility_mode, uintptr_t func_ptr, + uint32_t argument); + /*********************** * PAYLOAD LOADING * ***********************/ -- To view, visit https://review.coreboot.org/c/coreboot/+/30118 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6552ac30f1b6205e08e16d251328e01ce3fbfd14 Gerrit-Change-Number: 30118 Gerrit-PatchSet: 1 Gerrit-Owner: Patrick Rudolph <siro(a)das-labor.org> Gerrit-MessageType: newchange

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