coreboot-gerrit December 2018

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Change in ...coreboot[master]: mainboard/facebook/fbg1701: Do initial mainboard commit
by Frans Hendriks (Code Review) 24 Dec '18

24 Dec '18

Hello Patrick Rudolph, build bot (Jenkins), Patrick Georgi, Martin Roth, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/30414 to look at the new patch set (#3). Change subject: mainboard/facebook/fbg1701: Do initial mainboard commit ...................................................................... mainboard/facebook/fbg1701: Do initial mainboard commit Create Facebook FBG-1701 coreboot implementation coreboot implementation includes Bootblock, measured boot and verified boot support. This Braswell implementation is based on Intel Strago. BUG=N/A TEST=Facebook FBG-1701 booting Embedded Linux Change-Id: I28ac78a630ee705b1e546031f024bfe7f952ab39 Signed-off-by: Frans Hendriks <fhendriks(a)eltan.com> --- A Documentation/mainboard/facebook/fbg1701.md M Documentation/mainboard/index.md A src/mainboard/facebook/fbg1701/Kconfig A src/mainboard/facebook/fbg1701/Kconfig.name A src/mainboard/facebook/fbg1701/Makefile.inc A src/mainboard/facebook/fbg1701/acpi/dptf.asl A src/mainboard/facebook/fbg1701/acpi/ec.asl A src/mainboard/facebook/fbg1701/acpi/mainboard.asl A src/mainboard/facebook/fbg1701/acpi/sleepstates.asl A src/mainboard/facebook/fbg1701/acpi/superio.asl A src/mainboard/facebook/fbg1701/acpi_tables.c A src/mainboard/facebook/fbg1701/board_info.txt A src/mainboard/facebook/fbg1701/board_mboot.c A src/mainboard/facebook/fbg1701/board_verified_boot.c A src/mainboard/facebook/fbg1701/board_verified_boot.h A src/mainboard/facebook/fbg1701/bootblock.c A src/mainboard/facebook/fbg1701/cmos.layout A src/mainboard/facebook/fbg1701/com_init.c A src/mainboard/facebook/fbg1701/devicetree.cb A src/mainboard/facebook/fbg1701/dsdt.asl A src/mainboard/facebook/fbg1701/fadt.c A src/mainboard/facebook/fbg1701/fmap.fmd A src/mainboard/facebook/fbg1701/gpio.c A src/mainboard/facebook/fbg1701/hda_verb.c A src/mainboard/facebook/fbg1701/irqroute.c A src/mainboard/facebook/fbg1701/irqroute.h A src/mainboard/facebook/fbg1701/logo.c A src/mainboard/facebook/fbg1701/mainboard.c A src/mainboard/facebook/fbg1701/mainboard.h A src/mainboard/facebook/fbg1701/manifest.h A src/mainboard/facebook/fbg1701/onboard.h A src/mainboard/facebook/fbg1701/ramstage.c A src/mainboard/facebook/fbg1701/romstage.c A src/mainboard/facebook/fbg1701/smihandler.c A src/mainboard/facebook/fbg1701/spd/SAMSUNG_K4B8G1646D-MYKO.spd.hex M src/soc/intel/braswell/Makefile.inc A src/soc/intel/braswell/include/soc/smbus.h A src/soc/intel/braswell/smbus.c 38 files changed, 2,960 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/14/30414/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/30414 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I28ac78a630ee705b1e546031f024bfe7f952ab39 Gerrit-Change-Number: 30414 Gerrit-PatchSet: 3 Gerrit-Owner: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-Reviewer: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: newpatchset

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Change in ...coreboot[master]: soc/intel/*: Select SUPPORT_CPU_UCODE_IN_CBFS only once
by Angel Pons (Code Review) 24 Dec '18

24 Dec '18

Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/30415 ) Change subject: soc/intel/*: Select SUPPORT_CPU_UCODE_IN_CBFS only once ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/30415 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7e20b7d3f05ecae98db1addf5aea7bf1159f4682 Gerrit-Change-Number: 30415 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Mon, 24 Dec 2018 12:53:30 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in ...coreboot[master]: mb/google/hatch: Add SoC and EC asl files in DSDT
by Rizwan Qureshi (Code Review) 24 Dec '18

24 Dec '18

Rizwan Qureshi has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/30282 ) Change subject: mb/google/hatch: Add SoC and EC asl files in DSDT ...................................................................... Patch Set 14: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/30282 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Icf1b1d7e34a7e863139c3583903f3b1e2cdc8da6 Gerrit-Change-Number: 30282 Gerrit-PatchSet: 14 Gerrit-Owner: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Reviewer: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Mon, 24 Dec 2018 12:53:22 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in ...coreboot[master]: mb/google/hatch: Add SoC and EC asl files in DSDT
by Aamir Bohra (Code Review) 24 Dec '18

24 Dec '18

Aamir Bohra has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/30282 ) Change subject: mb/google/hatch: Add SoC and EC asl files in DSDT ...................................................................... Patch Set 14: (1 comment) https://review.coreboot.org/#/c/30282/13/src/mainboard/google/hatch/Kconfig File src/mainboard/google/hatch/Kconfig: https://review.coreboot.org/#/c/30282/13/src/mainboard/google/hatch/Kconfig… PS13, Line 15: > Mention this change in commit message. Done -- To view, visit https://review.coreboot.org/c/coreboot/+/30282 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Icf1b1d7e34a7e863139c3583903f3b1e2cdc8da6 Gerrit-Change-Number: 30282 Gerrit-PatchSet: 14 Gerrit-Owner: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Reviewer: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Mon, 24 Dec 2018 12:43:59 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-MessageType: comment

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Change in ...coreboot[master]: mb/google/hatch: Add SoC and EC asl files in DSDT
by Aamir Bohra (Code Review) 24 Dec '18

24 Dec '18

Hello Subrata Banik, Rizwan Qureshi, Shelley Chen, build bot (Jenkins), Furquan Shaikh, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/30282 to look at the new patch set (#14). Change subject: mb/google/hatch: Add SoC and EC asl files in DSDT ...................................................................... mb/google/hatch: Add SoC and EC asl files in DSDT This implementation adds below code: 1. Add SOC ACPI code in dsdt.asl -> platform.asl -> globalnvs.asl -> cpu.asl -> northbridge.asl -> southbridge.asl -> sleepstate.asl 2. Add chromeos.asl in dsdt.asl 3. Add EC ACPI code in dsdt.asl -> superio.asl -> ec.asl 4. Remove config for WAK/PTS ACPI method as chromeec doesn't implement those. BUG=b:120914069 TEST=USE="-intel_mrc -bmpblk" emerge-hatch coreboot Change-Id: Icf1b1d7e34a7e863139c3583903f3b1e2cdc8da6 Signed-off-by: Aamir Bohra <aamir.bohra(a)intel.com> --- M src/mainboard/google/hatch/Kconfig M src/mainboard/google/hatch/dsdt.asl M src/mainboard/google/hatch/variants/baseboard/include/baseboard/gpio.h 3 files changed, 39 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/82/30282/14 -- To view, visit https://review.coreboot.org/c/coreboot/+/30282 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Icf1b1d7e34a7e863139c3583903f3b1e2cdc8da6 Gerrit-Change-Number: 30282 Gerrit-PatchSet: 14 Gerrit-Owner: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Reviewer: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: newpatchset

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Change in ...coreboot[master]: mainboard/facebook/fbg1701: Do initial mainboard commit
by build bot (Jenkins) (Code Review) 24 Dec '18

24 Dec '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/30414 ) Change subject: mainboard/facebook/fbg1701: Do initial mainboard commit ...................................................................... Patch Set 2: (7 comments) https://review.coreboot.org/#/c/30414/2/src/mainboard/facebook/fbg1701/irqr… File src/mainboard/facebook/fbg1701/irqroute.h: https://review.coreboot.org/#/c/30414/2/src/mainboard/facebook/fbg1701/irqr… PS2, Line 40: #define PCI_DEV_PIRQ_ROUTES \ Macros with complex values should be enclosed in parentheses https://review.coreboot.org/#/c/30414/2/src/mainboard/facebook/fbg1701/irqr… PS2, Line 62: #define PIRQ_PIC_ROUTES \ Macros with complex values should be enclosed in parentheses https://review.coreboot.org/#/c/30414/2/src/soc/intel/braswell/smbus.c File src/soc/intel/braswell/smbus.c: https://review.coreboot.org/#/c/30414/2/src/soc/intel/braswell/smbus.c@69 PS2, Line 69: if ((val & SMBHSTSTS_HOST_BUSY)) { braces {} are not necessary for single statement blocks https://review.coreboot.org/#/c/30414/2/src/soc/intel/braswell/smbus.c@135 PS2, Line 135: for (bytes_write=0; bytes_write < bytes; bytes_write++) { spaces required around that '=' (ctx:VxV) https://review.coreboot.org/#/c/30414/2/src/soc/intel/braswell/smbus.c@156 PS2, Line 156: if (bytes_write+1 < bytes) { braces {} are not necessary for single statement blocks https://review.coreboot.org/#/c/30414/2/src/soc/intel/braswell/smbus.c@169 PS2, Line 169: else else should follow close brace '}' https://review.coreboot.org/#/c/30414/2/src/soc/intel/braswell/smbus.c@263 PS2, Line 263: else else should follow close brace '}' -- To view, visit https://review.coreboot.org/c/coreboot/+/30414 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I28ac78a630ee705b1e546031f024bfe7f952ab39 Gerrit-Change-Number: 30414 Gerrit-PatchSet: 2 Gerrit-Owner: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-Reviewer: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Mon, 24 Dec 2018 11:31:29 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in ...coreboot[master]: mainboard/facebook/fbg1701: Do initial mainboard commit
by Frans Hendriks (Code Review) 24 Dec '18

24 Dec '18

Hello build bot (Jenkins), Patrick Georgi, Martin Roth, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/30414 to look at the new patch set (#2). Change subject: mainboard/facebook/fbg1701: Do initial mainboard commit ...................................................................... mainboard/facebook/fbg1701: Do initial mainboard commit No support for Facebook FBG-1701 available. coreboot implementation includes support for measured boot and verified boot. This (braswell) implementation is based on Intel Strago. BUG=N/A TEST=Facebook FBG-1701 booting Embedded Linux Change-Id: I28ac78a630ee705b1e546031f024bfe7f952ab39 Signed-off-by: Frans Hendriks <fhendriks(a)eltan.com> --- A Documentation/mainboard/facebook/fbg1701.md M Documentation/mainboard/index.md A src/mainboard/facebook/fbg1701/Kconfig A src/mainboard/facebook/fbg1701/Kconfig.name A src/mainboard/facebook/fbg1701/Makefile.inc A src/mainboard/facebook/fbg1701/acpi/dptf.asl A src/mainboard/facebook/fbg1701/acpi/ec.asl A src/mainboard/facebook/fbg1701/acpi/mainboard.asl A src/mainboard/facebook/fbg1701/acpi/sleepstates.asl A src/mainboard/facebook/fbg1701/acpi/superio.asl A src/mainboard/facebook/fbg1701/acpi_tables.c A src/mainboard/facebook/fbg1701/board_info.txt A src/mainboard/facebook/fbg1701/board_mboot.c A src/mainboard/facebook/fbg1701/board_verified_boot.c A src/mainboard/facebook/fbg1701/board_verified_boot.h A src/mainboard/facebook/fbg1701/bootblock.c A src/mainboard/facebook/fbg1701/cmos.layout A src/mainboard/facebook/fbg1701/com_init.c A src/mainboard/facebook/fbg1701/devicetree.cb A src/mainboard/facebook/fbg1701/dsdt.asl A src/mainboard/facebook/fbg1701/fadt.c A src/mainboard/facebook/fbg1701/fmap.fmd A src/mainboard/facebook/fbg1701/gpio.c A src/mainboard/facebook/fbg1701/hda_verb.c A src/mainboard/facebook/fbg1701/irqroute.c A src/mainboard/facebook/fbg1701/irqroute.h A src/mainboard/facebook/fbg1701/logo.c A src/mainboard/facebook/fbg1701/mainboard.c A src/mainboard/facebook/fbg1701/mainboard.h A src/mainboard/facebook/fbg1701/manifest.h A src/mainboard/facebook/fbg1701/onboard.h A src/mainboard/facebook/fbg1701/ramstage.c A src/mainboard/facebook/fbg1701/romstage.c A src/mainboard/facebook/fbg1701/smihandler.c A src/mainboard/facebook/fbg1701/spd/SAMSUNG_K4B8G1646D-MYKO.spd.hex M src/soc/intel/braswell/Makefile.inc A src/soc/intel/braswell/include/soc/smbus.h A src/soc/intel/braswell/smbus.c 38 files changed, 2,963 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/14/30414/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/30414 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I28ac78a630ee705b1e546031f024bfe7f952ab39 Gerrit-Change-Number: 30414 Gerrit-PatchSet: 2 Gerrit-Owner: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-Reviewer: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: newpatchset

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Change in ...coreboot[master]: mb/google/hatch: Modify hatch SPI flash layout
by V Sowmya (Code Review) 24 Dec '18

24 Dec '18

V Sowmya has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/30413 ) Change subject: mb/google/hatch: Modify hatch SPI flash layout ...................................................................... Patch Set 2: > Patch Set 2: Code-Review+2 > > i assume that we will also push required descriptor changes Yes, pushed the descriptor here -> https://chrome-internal-review.googlesource.com/c/chromeos/overlays/baseboa…. -- To view, visit https://review.coreboot.org/c/coreboot/+/30413 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3d05fb50e970737a2552b85d6aebed943bf2b6cb Gerrit-Change-Number: 30413 Gerrit-PatchSet: 2 Gerrit-Owner: V Sowmya <v.sowmya(a)intel.com> Gerrit-Reviewer: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Reviewer: Balaji Manigandan <balaji.manigandan(a)intel.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Naresh Solanki <naresh.solanki(a)intel.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: V Sowmya <v.sowmya(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Mon, 24 Dec 2018 11:15:42 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in ...coreboot[master]: mb/google/hatch: Add SoC and EC asl files in DSDT
by Rizwan Qureshi (Code Review) 24 Dec '18

24 Dec '18

Rizwan Qureshi has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/30282 ) Change subject: mb/google/hatch: Add SoC and EC asl files in DSDT ...................................................................... Patch Set 13: (1 comment) https://review.coreboot.org/#/c/30282/13/src/mainboard/google/hatch/Kconfig File src/mainboard/google/hatch/Kconfig: https://review.coreboot.org/#/c/30282/13/src/mainboard/google/hatch/Kconfig… PS13, Line 15: Mention this change in commit message. -- To view, visit https://review.coreboot.org/c/coreboot/+/30282 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Icf1b1d7e34a7e863139c3583903f3b1e2cdc8da6 Gerrit-Change-Number: 30282 Gerrit-PatchSet: 13 Gerrit-Owner: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Reviewer: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Mon, 24 Dec 2018 10:52:13 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in ...coreboot[master]: soc/intel/*: Select SUPPORT_CPU_UCODE_IN_CBFS only once
by Arthur Heymans (Code Review) 24 Dec '18

24 Dec '18

Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/30415 Change subject: soc/intel/*: Select SUPPORT_CPU_UCODE_IN_CBFS only once ...................................................................... soc/intel/*: Select SUPPORT_CPU_UCODE_IN_CBFS only once This was selected twice. Change-Id: I7e20b7d3f05ecae98db1addf5aea7bf1159f4682 Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M src/soc/intel/baytrail/Kconfig M src/soc/intel/braswell/Kconfig M src/soc/intel/broadwell/Kconfig 3 files changed, 0 insertions(+), 3 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/15/30415/1 diff --git a/src/soc/intel/baytrail/Kconfig b/src/soc/intel/baytrail/Kconfig index 1114ff0..eca8ad3 100644 --- a/src/soc/intel/baytrail/Kconfig +++ b/src/soc/intel/baytrail/Kconfig @@ -28,7 +28,6 @@ select SMP select SPI_FLASH select SSE2 - select SUPPORT_CPU_UCODE_IN_CBFS select TSC_CONSTANT_RATE select TSC_MONOTONIC_TIMER select TSC_SYNC_MFENCE diff --git a/src/soc/intel/braswell/Kconfig b/src/soc/intel/braswell/Kconfig index c383cdf..937815d 100644 --- a/src/soc/intel/braswell/Kconfig +++ b/src/soc/intel/braswell/Kconfig @@ -35,7 +35,6 @@ select SMP select SPI_FLASH select SSE2 - select SUPPORT_CPU_UCODE_IN_CBFS select TSC_CONSTANT_RATE select TSC_MONOTONIC_TIMER select TSC_SYNC_MFENCE diff --git a/src/soc/intel/broadwell/Kconfig b/src/soc/intel/broadwell/Kconfig index e6cbd95..1a4a70a 100644 --- a/src/soc/intel/broadwell/Kconfig +++ b/src/soc/intel/broadwell/Kconfig @@ -30,7 +30,6 @@ select SMP select SPI_FLASH select SSE2 - select SUPPORT_CPU_UCODE_IN_CBFS select TSC_CONSTANT_RATE select TSC_SYNC_MFENCE select UDELAY_TSC -- To view, visit https://review.coreboot.org/c/coreboot/+/30415 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7e20b7d3f05ecae98db1addf5aea7bf1159f4682 Gerrit-Change-Number: 30415 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-MessageType: newchange

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coreboot-gerrit December 2018