coreboot-gerrit December 2018

coreboot-gerrit@coreboot.org

1 participants
1832 discussions

Change in ...coreboot[master]: mb/google/hatch: Add HPD GPIO support for displays
by Maulik V Vaghela (Code Review) 24 Dec '18

24 Dec '18

Hello Subrata Banik, Aamir Bohra, Rizwan Qureshi, Shelley Chen, build bot (Jenkins), Furquan Shaikh, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/30365 to look at the new patch set (#5). Change subject: mb/google/hatch: Add HPD GPIO support for displays ...................................................................... mb/google/hatch: Add HPD GPIO support for displays Adding hot plug detect GPIO support for external Type-C display in event for cable connect/disconnect. Change-Id: If9d52dc0f9916f761c8fdd88c76968aaf663e650 Signed-off-by: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> --- M src/mainboard/google/hatch/variants/baseboard/gpio.c 1 file changed, 6 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/65/30365/5 -- To view, visit https://review.coreboot.org/c/coreboot/+/30365 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If9d52dc0f9916f761c8fdd88c76968aaf663e650 Gerrit-Change-Number: 30365 Gerrit-PatchSet: 5 Gerrit-Owner: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: newpatchset

1 0

Change in ...coreboot[master]: mb/google/hatch: Add EC trigger events and acpi configs
by Aamir Bohra (Code Review) 24 Dec '18

24 Dec '18

Aamir Bohra has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/30281 ) Change subject: mb/google/hatch: Add EC trigger events and acpi configs ...................................................................... Patch Set 13: (1 comment) https://review.coreboot.org/#/c/30281/7/src/mainboard/google/hatch/variants… File src/mainboard/google/hatch/variants/baseboard/include/baseboard/ec.h: https://review.coreboot.org/#/c/30281/7/src/mainboard/google/hatch/variants… PS7, Line 79: #endif /* __BASEBOARD_EC_H__ */ > we can add the required changes in this CL itself and call it out in commit msg […] Subrata, I would need the information on the form factor to know if the device would support the tablet mode and enable the TBMC support, updated the bug with query. I can cover the TBMC changes in another CL -- To view, visit https://review.coreboot.org/c/coreboot/+/30281 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3a86f609c269cb59e546fc7ba4ba032e5ea8341a Gerrit-Change-Number: 30281 Gerrit-PatchSet: 13 Gerrit-Owner: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Reviewer: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Mon, 24 Dec 2018 06:05:42 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Subrata Banik <subrata.banik(a)intel.com> Comment-In-Reply-To: Aamir Bohra <aamir.bohra(a)intel.com> Comment-In-Reply-To: Furquan Shaikh <furquan(a)google.com> Gerrit-MessageType: comment

1 0

Change in ...coreboot[master]: mb/google/hatch: Modify hatch SPI flash layout
by V Sowmya (Code Review) 24 Dec '18

24 Dec '18

V Sowmya has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/30413 ) Change subject: mb/google/hatch: Modify hatch SPI flash layout ...................................................................... Patch Set 2: (1 comment) https://review.coreboot.org/#/c/30413/1//COMMIT_MSG Commit Message: https://review.coreboot.org/#/c/30413/1//COMMIT_MSG@7 PS1, Line 7: hatch SPI > remove this word ? Done -- To view, visit https://review.coreboot.org/c/coreboot/+/30413 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3d05fb50e970737a2552b85d6aebed943bf2b6cb Gerrit-Change-Number: 30413 Gerrit-PatchSet: 2 Gerrit-Owner: V Sowmya <v.sowmya(a)intel.com> Gerrit-Reviewer: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Reviewer: Balaji Manigandan <balaji.manigandan(a)intel.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Naresh Solanki <naresh.solanki(a)intel.com> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: V Sowmya <v.sowmya(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Mon, 24 Dec 2018 05:59:23 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Subrata Banik <subrata.banik(a)intel.com> Gerrit-MessageType: comment

1 0

Change in ...coreboot[master]: mb/google/hatch: Modify hatch SPI flash layout
by V Sowmya (Code Review) 24 Dec '18

24 Dec '18

Hello Naresh Solanki, Subrata Banik, Balaji Manigandan, Aamir Bohra, Maulik V Vaghela, Rizwan Qureshi, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/30413 to look at the new patch set (#2). Change subject: mb/google/hatch: Modify hatch SPI flash layout ...................................................................... mb/google/hatch: Modify hatch SPI flash layout This patch modifies the hatch flash layout to support IFWI 1.6 with the following regions, Flash Region 0: Descriptor [0x0 - 0xFFF] Flash Region 1: IFWI (consist of ME and PMC FW) [0x1000 - 0x3FFFFF] Flash Region 2: BIOS [0x1400000 - 0x1FFFFFF] Change-Id: I3d05fb50e970737a2552b85d6aebed943bf2b6cb Signed-off-by: V Sowmya <v.sowmya(a)intel.com> --- M src/mainboard/google/hatch/chromeos.fmd 1 file changed, 12 insertions(+), 12 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/13/30413/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/30413 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3d05fb50e970737a2552b85d6aebed943bf2b6cb Gerrit-Change-Number: 30413 Gerrit-PatchSet: 2 Gerrit-Owner: V Sowmya <v.sowmya(a)intel.com> Gerrit-Reviewer: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Reviewer: Balaji Manigandan <balaji.manigandan(a)intel.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Naresh Solanki <naresh.solanki(a)intel.com> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: V Sowmya <v.sowmya(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: newpatchset

1 0

Change in ...coreboot[master]: nb/intel/haswell: Add support for PCIe graphics
by Tristan Corrick (Code Review) 24 Dec '18

24 Dec '18

Tristan Corrick has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/30272 ) Change subject: nb/intel/haswell: Add support for PCIe graphics ...................................................................... Patch Set 7: (1 comment) I've repeated the tests on the latest patch set. https://review.coreboot.org/#/c/30272/6//COMMIT_MSG Commit Message: https://review.coreboot.org/#/c/30272/6//COMMIT_MSG@11 PS6, Line 11: class present in a PEG slot, disable the IGD: : : Before the MRC: GGC = 0x0208, DEVEN = 0x00000039. : After the MRC: GGC = 0x0003, DEVEN = 0x00000029. : : If the IGD needs to be kept enabled, the PEG device is hidden while the : MRC runs. The link training is able to continue even while the PEG : device is hidden. : : Only PEG2 is supported. An extra (unknown) training sequence is said to : be needed for PEG3. : : The ACPI _PRT method is not yet generated, so legacy interrupt routing : doesn't work for devices with multiple functions. : : Tested on an ASRock H81M-HDS. Using an x1 PCIe card in the PEG slot : works fine. Using a Rade > Would the following work? […] Thank you for this idea! It looks like the link training continues even when the PEG device is disabled. I've updated the patch to use this approach, so there is now only a single boot flow. -- To view, visit https://review.coreboot.org/c/coreboot/+/30272 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I786ecb6eccad8de89778af7e736ed664323e220e Gerrit-Change-Number: 30272 Gerrit-PatchSet: 7 Gerrit-Owner: Tristan Corrick <tristan(a)corrick.kiwi> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Tristan Corrick <tristan(a)corrick.kiwi> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Comment-Date: Mon, 24 Dec 2018 05:53:52 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-MessageType: comment

1 0

Change in ...coreboot[master]: nb/intel/haswell: Add support for PCIe graphics
by Tristan Corrick (Code Review) 24 Dec '18

24 Dec '18

Hello Patrick Rudolph, build bot (Jenkins), Patrick Georgi, Martin Roth, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/30272 to look at the new patch set (#7). Change subject: nb/intel/haswell: Add support for PCIe graphics ...................................................................... nb/intel/haswell: Add support for PCIe graphics PEG link training is started in early romstage, before the MRC runs. The MRC will then set (and lock) GGC, and, if there is a device of VGA class present in a PEG slot, disable the IGD: Before the MRC: GGC = 0x0208, DEVEN = 0x00000039. After the MRC: GGC = 0x0003, DEVEN = 0x00000029. If the IGD needs to be kept enabled, the PEG device is hidden while the MRC runs. The link training is able to continue even while the PEG device is hidden. Only PEG2 is supported. An extra (unknown) training sequence is said to be needed for PEG3. The ACPI _PRT method is not yet generated, so legacy interrupt routing doesn't work for devices with multiple functions. Tested on an ASRock H81M-HDS. Using an x1 PCIe card in the PEG slot works fine. Using a Radeon HD 6450 graphics card also works under GNU/Linux, both using the display from the Radeon HD 6450, and when the IGD is used for display output and `DRI_PRIME=1` is set. Change-Id: I786ecb6eccad8de89778af7e736ed664323e220e Signed-off-by: Tristan Corrick <tristan(a)corrick.kiwi> --- M src/cpu/intel/haswell/romstage.c M src/northbridge/intel/haswell/early_init.c M src/northbridge/intel/haswell/haswell.h 3 files changed, 83 insertions(+), 5 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/72/30272/7 -- To view, visit https://review.coreboot.org/c/coreboot/+/30272 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I786ecb6eccad8de89778af7e736ed664323e220e Gerrit-Change-Number: 30272 Gerrit-PatchSet: 7 Gerrit-Owner: Tristan Corrick <tristan(a)corrick.kiwi> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Tristan Corrick <tristan(a)corrick.kiwi> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-MessageType: newpatchset

1 0

Change in ...coreboot[master]: nb/intel/haswell: Handle boards that do not support IGD
by Tristan Corrick (Code Review) 24 Dec '18

24 Dec '18

Hello Patrick Rudolph, Angel Pons, Arthur Heymans, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/30271 to look at the new patch set (#4). Change subject: nb/intel/haswell: Handle boards that do not support IGD ...................................................................... nb/intel/haswell: Handle boards that do not support IGD Processor graphics is disabled on, for example, the C222 and C224 chipsets. The change to resource assignment in northbridge.c prevents the following warning that occurs when the IGD is disabled: > skipping PCI: 00:00.0@3 fixed resource, size=0! Tested on a Supermicro X10SLM+-F, which has the IGD disabled by the chipset. The graphics memory is reclaimed and no issues were observed. Also tested on an ASRock H81M-HDS. This board has an IGD, but no regressions were observed. Change-Id: I86d4aef50b6588f08b86c9758a4b95ccd65e9a96 Signed-off-by: Tristan Corrick <tristan(a)corrick.kiwi> --- M src/northbridge/intel/haswell/early_init.c M src/northbridge/intel/haswell/haswell.h M src/northbridge/intel/haswell/northbridge.c 3 files changed, 41 insertions(+), 19 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/71/30271/4 -- To view, visit https://review.coreboot.org/c/coreboot/+/30271 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I86d4aef50b6588f08b86c9758a4b95ccd65e9a96 Gerrit-Change-Number: 30271 Gerrit-PatchSet: 4 Gerrit-Owner: Tristan Corrick <tristan(a)corrick.kiwi> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Tristan Corrick <tristan(a)corrick.kiwi> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: newpatchset

1 0

Change in ...coreboot[master]: nb/intel/haswell: Use DEVEN to disable devices
by Tristan Corrick (Code Review) 24 Dec '18

24 Dec '18

Hello Patrick Rudolph, Angel Pons, Arthur Heymans, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/30270 to look at the new patch set (#4). Change subject: nb/intel/haswell: Use DEVEN to disable devices ...................................................................... nb/intel/haswell: Use DEVEN to disable devices This allows devices to be properly disabled when they are set to `off` in the devicetree, or when a device has its `enabled` property set to false. A message is printed stating that a device is being disabled, even if it was already disabled via DEVEN. However, it could be useful to have this information, so such messages are kept. The device 00:04.0 is a thermal sensor on the Acer C720, but it has not been named as such in this patch. This is because the public datasheets never formally acknowledge what the device is, and how it might differ across platforms. Tested on a Supermicro X10SLM+-F. The Mini-HD audio is disabled now, silencing a warning from Linux. Also tested on an Acer C720 (Google Peppy). Disabling "device 4" from devicetree.cb works. Also tested on an ASRock H81M-HDS. For this device, and all other test devices, there were no regressions observed. Change-Id: If1504e620967449a09f113a7c771a1ec30380644 Signed-off-by: Tristan Corrick <tristan(a)corrick.kiwi> --- M src/northbridge/intel/haswell/northbridge.c 1 file changed, 46 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/70/30270/4 -- To view, visit https://review.coreboot.org/c/coreboot/+/30270 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If1504e620967449a09f113a7c771a1ec30380644 Gerrit-Change-Number: 30270 Gerrit-PatchSet: 4 Gerrit-Owner: Tristan Corrick <tristan(a)corrick.kiwi> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Tristan Corrick <tristan(a)corrick.kiwi> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: newpatchset

1 0

Change in ...coreboot[master]: nb/intel/haswell: Don't unconditionally set DEVEN
by Tristan Corrick (Code Review) 24 Dec '18

24 Dec '18

Hello Patrick Rudolph, Angel Pons, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/30269 to look at the new patch set (#4). Change subject: nb/intel/haswell: Don't unconditionally set DEVEN ...................................................................... nb/intel/haswell: Don't unconditionally set DEVEN The existing code sets DEVEN with the intention of enabling the IGD and Mini-HD audio. However, according to the datasheet [1] and some testing on hardware, the bits in DEVEN are set by default if and only if the straps/fuses say the device should be enabled. To illustrate this, here are a few initial values of DEVEN on some Haswell systems: Supermicro X10SLM+-F: 0x0000002d ASRock H81M-HDS: 0x00000039 Acer C720: 0x000000b1 On the X10SLM+-F, the IGD is disabled by default, and PEG10 & PEG11 are enabled by default. On the C720, the PEG devices are all disabled by default, while the IGD and Mini-HD audio are already enabled. There are two issues that result from the existing behaviour: PEG devices are unconditionally disabled, and devices are set as enabled when it's not actually possible to enable them. So, don't touch the DEVEN register at this stage, as there are no benefits. Interestingly, on an Acer C720 (Google Peppy), a PCI device 00:04.0 appears. It is a thermal sensor. `powerstat` was used to measure idle power usage over 30 minutes under Debian GNU/Linux 9.6. There was no change in reported power draw. [1] Desktop 4th Generation Intel® Core TM Processor Family, Desktop Intel® Pentium® Processor Family, and Desktop Intel® Celeron® Processor Family Datasheet – Volume 2 of 2. December 2013, revision 003, document number 328898. Change-Id: I242f9138472de5a0b26b5852f632b53b2920132d Signed-off-by: Tristan Corrick <tristan(a)corrick.kiwi> --- M src/northbridge/intel/haswell/early_init.c 1 file changed, 0 insertions(+), 4 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/69/30269/4 -- To view, visit https://review.coreboot.org/c/coreboot/+/30269 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I242f9138472de5a0b26b5852f632b53b2920132d Gerrit-Change-Number: 30269 Gerrit-PatchSet: 4 Gerrit-Owner: Tristan Corrick <tristan(a)corrick.kiwi> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Tristan Corrick <tristan(a)corrick.kiwi> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: newpatchset

1 0

Change in ...coreboot[master]: mb/google/poppy/variants/nami: Add sku_ids for Pyke
by Frank Wu (Code Review) 24 Dec '18

24 Dec '18

Hello Shelley Chen, build bot (Jenkins), Patrick Georgi, Furquan Shaikh, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/30412 to look at the new patch set (#2). Change subject: mb/google/poppy/variants/nami: Add sku_ids for Pyke ...................................................................... mb/google/poppy/variants/nami: Add sku_ids for Pyke Sync'ing the sku_ids list in the master sku sheet for Pyke. BUG=b:121207221 BRANCH=firmware-nami-10775.B TEST=emerge-nami coreboot chromeos-bootimage Change-Id: Ic03c3a6fe238f2692ce15c45016115087380c0ca Signed-off-by: Frank Wu <frank_wu(a)compal.corp-partner.google.com> --- M src/mainboard/google/poppy/variants/nami/gpio.c M src/mainboard/google/poppy/variants/nami/include/variant/sku.h M src/mainboard/google/poppy/variants/nami/mainboard.c 3 files changed, 6 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/12/30412/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/30412 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic03c3a6fe238f2692ce15c45016115087380c0ca Gerrit-Change-Number: 30412 Gerrit-PatchSet: 2 Gerrit-Owner: Frank Wu <frank_wu(a)compal.corp-partner.google.com> Gerrit-Reviewer: Frank Wu <frank_wu(a)compal.corp-partner.google.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Ivy Jian <ivy_jian(a)compal.corp-partner.google.com> Gerrit-MessageType: newpatchset

1 0

Jump to page:

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

2014

2013

coreboot-gerrit December 2018