coreboot-gerrit September 2017

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Change in coreboot[master]: amd/stoneyridge: Remove CONFIG_LOGICAL_CPUS setup
by Marshall Dawson (Code Review) 11 Sep '17

11 Sep '17

Marshall Dawson has uploaded this change for review. ( https://review.coreboot.org/21493 Change subject: amd/stoneyridge: Remove CONFIG_LOGICAL_CPUS setup ...................................................................... amd/stoneyridge: Remove CONFIG_LOGICAL_CPUS setup Delete the check for sibling cores and the programming of CPUID HTT and CmpLegacy back-door bits. The code has no effect on modern Family 15h APUs. The bits being modified come up set out of reset. Change-Id: Ida76863d84109b49ce6b12c71bad5b44331a2ff9 Signed-off-by: Marshall Dawson <marshalldawson3rd(a)gmail.com> --- M src/soc/amd/stoneyridge/model_15_init.c 1 file changed, 0 insertions(+), 20 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/93/21493/1 diff --git a/src/soc/amd/stoneyridge/model_15_init.c b/src/soc/amd/stoneyridge/model_15_init.c index 631e89c..7dfcdb8 100644 --- a/src/soc/amd/stoneyridge/model_15_init.c +++ b/src/soc/amd/stoneyridge/model_15_init.c @@ -37,9 +37,6 @@ u8 i; msr_t msr; int msrno; -#if IS_ENABLED(CONFIG_LOGICAL_CPUS) - u32 siblings; -#endif disable_cache(); /* Enable access to AMD RdDram and WrDram extension bits */ @@ -71,30 +68,13 @@ for (i = 0 ; i < 6 ; i++) wrmsr(MCI_STATUS + (i * 4), msr); - /* Enable the local CPU APICs */ setup_lapic(); - -#if IS_ENABLED(CONFIG_LOGICAL_CPUS) - siblings = cpuid_ecx(0x80000008) & 0xff; - - if (siblings > 0) { - msr = rdmsr_amd(CPU_ID_FEATURES_MSR); - msr.lo |= 1 << 28; - wrmsr_amd(CPU_ID_FEATURES_MSR, msr); - - msr = rdmsr_amd(CPU_ID_EXT_FEATURES_MSR); - msr.hi |= 1 << (33 - 32); - wrmsr_amd(CPU_ID_EXT_FEATURES_MSR, msr); - } - printk(BIOS_DEBUG, "siblings = %02d, ", siblings); -#endif /* DisableCf8ExtCfg */ msr = rdmsr(NB_CFG_MSR); msr.hi &= ~(1 << (46 - 32)); wrmsr(NB_CFG_MSR, msr); - /* Write protect SMM space with SMMLOCK. */ msr = rdmsr(HWCR_MSR); -- To view, visit https://review.coreboot.org/21493 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: Ida76863d84109b49ce6b12c71bad5b44331a2ff9 Gerrit-Change-Number: 21493 Gerrit-PatchSet: 1 Gerrit-Owner: Marshall Dawson <marshalldawson3rd(a)gmail.com>

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Change in coreboot[master]: amd/stoneyridge: Remove PSP BAR init from cpu init
by Marshall Dawson (Code Review) 11 Sep '17

11 Sep '17

Marshall Dawson has uploaded this change for review. ( https://review.coreboot.org/21492 Change subject: amd/stoneyridge: Remove PSP BAR init from cpu init ...................................................................... amd/stoneyridge: Remove PSP BAR init from cpu init Remove the step of setting PSP BAR3 from cpu_dev_ops .init. The BAR is configured in romstage by AmdInitPost(). Change-Id: I7e77fad3abdcb6482f1b9d849e5922a426dff5f5 Signed-off-by: Marshall Dawson <marshalldawson3rd(a)gmail.com> --- M src/soc/amd/stoneyridge/model_15_init.c 1 file changed, 0 insertions(+), 18 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/92/21492/1 diff --git a/src/soc/amd/stoneyridge/model_15_init.c b/src/soc/amd/stoneyridge/model_15_init.c index a46f322..631e89c 100644 --- a/src/soc/amd/stoneyridge/model_15_init.c +++ b/src/soc/amd/stoneyridge/model_15_init.c @@ -30,23 +30,6 @@ #include <cpu/amd/amdfam15.h> #include <arch/acpi.h> -#include <amdlib.h> -#include <PspBaseLib.h> - -void PSPProgBar3Msr(void *Buffer); - -void PSPProgBar3Msr(void *Buffer) -{ - u32 Bar3Addr; - u64 Tmp64; - /* Get Bar3 Addr */ - Bar3Addr = PspLibPciReadPspConfig(0x20); - Tmp64 = Bar3Addr; - printk(BIOS_DEBUG, "Bar3=%llx\n", Tmp64); - LibAmdMsrWrite(PSP_MSR_PRIVATE_BLOCK_BAR, &Tmp64, NULL); - LibAmdMsrRead(PSP_MSR_PRIVATE_BLOCK_BAR, &Tmp64, NULL); -} - static void model_15_init(device_t dev) { printk(BIOS_DEBUG, "Model 15 Init.\n"); @@ -106,7 +89,6 @@ } printk(BIOS_DEBUG, "siblings = %02d, ", siblings); #endif - PSPProgBar3Msr(NULL); /* DisableCf8ExtCfg */ msr = rdmsr(NB_CFG_MSR); -- To view, visit https://review.coreboot.org/21492 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: I7e77fad3abdcb6482f1b9d849e5922a426dff5f5 Gerrit-Change-Number: 21492 Gerrit-PatchSet: 1 Gerrit-Owner: Marshall Dawson <marshalldawson3rd(a)gmail.com>

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Change in coreboot[master]: amd/stoneyridge: Make cbmem_top SMM aware
by Marshall Dawson (Code Review) 11 Sep '17

11 Sep '17

Marshall Dawson has uploaded this change for review. ( https://review.coreboot.org/21491 Change subject: amd/stoneyridge: Make cbmem_top SMM aware ...................................................................... amd/stoneyridge: Make cbmem_top SMM aware Make the default for SMM_TSEG_SIZE depend on SMM_TSEG in addition to HAVE_SMI_HANDLER. Change the value returned by cbmem_top() to carve out a range to be used by TSEG. Align the value to 128KB to match the granularity of the TSegBase field. Change-Id: I54ffc10108862b7d022fbbd92bf97525b349df27 Signed-off-by: Marshall Dawson <marshalldawson3rd(a)gmail.com> --- M src/soc/amd/stoneyridge/Kconfig M src/soc/amd/stoneyridge/ramtop.c 2 files changed, 3 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/91/21491/1 diff --git a/src/soc/amd/stoneyridge/Kconfig b/src/soc/amd/stoneyridge/Kconfig index 08613fe..f8768e7 100644 --- a/src/soc/amd/stoneyridge/Kconfig +++ b/src/soc/amd/stoneyridge/Kconfig @@ -289,7 +289,7 @@ config SMM_TSEG_SIZE hex - default 0x800000 if HAVE_SMI_HANDLER + default 0x800000 if SMM_TSEG && HAVE_SMI_HANDLER default 0x0 config ACPI_CPU_STRING diff --git a/src/soc/amd/stoneyridge/ramtop.c b/src/soc/amd/stoneyridge/ramtop.c index c81e73b..bbe11d2 100644 --- a/src/soc/amd/stoneyridge/ramtop.c +++ b/src/soc/amd/stoneyridge/ramtop.c @@ -41,5 +41,6 @@ if (!tom.lo) return 0; else - return (void *)restore_top_of_low_cacheable(); + return (void *)ALIGN_DOWN(restore_top_of_low_cacheable() + - CONFIG_SMM_TSEG_SIZE, 128*KiB); } -- To view, visit https://review.coreboot.org/21491 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: I54ffc10108862b7d022fbbd92bf97525b349df27 Gerrit-Change-Number: 21491 Gerrit-PatchSet: 1 Gerrit-Owner: Marshall Dawson <marshalldawson3rd(a)gmail.com>

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Change in coreboot[master]: cpu/intel/slot_1: Increase CAR size to 8KiB
by build bot (Jenkins) (Code Review) 11 Sep '17

11 Sep '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/21349 ) Change subject: cpu/intel/slot_1: Increase CAR size to 8KiB ...................................................................... Patch Set 4: Build Successful https://qa.coreboot.org/job/coreboot-gerrit/60256/ : SUCCESS -- To view, visit https://review.coreboot.org/21349 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I5b440e7be4f3149378db88872872012c92049c20 Gerrit-Change-Number: 21349 Gerrit-PatchSet: 4 Gerrit-Owner: Keith Hui <buurin(a)gmail.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Keith Hui <buurin(a)gmail.com> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Mon, 11 Sep 2017 22:33:50 +0000 Gerrit-HasComments: No

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Change in coreboot[master]: vboot: Add config to enable EC EFS support
by build bot (Jenkins) (Code Review) 11 Sep '17

11 Sep '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/21489 ) Change subject: vboot: Add config to enable EC EFS support ...................................................................... Patch Set 4: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-checkpatch/15481/ : SUCCESS https://qa.coreboot.org/job/coreboot-gerrit/60255/ : SUCCESS -- To view, visit https://review.coreboot.org/21489 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Ic51ddd4819262162a8d8519461c4ace57ee01cb5 Gerrit-Change-Number: 21489 Gerrit-PatchSet: 4 Gerrit-Owner: Daisuke Nojiri <dnojiri(a)chromium.org> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Daisuke Nojiri <dnojiri(a)chromium.org> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Mon, 11 Sep 2017 22:28:07 +0000 Gerrit-HasComments: No

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Change in coreboot[master]: soc/intel/cannonlake: Add common ACPI support for CNL
by build bot (Jenkins) (Code Review) 11 Sep '17

11 Sep '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/21076 ) Change subject: soc/intel/cannonlake: Add common ACPI support for CNL ...................................................................... Patch Set 36: Verified-1 Build Unstable https://qa.coreboot.org/job/coreboot-gerrit/60254/ : UNSTABLE https://qa.coreboot.org/job/coreboot-checkpatch/15480/ : SUCCESS -- To view, visit https://review.coreboot.org/21076 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Ibc16d2afdd3cb9bad2ecb85cf320c88504409707 Gerrit-Change-Number: 21076 Gerrit-PatchSet: 36 Gerrit-Owner: Lijian Zhao <lijian.zhao(a)intel.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Brandon Breitenstein <brandon.breitenstein(a)intel.com> Gerrit-Reviewer: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Reviewer: John Zhao <john.zhao(a)intel.com> Gerrit-Reviewer: Krzysztof M Sywula <krzysztof.m.sywula(a)intel.com> Gerrit-Reviewer: Lijian Zhao <lijian.zhao(a)intel.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Pratikkumar V Prajapati <pratikkumar.v.prajapati(a)intel.com> Gerrit-Reviewer: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Reviewer: Shaunak Saha <shaunak.saha(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Mon, 11 Sep 2017 22:17:59 +0000 Gerrit-HasComments: No

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Change in coreboot[master]: Update vboot submodule to upstream master
by build bot (Jenkins) (Code Review) 11 Sep '17

11 Sep '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/21490 ) Change subject: Update vboot submodule to upstream master ...................................................................... Patch Set 1: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-checkpatch/15478/ : SUCCESS https://qa.coreboot.org/job/coreboot-gerrit/60253/ : SUCCESS -- To view, visit https://review.coreboot.org/21490 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I17d034e87fa642c5e30e933eb98bcfe5ceaaa3a8 Gerrit-Change-Number: 21490 Gerrit-PatchSet: 1 Gerrit-Owner: Daisuke Nojiri <dnojiri(a)chromium.org> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Mon, 11 Sep 2017 22:16:01 +0000 Gerrit-HasComments: No

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Change in coreboot[master]: vboot: Add config to enable EC EFS support
by build bot (Jenkins) (Code Review) 11 Sep '17

11 Sep '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/21489 ) Change subject: vboot: Add config to enable EC EFS support ...................................................................... Patch Set 3: Build Failed https://qa.coreboot.org/job/coreboot-gerrit/60252/ : ABORTED https://qa.coreboot.org/job/coreboot-checkpatch/15479/ : SUCCESS -- To view, visit https://review.coreboot.org/21489 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Ic51ddd4819262162a8d8519461c4ace57ee01cb5 Gerrit-Change-Number: 21489 Gerrit-PatchSet: 3 Gerrit-Owner: Daisuke Nojiri <dnojiri(a)chromium.org> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Mon, 11 Sep 2017 22:09:20 +0000 Gerrit-HasComments: No

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Change in coreboot[master]: Update vboot submodule to upstream master
by Daisuke Nojiri (Code Review) 11 Sep '17

11 Sep '17

Daisuke Nojiri has uploaded this change for review. ( https://review.coreboot.org/21490 Change subject: Update vboot submodule to upstream master ...................................................................... Update vboot submodule to upstream master Updating from commit id 3f3a496a 2017-09-01 09:20:19 (image_signing: Fix loem.ini pattern for unibuilds) to commit id 753e34e9 2017-08-31 10:12:40 (futility: Make rwsig sign command produce EC_RW image) This brings in 5 new commits. Change-Id: I17d034e87fa642c5e30e933eb98bcfe5ceaaa3a8 Signed-off-by: Daisuke Nojiri <dnojiri(a)chromium.org> --- M 3rdparty/vboot 1 file changed, 1 insertion(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/90/21490/1 diff --git a/3rdparty/vboot b/3rdparty/vboot index 96a0ead..3d25d2b 160000 --- a/3rdparty/vboot +++ b/3rdparty/vboot @@ -1 +1 @@ -Subproject commit 96a0ead803c22fb5e55effb9d3a571a4c88f29db +Subproject commit 3d25d2b4ba7886244176aa8c429fdac2acf7db3e -- To view, visit https://review.coreboot.org/21490 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: I17d034e87fa642c5e30e933eb98bcfe5ceaaa3a8 Gerrit-Change-Number: 21490 Gerrit-PatchSet: 1 Gerrit-Owner: Daisuke Nojiri <dnojiri(a)chromium.org>

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Change in coreboot[master]: soc/intel/cannonlake: Add common ACPI support for CNL
by build bot (Jenkins) (Code Review) 11 Sep '17

11 Sep '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/21076 ) Change subject: soc/intel/cannonlake: Add common ACPI support for CNL ...................................................................... Patch Set 35: Verified-1 Build Unstable https://qa.coreboot.org/job/coreboot-gerrit/60251/ : UNSTABLE https://qa.coreboot.org/job/coreboot-checkpatch/15477/ : SUCCESS -- To view, visit https://review.coreboot.org/21076 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Ibc16d2afdd3cb9bad2ecb85cf320c88504409707 Gerrit-Change-Number: 21076 Gerrit-PatchSet: 35 Gerrit-Owner: Lijian Zhao <lijian.zhao(a)intel.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Brandon Breitenstein <brandon.breitenstein(a)intel.com> Gerrit-Reviewer: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Reviewer: John Zhao <john.zhao(a)intel.com> Gerrit-Reviewer: Krzysztof M Sywula <krzysztof.m.sywula(a)intel.com> Gerrit-Reviewer: Lijian Zhao <lijian.zhao(a)intel.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Pratikkumar V Prajapati <pratikkumar.v.prajapati(a)intel.com> Gerrit-Reviewer: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Reviewer: Shaunak Saha <shaunak.saha(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Mon, 11 Sep 2017 21:43:39 +0000 Gerrit-HasComments: No

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coreboot-gerrit September 2017