coreboot-gerrit September 2017

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Change in coreboot[master]: nb/intel/i945/early_init.c: Enable upper 128bytes of CMOS
by HAOUAS Elyes (Code Review) 12 Sep '17

12 Sep '17

Hello build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/21525 to look at the new patch set (#2). Change subject: nb/intel/i945/early_init.c: Enable upper 128bytes of CMOS ...................................................................... nb/intel/i945/early_init.c: Enable upper 128bytes of CMOS Don't change bit[31:3] to enable upper 128 bytes of CMOS Change-Id: If277a2906d0a3480bf81421326818347ec11e5ad Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/northbridge/intel/i945/early_init.c 1 file changed, 1 insertion(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/25/21525/2 -- To view, visit https://review.coreboot.org/21525 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newpatchset Gerrit-Change-Id: If277a2906d0a3480bf81421326818347ec11e5ad Gerrit-Change-Number: 21525 Gerrit-PatchSet: 2 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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Change in coreboot[master]: nb/intel/i945/early_init.c: Enable upper 128bytes of CMOS
by build bot (Jenkins) (Code Review) 12 Sep '17

12 Sep '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/21525 ) Change subject: nb/intel/i945/early_init.c: Enable upper 128bytes of CMOS ...................................................................... Patch Set 1: Verified-1 Build Unstable https://qa.coreboot.org/job/coreboot-gerrit/60342/ : UNSTABLE https://qa.coreboot.org/job/coreboot-checkpatch/15565/ : SUCCESS -- To view, visit https://review.coreboot.org/21525 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: If277a2906d0a3480bf81421326818347ec11e5ad Gerrit-Change-Number: 21525 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Tue, 12 Sep 2017 19:36:35 +0000 Gerrit-HasComments: No

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Change in coreboot[master]: nb/intel/i945/early_init.c: Replace numbers with macros
by build bot (Jenkins) (Code Review) 12 Sep '17

12 Sep '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/21524 ) Change subject: nb/intel/i945/early_init.c: Replace numbers with macros ...................................................................... Patch Set 1: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-checkpatch/15564/ : SUCCESS https://qa.coreboot.org/job/coreboot-gerrit/60341/ : SUCCESS -- To view, visit https://review.coreboot.org/21524 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I270d17a2eff2c6664bf936425a6ed344be3feabe Gerrit-Change-Number: 21524 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Tue, 12 Sep 2017 19:31:46 +0000 Gerrit-HasComments: No

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Change in coreboot[master]: nb/intel/i945/early_init.c: Enable upper 128bytes of CMOS
by HAOUAS Elyes (Code Review) 12 Sep '17

12 Sep '17

HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/21525 Change subject: nb/intel/i945/early_init.c: Enable upper 128bytes of CMOS ...................................................................... nb/intel/i945/early_init.c: Enable upper 128bytes of CMOS Don't change bit[31:3] to enable upper 128 bytes of CMOS Change-Id: If277a2906d0a3480bf81421326818347ec11e5ad Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/northbridge/intel/i945/early_init.c 1 file changed, 1 insertion(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/25/21525/1 diff --git a/src/northbridge/intel/i945/early_init.c b/src/northbridge/intel/i945/early_init.c index bf486a0..e58e428 100644 --- a/src/northbridge/intel/i945/early_init.c +++ b/src/northbridge/intel/i945/early_init.c @@ -175,7 +175,7 @@ printk(BIOS_DEBUG, " done.\n"); /* Enable upper 128bytes of CMOS */ - RCBA32(RC) = (1 << 2); + RCBA32(RC) = |(1 << 2); printk(BIOS_DEBUG, "Setting up static northbridge registers..."); /* Set up all hardcoded northbridge BARs */ -- To view, visit https://review.coreboot.org/21525 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: If277a2906d0a3480bf81421326818347ec11e5ad Gerrit-Change-Number: 21525 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr>

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Change in coreboot[master]: [NotForMerge]nb/intel/i945: Add CPCTL for FSB800
by build bot (Jenkins) (Code Review) 12 Sep '17

12 Sep '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/21523 ) Change subject: [NotForMerge]nb/intel/i945: Add CPCTL for FSB800 ...................................................................... Patch Set 1: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-checkpatch/15561/ : SUCCESS https://qa.coreboot.org/job/coreboot-gerrit/60338/ : SUCCESS -- To view, visit https://review.coreboot.org/21523 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I47507fd1b290b8110a4920ae47965d16ebd8c044 Gerrit-Change-Number: 21523 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Tue, 12 Sep 2017 19:25:28 +0000 Gerrit-HasComments: No

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Change in coreboot[master]: asus/p2b-ls, asus/p3b-f: Move to EARLY_CBMEM_INIT
by build bot (Jenkins) (Code Review) 12 Sep '17

12 Sep '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/21351 ) Change subject: asus/p2b-ls,asus/p3b-f: Move to EARLY_CBMEM_INIT ...................................................................... Patch Set 8: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-checkpatch/15563/ : SUCCESS https://qa.coreboot.org/job/coreboot-gerrit/60340/ : SUCCESS -- To view, visit https://review.coreboot.org/21351 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I2e69901ed83502894f6794b3c1d7bab9aab95e51 Gerrit-Change-Number: 21351 Gerrit-PatchSet: 8 Gerrit-Owner: Keith Hui <buurin(a)gmail.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Keith Hui <buurin(a)gmail.com> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Philippe Mathieu-Daudé <f4bug(a)amsat.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Tue, 12 Sep 2017 19:24:20 +0000 Gerrit-HasComments: No

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Change in coreboot[master]: nb/intel/i945/early_init.c: Replace numbers with macros
by HAOUAS Elyes (Code Review) 12 Sep '17

12 Sep '17

HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/21524 Change subject: nb/intel/i945/early_init.c: Replace numbers with macros ...................................................................... nb/intel/i945/early_init.c: Replace numbers with macros Change-Id: I270d17a2eff2c6664bf936425a6ed344be3feabe Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/northbridge/intel/i945/early_init.c 1 file changed, 1 insertion(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/24/21524/1 diff --git a/src/northbridge/intel/i945/early_init.c b/src/northbridge/intel/i945/early_init.c index 0abd42e..bf486a0 100644 --- a/src/northbridge/intel/i945/early_init.c +++ b/src/northbridge/intel/i945/early_init.c @@ -175,7 +175,7 @@ printk(BIOS_DEBUG, " done.\n"); /* Enable upper 128bytes of CMOS */ - RCBA32(0x3400) = (1 << 2); + RCBA32(RC) = (1 << 2); printk(BIOS_DEBUG, "Setting up static northbridge registers..."); /* Set up all hardcoded northbridge BARs */ -- To view, visit https://review.coreboot.org/21524 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: I270d17a2eff2c6664bf936425a6ed344be3feabe Gerrit-Change-Number: 21524 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr>

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Change in coreboot[master]: intel/i440bx: Implement EARLY_CBMEM_INIT support
by build bot (Jenkins) (Code Review) 12 Sep '17

12 Sep '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/20977 ) Change subject: intel/i440bx: Implement EARLY_CBMEM_INIT support ...................................................................... Patch Set 15: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-checkpatch/15562/ : SUCCESS https://qa.coreboot.org/job/coreboot-gerrit/60339/ : SUCCESS -- To view, visit https://review.coreboot.org/20977 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I432f145a5343c1bb5f2b0de3b6b88f57124d1bd9 Gerrit-Change-Number: 20977 Gerrit-PatchSet: 15 Gerrit-Owner: Keith Hui <buurin(a)gmail.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Keith Hui <buurin(a)gmail.com> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Tue, 12 Sep 2017 19:21:59 +0000 Gerrit-HasComments: No

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Change in coreboot[master]: [NotForMerge]nb/intel/i945: Add CPCTL for FSB800
by HAOUAS Elyes (Code Review) 12 Sep '17

12 Sep '17

HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/21523 Change subject: [NotForMerge]nb/intel/i945: Add CPCTL for FSB800 ...................................................................... [NotForMerge]nb/intel/i945: Add CPCTL for FSB800 Change-Id: I47507fd1b290b8110a4920ae47965d16ebd8c044 Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/northbridge/intel/i945/raminit.c 1 file changed, 2 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/23/21523/1 diff --git a/src/northbridge/intel/i945/raminit.c b/src/northbridge/intel/i945/raminit.c index 8fe589b..c951777 100644 --- a/src/northbridge/intel/i945/raminit.c +++ b/src/northbridge/intel/i945/raminit.c @@ -2010,6 +2010,8 @@ MCHBAR8(CPCTL) = 0x95; break; /* FSB533 */ case 667: MCHBAR8(CPCTL) = 0x8d; break; /* FSB667 */ + case 800: + MCHBAR8(CPCTL) = 0x02; break; /* FSB800 */ } MCHBAR16(CPCTL) &= ~(1 << 11); -- To view, visit https://review.coreboot.org/21523 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: I47507fd1b290b8110a4920ae47965d16ebd8c044 Gerrit-Change-Number: 21523 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr>

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Change in coreboot[master]: Code clean up for Stoney Ridge hda/sata/usb
by build bot (Jenkins) (Code Review) 12 Sep '17

12 Sep '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/21522 ) Change subject: Code clean up for Stoney Ridge hda/sata/usb ...................................................................... Patch Set 1: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-checkpatch/15560/ : SUCCESS https://qa.coreboot.org/job/coreboot-gerrit/60337/ : SUCCESS -- To view, visit https://review.coreboot.org/21522 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I9f8dc7681ab2e651872e69a8b2e990e59ebe80c9 Gerrit-Change-Number: 21522 Gerrit-PatchSet: 1 Gerrit-Owner: Richard Spiegel <richard.spiegel(a)silverbackltd.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Tue, 12 Sep 2017 17:19:30 +0000 Gerrit-HasComments: No

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coreboot-gerrit September 2017