coreboot-gerrit August 2017

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Change in coreboot[master]: soc/intel/skylake: Use SA library to get smm region information
by build bot (Jenkins) (Code Review) 30 Aug '17

30 Aug '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/21290 ) Change subject: soc/intel/skylake: Use SA library to get smm region information ...................................................................... Patch Set 1: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-checkpatch/14877/ : SUCCESS https://qa.coreboot.org/job/coreboot-gerrit/59587/ : SUCCESS -- To view, visit https://review.coreboot.org/21290 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: If98b65805753db2c30d6fea29e401a17cef39799 Gerrit-Change-Number: 21290 Gerrit-PatchSet: 1 Gerrit-Owner: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Balaji Manigandan <balaji.manigandan(a)intel.com> Gerrit-Reviewer: Barnali Sarkar <barnali.sarkar(a)intel.com> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: dhaval v sharma <dhaval.v.sharma(a)intel.com> Gerrit-Comment-Date: Wed, 30 Aug 2017 13:14:01 +0000 Gerrit-HasComments: No

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Change in coreboot[master]: soc/intel/apollolake: Use SMM library to get tseg region information
by build bot (Jenkins) (Code Review) 30 Aug '17

30 Aug '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/21291 ) Change subject: soc/intel/apollolake: Use SMM library to get tseg region information ...................................................................... Patch Set 1: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-checkpatch/14878/ : SUCCESS https://qa.coreboot.org/job/coreboot-gerrit/59588/ : SUCCESS -- To view, visit https://review.coreboot.org/21291 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I091ca90cf576c0da35cf3fe010f8c22a18ef82d9 Gerrit-Change-Number: 21291 Gerrit-PatchSet: 1 Gerrit-Owner: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Balaji Manigandan <balaji.manigandan(a)intel.com> Gerrit-Reviewer: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Reviewer: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Wed, 30 Aug 2017 13:13:26 +0000 Gerrit-HasComments: No

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Change in coreboot[master]: ifdtool: optimize some code and data type
by build bot (Jenkins) (Code Review) 30 Aug '17

30 Aug '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/21288 ) Change subject: ifdtool: optimize some code and data type ...................................................................... Patch Set 6: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-checkpatch/14875/ : SUCCESS https://qa.coreboot.org/job/coreboot-gerrit/59585/ : SUCCESS -- To view, visit https://review.coreboot.org/21288 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I6d05418c8b32fa31dcd038a3e56f9aefe13fa9c4 Gerrit-Change-Number: 21288 Gerrit-PatchSet: 6 Gerrit-Owner: Bill XIE <persmule(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Bill XIE <persmule(a)gmail.com> Gerrit-Reviewer: Ronald G. Minnich <rminnich(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Wed, 30 Aug 2017 13:06:53 +0000 Gerrit-HasComments: No

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Change in coreboot[master]: soc/intel/apollolake: Use SMM library to get tseg region information
by Subrata Banik (Code Review) 30 Aug '17

30 Aug '17

Subrata Banik has uploaded this change for review. ( https://review.coreboot.org/21291 Change subject: soc/intel/apollolake: Use SMM library to get tseg region information ...................................................................... soc/intel/apollolake: Use SMM library to get tseg region information This patch uses smm common library function to get tseg base address and size. Hence removing definitions of smm_region() from soc directory. BRANCH=none BUG=b:63974384 TEST=Build and boot reef successfully. Change-Id: I091ca90cf576c0da35cf3fe010f8c22a18ef82d9 Signed-off-by: Subrata Banik <subrata.banik(a)intel.com> --- M src/soc/intel/apollolake/cpu.c M src/soc/intel/apollolake/memmap.c M src/soc/intel/apollolake/romstage.c 3 files changed, 8 insertions(+), 23 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/91/21291/1 diff --git a/src/soc/intel/apollolake/cpu.c b/src/soc/intel/apollolake/cpu.c index 98cd23a..0401696 100644 --- a/src/soc/intel/apollolake/cpu.c +++ b/src/soc/intel/apollolake/cpu.c @@ -178,7 +178,7 @@ const uint32_t rmask = ~((1 << 12) - 1); /* Initialize global tracking state. */ - smm_region(&smm_base, &smm_size); + smm_region_info(&smm_base, &smm_size); smm_subregion(SMM_SUBREGION_HANDLER, &handler_base, &handler_size); relo_attrs.smbase = (uint32_t)smm_base; diff --git a/src/soc/intel/apollolake/memmap.c b/src/soc/intel/apollolake/memmap.c index c54423c..f9a484a 100644 --- a/src/soc/intel/apollolake/memmap.c +++ b/src/soc/intel/apollolake/memmap.c @@ -28,40 +28,24 @@ #include <cbmem.h> #include <device/pci.h> #include <fsp/memmap.h> +#include <intelblocks/smm.h> #include <soc/systemagent.h> #include <soc/pci_devs.h> -static uintptr_t smm_region_start(void) -{ - return ALIGN_DOWN(pci_read_config32(SA_DEV_ROOT, TSEG), 1*MiB); -} - -static size_t smm_region_size(void) -{ - uintptr_t smm_end = - ALIGN_DOWN(pci_read_config32(SA_DEV_ROOT, BGSM), 1*MiB); - return smm_end - smm_region_start(); -} - void *cbmem_top(void) { - return (void *)smm_region_start(); -} - -void smm_region(void **start, size_t *size) -{ - *start = (void *)smm_region_start(); - *size = smm_region_size(); + return (void *)sa_get_tseg_base(); } int smm_subregion(int sub, void **start, size_t *size) { uintptr_t sub_base; size_t sub_size; + void *smm_base; const size_t cache_size = CONFIG_SMM_RESERVED_SIZE; - sub_base = smm_region_start(); - sub_size = smm_region_size(); + smm_region_info(&smm_base, &sub_size); + sub_base = (uintptr_t)smm_base; assert(sub_size > CONFIG_SMM_RESERVED_SIZE); diff --git a/src/soc/intel/apollolake/romstage.c b/src/soc/intel/apollolake/romstage.c index 2017d84..605a75b 100644 --- a/src/soc/intel/apollolake/romstage.c +++ b/src/soc/intel/apollolake/romstage.c @@ -33,6 +33,7 @@ #include <fsp/memmap.h> #include <fsp/util.h> #include <intelblocks/cpulib.h> +#include <intelblocks/smm.h> #include <intelblocks/systemagent.h> #include <intelblocks/pmclib.h> #include <reset.h> @@ -269,7 +270,7 @@ * when relocating the SMM handler as well as using the TSEG * region for other purposes. */ - smm_region(&smm_base, &smm_size); + smm_region_info(&smm_base, &smm_size); tseg_base = (uintptr_t)smm_base; postcar_frame_add_mtrr(&pcf, tseg_base, smm_size, MTRR_TYPE_WRBACK); -- To view, visit https://review.coreboot.org/21291 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: I091ca90cf576c0da35cf3fe010f8c22a18ef82d9 Gerrit-Change-Number: 21291 Gerrit-PatchSet: 1 Gerrit-Owner: Subrata Banik <subrata.banik(a)intel.com>

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Change in coreboot[master]: soc/intel/skylake: Use SA library to get smm region information
by Subrata Banik (Code Review) 30 Aug '17

30 Aug '17

Subrata Banik has uploaded this change for review. ( https://review.coreboot.org/21290 Change subject: soc/intel/skylake: Use SA library to get smm region information ...................................................................... soc/intel/skylake: Use SA library to get smm region information This patch uses system agent common library to know tseg region start and size. Unable to remove smm_region() function from soc code as SMM common library is not yet available for skylake use. BRANCH=none BUG=b:63974384 TEST=Build and boot eve successfully. Change-Id: If98b65805753db2c30d6fea29e401a17cef39799 Signed-off-by: Subrata Banik <subrata.banik(a)intel.com> --- M src/soc/intel/skylake/memmap.c 1 file changed, 7 insertions(+), 23 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/90/21290/1 diff --git a/src/soc/intel/skylake/memmap.c b/src/soc/intel/skylake/memmap.c index 1ccaf1d..229afa7 100644 --- a/src/soc/intel/skylake/memmap.c +++ b/src/soc/intel/skylake/memmap.c @@ -38,27 +38,10 @@ return 8*MiB; } -/* Returns base of requested region encoded in the system agent. */ -static inline uintptr_t system_agent_region_base(size_t reg) -{ - /* All regions concerned for have 1 MiB alignment. */ - return ALIGN_DOWN(pci_read_config32(SA_DEV_ROOT, reg), 1*MiB); -} - -static inline uintptr_t smm_region_start(void) -{ - return system_agent_region_base(TSEG); -} - -static inline size_t smm_region_size(void) -{ - return system_agent_region_base(BGSM) - smm_region_start(); -} - void smm_region(void **start, size_t *size) { - *start = (void *)smm_region_start(); - *size = smm_region_size(); + *start = (void *)sa_get_tseg_base(); + *size = sa_get_tseg_size(); } /* @@ -76,11 +59,12 @@ { uintptr_t sub_base; size_t sub_size; + void *smm_base; const size_t ied_size = CONFIG_IED_REGION_SIZE; const size_t cache_size = CONFIG_SMM_RESERVED_SIZE; - sub_base = smm_region_start(); - sub_size = smm_region_size(); + smm_region(&smm_base, &sub_size); + sub_base = (uintptr_t)smm_base; switch (sub) { case SMM_SUBREGION_HANDLER: @@ -170,7 +154,7 @@ dram_base -= sa_get_gsm_size(); } /* Get TSEG size */ - dram_base -= smm_region_size(); + dram_base -= sa_get_tseg_size(); /* Get DPR size */ if (IS_ENABLED(CONFIG_SA_ENABLE_DPR)) @@ -224,7 +208,7 @@ * PRMMR_BASE MSR. The system hangs if PRMRR_BASE MSR is read before * PRMRR_MASK MSR lock bit is set. */ - if (smm_region_start() == 0) + if (sa_get_tseg_base() == 0) return 0; return calculate_dram_base(); -- To view, visit https://review.coreboot.org/21290 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: If98b65805753db2c30d6fea29e401a17cef39799 Gerrit-Change-Number: 21290 Gerrit-PatchSet: 1 Gerrit-Owner: Subrata Banik <subrata.banik(a)intel.com>

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Change in coreboot[master]: mb/*/*: Remove rtc nvram configurable baud rate
by build bot (Jenkins) (Code Review) 30 Aug '17

30 Aug '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/19682 ) Change subject: mb/*/*: Remove rtc nvram configurable baud rate ...................................................................... Patch Set 10: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-checkpatch/14874/ : SUCCESS https://qa.coreboot.org/job/coreboot-gerrit/59584/ : SUCCESS -- To view, visit https://review.coreboot.org/19682 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I71698d9b188eeac73670b18b757dff5fcea0df41 Gerrit-Change-Number: 19682 Gerrit-PatchSet: 10 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Wed, 30 Aug 2017 12:59:32 +0000 Gerrit-HasComments: No

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Change in coreboot[master]: mb/*/*: Remove rtc nvram configurable baud rate
by build bot (Jenkins) (Code Review) 30 Aug '17

30 Aug '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/19682 ) Change subject: mb/*/*: Remove rtc nvram configurable baud rate ...................................................................... Patch Set 9: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-checkpatch/14873/ : SUCCESS https://qa.coreboot.org/job/coreboot-gerrit/59583/ : SUCCESS -- To view, visit https://review.coreboot.org/19682 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I71698d9b188eeac73670b18b757dff5fcea0df41 Gerrit-Change-Number: 19682 Gerrit-PatchSet: 9 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Wed, 30 Aug 2017 12:49:38 +0000 Gerrit-HasComments: No

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Change in coreboot[master]: libpayload/storage: Add Sunrise Point AHCI PCI id
by Arthur Heymans (Code Review) 30 Aug '17

30 Aug '17

Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/21289 ) Change subject: libpayload/storage: Add Sunrise Point AHCI PCI id ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/21289 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I9645d76d05014722e4ae0c398d82f7f8e34d6f1c Gerrit-Change-Number: 21289 Gerrit-PatchSet: 1 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Wed, 30 Aug 2017 11:47:05 +0000 Gerrit-HasComments: No

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Change in coreboot[master]: mainboard/intel/harcuvar: Add support for Intel Harcuvar CRB
by build bot (Jenkins) (Code Review) 30 Aug '17

30 Aug '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/20862 ) Change subject: mainboard/intel/harcuvar: Add support for Intel Harcuvar CRB ...................................................................... Patch Set 5: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-checkpatch/14872/ : SUCCESS https://qa.coreboot.org/job/coreboot-gerrit/59581/ : SUCCESS -- To view, visit https://review.coreboot.org/20862 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I088833e36e2d22d1fe1610b8dca1454092da511a Gerrit-Change-Number: 20862 Gerrit-PatchSet: 5 Gerrit-Owner: Mariusz Szafranski Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Brenton Dong <brenton.m.dong(a)intel.com> Gerrit-Reviewer: David Guckian <david.guckian(a)intel.com> Gerrit-Reviewer: FEI WANG <wangfei.jimei(a)gmail.com> Gerrit-Reviewer: Fei Wang Gerrit-Reviewer: Mariusz Szafranski Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com> Gerrit-Reviewer: York Yang <york.yang(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Wed, 30 Aug 2017 11:36:09 +0000 Gerrit-HasComments: No

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Change in coreboot[master]: soc/intel/denverton_ns: Add support for Intel Atom C3000 SoC
by build bot (Jenkins) (Code Review) 30 Aug '17

30 Aug '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/20861 ) Change subject: soc/intel/denverton_ns: Add support for Intel Atom C3000 SoC ...................................................................... Patch Set 5: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-checkpatch/14871/ : SUCCESS https://qa.coreboot.org/job/coreboot-gerrit/59582/ : SUCCESS -- To view, visit https://review.coreboot.org/20861 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I53d69aede3b92f1fe06b74a96cc40187fb9825f1 Gerrit-Change-Number: 20861 Gerrit-PatchSet: 5 Gerrit-Owner: Mariusz Szafranski Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Brenton Dong <brenton.m.dong(a)intel.com> Gerrit-Reviewer: David Guckian <david.guckian(a)intel.com> Gerrit-Reviewer: FEI WANG <wangfei.jimei(a)gmail.com> Gerrit-Reviewer: Fei Wang Gerrit-Reviewer: Mariusz Szafranski Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com> Gerrit-Reviewer: York Yang <york.yang(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Wed, 30 Aug 2017 11:33:26 +0000 Gerrit-HasComments: No

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coreboot-gerrit August 2017