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coreboot-gerrit
August 2017
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Change in coreboot[master]: soc/intel/cannonlake: add gpio files to make
by build bot (Jenkins) (Code Review)
30 Aug '17
30 Aug '17
build bot (Jenkins) has posted comments on this change. (
https://review.coreboot.org/21283
) Change subject: soc/intel/cannonlake: add gpio files to make ...................................................................... Patch Set 3: Verified+1 Build Successful
https://qa.coreboot.org/job/coreboot-checkpatch/14843/
: SUCCESS
https://qa.coreboot.org/job/coreboot-gerrit/59551/
: SUCCESS -- To view, visit
https://review.coreboot.org/21283
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Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I4931f6c6f089cc54ea168cf4a80d268d983a61de Gerrit-Change-Number: 21283 Gerrit-PatchSet: 3 Gerrit-Owner: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Wed, 30 Aug 2017 03:11:30 +0000 Gerrit-HasComments: No
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Change in coreboot[master]: soc/intel/cannonlake: add *spi.c files to make
by build bot (Jenkins) (Code Review)
30 Aug '17
30 Aug '17
build bot (Jenkins) has posted comments on this change. (
https://review.coreboot.org/21284
) Change subject: soc/intel/cannonlake: add *spi.c files to make ...................................................................... Patch Set 1: Verified+1 Build Successful
https://qa.coreboot.org/job/coreboot-checkpatch/14845/
: SUCCESS
https://qa.coreboot.org/job/coreboot-gerrit/59553/
: SUCCESS -- To view, visit
https://review.coreboot.org/21284
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Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I363d9aafa989c5a7a0b36ad9edf1c70a75604d28 Gerrit-Change-Number: 21284 Gerrit-PatchSet: 1 Gerrit-Owner: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Wed, 30 Aug 2017 03:10:31 +0000 Gerrit-HasComments: No
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Change in coreboot[master]: google/zoombini: Add new board
by build bot (Jenkins) (Code Review)
30 Aug '17
30 Aug '17
build bot (Jenkins) has posted comments on this change. (
https://review.coreboot.org/21273
) Change subject: google/zoombini: Add new board ...................................................................... Patch Set 4: Build Failed
https://qa.coreboot.org/job/coreboot-gerrit/59552/
: FAILURE
https://qa.coreboot.org/job/coreboot-checkpatch/14844/
: SUCCESS -- To view, visit
https://review.coreboot.org/21273
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Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I13ebaae403d08f1b2e6881eeba4dc1787c792b4e Gerrit-Change-Number: 21273 Gerrit-PatchSet: 4 Gerrit-Owner: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Wed, 30 Aug 2017 03:05:48 +0000 Gerrit-HasComments: No
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Change in coreboot[master]: soc/intel/cannonlake: add *spi.c files to make
by Nick Vaccaro (Code Review)
30 Aug '17
30 Aug '17
Nick Vaccaro has uploaded this change for review. (
https://review.coreboot.org/21284
Change subject: soc/intel/cannonlake: add *spi.c files to make ...................................................................... soc/intel/cannonlake: add *spi.c files to make Adds spi.c and gspi.c to verstage. Change-Id: I363d9aafa989c5a7a0b36ad9edf1c70a75604d28 Signed-off-by: Nick Vaccaro <nvaccaro(a)google.com> --- M src/soc/intel/cannonlake/Makefile.inc 1 file changed, 3 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/84/21284/1 diff --git a/src/soc/intel/cannonlake/Makefile.inc b/src/soc/intel/cannonlake/Makefile.inc index 9ce647d..dba04a8 100644 --- a/src/soc/intel/cannonlake/Makefile.inc +++ b/src/soc/intel/cannonlake/Makefile.inc @@ -44,6 +44,9 @@ postcar-y += spi.c postcar-$(CONFIG_UART_DEBUG) += uart.c +verstage-y += gspi.c +verstage-y += spi.c + CPPFLAGS_common += -I$(src)/soc/intel/cannonlake/include/fsp20 CPPFLAGS_common += -I$(src)/vendorcode/intel/fsp/fsp2_0/cannonlake -- To view, visit
https://review.coreboot.org/21284
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Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: I363d9aafa989c5a7a0b36ad9edf1c70a75604d28 Gerrit-Change-Number: 21284 Gerrit-PatchSet: 1 Gerrit-Owner: Nick Vaccaro <nvaccaro(a)google.com>
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Change in coreboot[master]: soc/intel/cannonlake: add spi and gpio files to make
by build bot (Jenkins) (Code Review)
30 Aug '17
30 Aug '17
build bot (Jenkins) has posted comments on this change. (
https://review.coreboot.org/21283
) Change subject: soc/intel/cannonlake: add spi and gpio files to make ...................................................................... Patch Set 2: Verified+1 Build Successful
https://qa.coreboot.org/job/coreboot-gerrit/59549/
: SUCCESS -- To view, visit
https://review.coreboot.org/21283
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Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I4931f6c6f089cc54ea168cf4a80d268d983a61de Gerrit-Change-Number: 21283 Gerrit-PatchSet: 2 Gerrit-Owner: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Wed, 30 Aug 2017 02:55:24 +0000 Gerrit-HasComments: No
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Change in coreboot[master]: google/zoombini: Add new board
by build bot (Jenkins) (Code Review)
30 Aug '17
30 Aug '17
build bot (Jenkins) has posted comments on this change. (
https://review.coreboot.org/21273
) Change subject: google/zoombini: Add new board ...................................................................... Patch Set 3: Build Failed
https://qa.coreboot.org/job/coreboot-gerrit/59550/
: FAILURE
https://qa.coreboot.org/job/coreboot-checkpatch/14842/
: SUCCESS -- To view, visit
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Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I13ebaae403d08f1b2e6881eeba4dc1787c792b4e Gerrit-Change-Number: 21273 Gerrit-PatchSet: 3 Gerrit-Owner: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Wed, 30 Aug 2017 02:47:48 +0000 Gerrit-HasComments: No
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Change in coreboot[master]: soc/intel/cannonlake: add spi and gpio files to make
by build bot (Jenkins) (Code Review)
30 Aug '17
30 Aug '17
build bot (Jenkins) has posted comments on this change. (
https://review.coreboot.org/21283
) Change subject: soc/intel/cannonlake: add spi and gpio files to make ...................................................................... Patch Set 1: Verified-1 Build Failed
https://qa.coreboot.org/job/coreboot-gerrit/59548/
: ABORTED
https://qa.coreboot.org/job/coreboot-checkpatch/14840/
: SUCCESS -- To view, visit
https://review.coreboot.org/21283
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Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I4931f6c6f089cc54ea168cf4a80d268d983a61de Gerrit-Change-Number: 21283 Gerrit-PatchSet: 1 Gerrit-Owner: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Wed, 30 Aug 2017 02:46:08 +0000 Gerrit-HasComments: No
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Change in coreboot[master]: soc/intel/cannonlake: add files
by Furquan Shaikh (Code Review)
30 Aug '17
30 Aug '17
Furquan Shaikh has posted comments on this change. (
https://review.coreboot.org/21283
) Change subject: soc/intel/cannonlake: add files ...................................................................... Patch Set 1: (3 comments) I think it would be a good idea to make two CLs out of this: 1. adding spi.c and gspi.c to verstage 2. adding gpio files to romstage and ramstage
https://review.coreboot.org/#/c/21283/1//COMMIT_MSG
Commit Message:
https://review.coreboot.org/#/c/21283/1//COMMIT_MSG@7
PS1, Line 7: add files Add spi* files to verstage
https://review.coreboot.org/#/c/21283/1//COMMIT_MSG@9
PS1, Line 9: some files spi.c and gspi.c
https://review.coreboot.org/#/c/21283/1/src/soc/intel/cannonlake/Kconfig
File src/soc/intel/cannonlake/Kconfig:
https://review.coreboot.org/#/c/21283/1/src/soc/intel/cannonlake/Kconfig@19
PS1, Line 19: select GENERIC_GPIO_LIB Can you please push this in a separate CL of its own. -- To view, visit
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Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I4931f6c6f089cc54ea168cf4a80d268d983a61de Gerrit-Change-Number: 21283 Gerrit-PatchSet: 1 Gerrit-Owner: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Comment-Date: Wed, 30 Aug 2017 02:42:27 +0000 Gerrit-HasComments: Yes
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Change in coreboot[master]: google/zoombini: Add new board
by build bot (Jenkins) (Code Review)
30 Aug '17
30 Aug '17
build bot (Jenkins) has posted comments on this change. (
https://review.coreboot.org/21273
) Change subject: google/zoombini: Add new board ...................................................................... Patch Set 2: Build Failed
https://qa.coreboot.org/job/coreboot-gerrit/59547/
: FAILURE
https://qa.coreboot.org/job/coreboot-checkpatch/14841/
: SUCCESS -- To view, visit
https://review.coreboot.org/21273
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Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I13ebaae403d08f1b2e6881eeba4dc1787c792b4e Gerrit-Change-Number: 21273 Gerrit-PatchSet: 2 Gerrit-Owner: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Wed, 30 Aug 2017 02:40:40 +0000 Gerrit-HasComments: No
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Change in coreboot[master]: soc/intel/cannonlake: add files
by Nick Vaccaro (Code Review)
30 Aug '17
30 Aug '17
Nick Vaccaro has uploaded this change for review. (
https://review.coreboot.org/21283
Change subject: soc/intel/cannonlake: add files ...................................................................... soc/intel/cannonlake: add files Add some files to the build. Change-Id: I4931f6c6f089cc54ea168cf4a80d268d983a61de Signed-off-by: Nick Vaccaro <nvaccaro(a)google.com> --- M src/soc/intel/cannonlake/Kconfig M src/soc/intel/cannonlake/Makefile.inc 2 files changed, 6 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/83/21283/1 diff --git a/src/soc/intel/cannonlake/Kconfig b/src/soc/intel/cannonlake/Kconfig index 65b581e..85d94f6 100644 --- a/src/soc/intel/cannonlake/Kconfig +++ b/src/soc/intel/cannonlake/Kconfig @@ -16,6 +16,7 @@ select BOOT_DEVICE_SUPPORTS_WRITES select C_ENVIRONMENT_BOOTBLOCK select CPU_INTEL_FIRMWARE_INTERFACE_TABLE + select GENERIC_GPIO_LIB select HAVE_HARD_RESET select HAVE_INTEL_FIRMWARE select HAVE_MONOTONIC_TIMER diff --git a/src/soc/intel/cannonlake/Makefile.inc b/src/soc/intel/cannonlake/Makefile.inc index 0c05057..dba04a8 100644 --- a/src/soc/intel/cannonlake/Makefile.inc +++ b/src/soc/intel/cannonlake/Makefile.inc @@ -19,6 +19,7 @@ bootblock-y += spi.c bootblock-$(CONFIG_UART_DEBUG) += uart.c +romstage-y += gpio.c romstage-y += gspi.c romstage-y += memmap.c romstage-y += pmutil.c @@ -28,6 +29,7 @@ ramstage-y += chip.c ramstage-y += cpu.c +ramstage-y += gpio.c ramstage-y += gspi.c ramstage-y += memmap.c ramstage-y += pmutil.c @@ -42,6 +44,9 @@ postcar-y += spi.c postcar-$(CONFIG_UART_DEBUG) += uart.c +verstage-y += gspi.c +verstage-y += spi.c + CPPFLAGS_common += -I$(src)/soc/intel/cannonlake/include/fsp20 CPPFLAGS_common += -I$(src)/vendorcode/intel/fsp/fsp2_0/cannonlake -- To view, visit
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Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: I4931f6c6f089cc54ea168cf4a80d268d983a61de Gerrit-Change-Number: 21283 Gerrit-PatchSet: 1 Gerrit-Owner: Nick Vaccaro <nvaccaro(a)google.com>
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