coreboot-gerrit August 2017

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Change in libgfxinit[master]: dp training: Allow to adjust pre-emphasis during clock recovery
by Nico Huber (Code Review) 28 Aug '17

28 Aug '17

Nico Huber has posted comments on this change. ( https://review.coreboot.org/21216 ) Change subject: dp training: Allow to adjust pre-emphasis during clock recovery ...................................................................... Patch Set 2: Verified+1 -- To view, visit https://review.coreboot.org/21216 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: libgfxinit Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Ibef5236ca771e0e02beb4e76650ffb6974657846 Gerrit-Change-Number: 21216 Gerrit-PatchSet: 2 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Comment-Date: Mon, 28 Aug 2017 22:09:16 +0000 Gerrit-HasComments: No

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Change in libgfxinit[master]: dp training: Fix channel equalization phase
by Nico Huber (Code Review) 28 Aug '17

28 Aug '17

Nico Huber has submitted this change and it was merged. ( https://review.coreboot.org/21215 ) Change subject: dp training: Fix channel equalization phase ...................................................................... dp training: Fix channel equalization phase First, allow updates to voltage swing too during channel equalization. Spec just says to adjust the settings as requested. Second, the loop conditions differ from the clock recovery phase. We have only 6 tries in total but no particular order is enforced. Change-Id: I4673390d8c0f9a5642702872e5b4ab11f54797c7 Signed-off-by: Nico Huber <nico.h(a)gmx.de> Reviewed-on: https://review.coreboot.org/21215 Reviewed-by: Felix Held <felix-coreboot(a)felixheld.de> --- M common/hw-gfx-dp_training.adb 1 file changed, 4 insertions(+), 15 deletions(-) Approvals: Felix Held: Looks good to me, approved Nico Huber: Verified diff --git a/common/hw-gfx-dp_training.adb b/common/hw-gfx-dp_training.adb index 19aa4d3..e7411d0 100644 --- a/common/hw-gfx-dp_training.adb +++ b/common/hw-gfx-dp_training.adb @@ -1,5 +1,6 @@ -- -- Copyright (C) 2015-2016 secunet Security Networks AG +-- Copyright (C) 2017 Nico Huber <nico.h(a)gmx.de> -- -- This program is free software; you can redistribute it and/or modify -- it under the terms of the GNU General Public License as published by @@ -244,7 +245,8 @@ EQ_Done := Success and then DP_Info.All_EQ_Done (Status, Link); Success := Success and then (CR_Done or not CR_Was_Done); - if Success and not CR_Done then + -- Voltage swing may be updated during channel equalization too. + if Success and not EQ_Done then Train_Set.Voltage_Swing := DP_Info.Max_Requested_VS (Status, Link); if Train_Set.Voltage_Swing > Max_V_Swing (Port) @@ -366,25 +368,12 @@ end if; if Success then - Retries := 0; - for Tries in 1 .. 32 loop - pragma Loop_Invariant (Retries <= Max_Retry); - + for Tries in 1 .. 6 loop Time.U_Delay (EQ_Delay); - Last_Train_Set := Train_Set; Sink_Adjust_Training (Port, DP, Link, Train_Set, CR_Done, EQ_Done, Success); exit when EQ_Done or not Success; - - if Train_Set.Pre_Emph = Last_Train_Set.Pre_Emph then - exit when Retries = Max_Retry; - Retries := Retries + 1; - else - exit when Last_Train_Set.Pre_Emph = - Max_Pre_Emph (Port, Last_Train_Set); - Retries := 0; - end if; Set_Signal_Levels (Port, Link, Train_Set); Sink_Set_Signal_Levels (Port, DP, Link, Train_Set, Success); -- To view, visit https://review.coreboot.org/21215 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: libgfxinit Gerrit-Branch: master Gerrit-MessageType: merged Gerrit-Change-Id: I4673390d8c0f9a5642702872e5b4ab11f54797c7 Gerrit-Change-Number: 21215 Gerrit-PatchSet: 3 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de>

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Change in libgfxinit[master]: dp training: Fix channel equalization phase
by Nico Huber (Code Review) 28 Aug '17

28 Aug '17

Nico Huber has posted comments on this change. ( https://review.coreboot.org/21215 ) Change subject: dp training: Fix channel equalization phase ...................................................................... Patch Set 2: Verified+1 -- To view, visit https://review.coreboot.org/21215 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: libgfxinit Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I4673390d8c0f9a5642702872e5b4ab11f54797c7 Gerrit-Change-Number: 21215 Gerrit-PatchSet: 2 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Comment-Date: Mon, 28 Aug 2017 22:09:02 +0000 Gerrit-HasComments: No

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Change in coreboot[master]: intel/common/cpulib: Add API to configure MCA
by Pratikkumar V Prajapati (Code Review) 28 Aug '17

28 Aug '17

Hello build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/21239 to look at the new patch set (#4). Change subject: intel/common/cpulib: Add API to configure MCA ...................................................................... intel/common/cpulib: Add API to configure MCA Add mca_configure() API to configure Intel Machine Check Architecture (MCA). Change-Id: I5e88c7527ce350824e48892caa978b2b78f1de20 Signed-off-by: Pratik Prajapati <pratikkumar.v.prajapati(a)intel.com> --- M src/soc/intel/common/block/cpu/cpulib.c M src/soc/intel/common/block/include/intelblocks/cpulib.h 2 files changed, 21 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/39/21239/4 -- To view, visit https://review.coreboot.org/21239 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newpatchset Gerrit-Change-Id: I5e88c7527ce350824e48892caa978b2b78f1de20 Gerrit-Change-Number: 21239 Gerrit-PatchSet: 4 Gerrit-Owner: Pratikkumar V Prajapati <pratikkumar.v.prajapati(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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Change in coreboot[master]: fintek/f81803a: Correct superio.asl
by Marshall Dawson (Code Review) 28 Aug '17

28 Aug '17

Marshall Dawson has posted comments on this change. ( https://review.coreboot.org/21161 ) Change subject: fintek/f81803a: Correct superio.asl ...................................................................... Patch Set 3: Why not squash this change with https://review.coreboot.org/#/c/21032 ? -- To view, visit https://review.coreboot.org/21161 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Ie5481678af595c65815b290676ecd9ea66d4ee75 Gerrit-Change-Number: 21161 Gerrit-PatchSet: 3 Gerrit-Owner: John E. Kabat Jr. <john.kabat(a)scarletltd.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Mon, 28 Aug 2017 22:02:59 +0000 Gerrit-HasComments: No

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Change in coreboot[master]: mainboard/google/soraka: Tune I2C params (hcnt, lcnt, hold time)
by build bot (Jenkins) (Code Review) 28 Aug '17

28 Aug '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/21242 ) Change subject: mainboard/google/soraka: Tune I2C params (hcnt, lcnt, hold time) ...................................................................... Patch Set 1: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-checkpatch/14735/ : SUCCESS https://qa.coreboot.org/job/coreboot-gerrit/59426/ : SUCCESS -- To view, visit https://review.coreboot.org/21242 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I3e12c75eb7e82a83aa6a6bcfcc11c12f83f2d3d4 Gerrit-Change-Number: 21242 Gerrit-PatchSet: 1 Gerrit-Owner: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Duncan Laurie <dlaurie(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Mon, 28 Aug 2017 21:50:54 +0000 Gerrit-HasComments: No

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Change in coreboot[master]: intel/common/block: Add API to configure MCA
by build bot (Jenkins) (Code Review) 28 Aug '17

28 Aug '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/21239 ) Change subject: intel/common/block: Add API to configure MCA ...................................................................... Patch Set 3: Build Successful https://qa.coreboot.org/job/coreboot-checkpatch/14732/ : SUCCESS https://qa.coreboot.org/job/coreboot-gerrit/59423/ : SUCCESS -- To view, visit https://review.coreboot.org/21239 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I5e88c7527ce350824e48892caa978b2b78f1de20 Gerrit-Change-Number: 21239 Gerrit-PatchSet: 3 Gerrit-Owner: Pratikkumar V Prajapati <pratikkumar.v.prajapati(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Mon, 28 Aug 2017 21:48:50 +0000 Gerrit-HasComments: No

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Change in coreboot[master]: soc/intel/cannonlake: Use common mca_configure() API
by build bot (Jenkins) (Code Review) 28 Aug '17

28 Aug '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/21241 ) Change subject: soc/intel/cannonlake: Use common mca_configure() API ...................................................................... Patch Set 2: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-checkpatch/14733/ : SUCCESS https://qa.coreboot.org/job/coreboot-gerrit/59424/ : SUCCESS -- To view, visit https://review.coreboot.org/21241 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Ib4943a7f7929775bd5e9945462e530ef68a398b8 Gerrit-Change-Number: 21241 Gerrit-PatchSet: 2 Gerrit-Owner: Pratikkumar V Prajapati <pratikkumar.v.prajapati(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Mon, 28 Aug 2017 21:48:37 +0000 Gerrit-HasComments: No

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Change in coreboot[master]: soc/intel/skylake: Use common mca_configure() API
by build bot (Jenkins) (Code Review) 28 Aug '17

28 Aug '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/21240 ) Change subject: soc/intel/skylake: Use common mca_configure() API ...................................................................... Patch Set 4: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-checkpatch/14734/ : SUCCESS https://qa.coreboot.org/job/coreboot-gerrit/59425/ : SUCCESS -- To view, visit https://review.coreboot.org/21240 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Ia96cb82fff3def46dbecb09dee94de86f179abe6 Gerrit-Change-Number: 21240 Gerrit-PatchSet: 4 Gerrit-Owner: Pratikkumar V Prajapati <pratikkumar.v.prajapati(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Mon, 28 Aug 2017 21:47:43 +0000 Gerrit-HasComments: No

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Change in coreboot[master]: mainboard/google/soraka: Tune I2C params (hcnt, lcnt, hold time)
by Furquan Shaikh (Code Review) 28 Aug '17

28 Aug '17

Furquan Shaikh has uploaded this change for review. ( https://review.coreboot.org/21242 Change subject: mainboard/google/soraka: Tune I2C params (hcnt, lcnt, hold time) ...................................................................... mainboard/google/soraka: Tune I2C params (hcnt, lcnt, hold time) Tune I2C params for I2C buses 0, 1, 2, 4 and 5 to ensure that the frequency does not exceed 400KHz. BUG=b:35948024 TEST=Verified for 25 iterations that the frequency on each bus ranges <= 400KHz. I2C0: 393 - 397 I2C1: 393 - 400 I2C2: 392 - 400 I2C4: 392 - 400 I2C5: 392 - 400 Change-Id: I3e12c75eb7e82a83aa6a6bcfcc11c12f83f2d3d4 Signed-off-by: Furquan Shaikh <furquan(a)chromium.org> --- M src/mainboard/google/poppy/variants/soraka/devicetree.cb 1 file changed, 65 insertions(+), 12 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/42/21242/1 diff --git a/src/mainboard/google/poppy/variants/soraka/devicetree.cb b/src/mainboard/google/poppy/variants/soraka/devicetree.cb index 88c7c7d..3366f26 100644 --- a/src/mainboard/google/poppy/variants/soraka/devicetree.cb +++ b/src/mainboard/google/poppy/variants/soraka/devicetree.cb @@ -165,23 +165,76 @@ register "usb3_ports[2]" = "USB3_PORT_DEFAULT(OC_SKIP)" # Type-A Port register "usb3_ports[3]" = "USB3_PORT_EMPTY" # Empty - register "i2c_voltage[0]" = "I2C_VOLTAGE_3V3" # Touchscreen - register "i2c_voltage[1]" = "I2C_VOLTAGE_3V3" # H1 - register "i2c_voltage[2]" = "I2C_VOLTAGE_1V8" # Camera - register "i2c_voltage[3]" = "I2C_VOLTAGE_1V8" # Pen - register "i2c_voltage[4]" = "I2C_VOLTAGE_1V8" # Camera - register "i2c_voltage[5]" = "I2C_VOLTAGE_1V8" # Audio + # Touchscreen + register "i2c_voltage[0]" = "I2C_VOLTAGE_3V3" + register "i2c[0]" = "{ + .speed = I2C_SPEED_FAST, + .speed_config[0] = { + .speed = I2C_SPEED_FAST, + .scl_lcnt = 180, + .scl_hcnt = 85, + .sda_hold = 36, + }, + }" + + # H1 + register "i2c_voltage[1]" = "I2C_VOLTAGE_3V3" + # Configure I2C1 for cr50 TPM. Early init is required to set up a BAR + # for TPM communication before memory is up. + register "i2c[1]" = "{ + .early_init = 1, + .speed = I2C_SPEED_FAST, + .speed_config[0] = { + .speed = I2C_SPEED_FAST, + .scl_lcnt = 190, + .scl_hcnt = 90, + .sda_hold = 36, + }, + }" + + # Camera + register "i2c_voltage[2]" = "I2C_VOLTAGE_1V8" + register "i2c[2]" = "{ + .speed = I2C_SPEED_FAST, + .speed_config[0] = { + .speed = I2C_SPEED_FAST, + .scl_lcnt = 192, + .scl_hcnt = 90, + .sda_hold = 36, + }, + }" + + # Pen + register "i2c_voltage[3]" = "I2C_VOLTAGE_1V8" + + # Camera + register "i2c_voltage[4]" = "I2C_VOLTAGE_1V8" + register "i2c[4]" = "{ + .speed = I2C_SPEED_FAST, + .speed_config[0] = { + .speed = I2C_SPEED_FAST, + .scl_lcnt = 190, + .scl_hcnt = 90, + .sda_hold = 36, + }, + }" + + # Audio + register "i2c_voltage[5]" = "I2C_VOLTAGE_1V8" + register "i2c[5]" = "{ + .speed = I2C_SPEED_FAST, + .speed_config[0] = { + .speed = I2C_SPEED_FAST, + .scl_lcnt = 180, + .scl_hcnt = 80, + .sda_hold = 36, + }, + }" # Use GSPI0 for cr50 TPM. Early init is required to set up a BAR for TPM # communication before memory is up. register "gspi[0]" = "{ .speed_mhz = 1, - .early_init = 1, - }" - - # Configure I2C1 for cr50 TPM. Early init is required to set up a BAR - # for TPM communication before memory is up. - register "i2c[1]" = "{ .early_init = 1, }" -- To view, visit https://review.coreboot.org/21242 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: I3e12c75eb7e82a83aa6a6bcfcc11c12f83f2d3d4 Gerrit-Change-Number: 21242 Gerrit-PatchSet: 1 Gerrit-Owner: Furquan Shaikh <furquan(a)google.com>

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coreboot-gerrit August 2017