Hello build bot (Jenkins),
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Change subject: mb/lenovo/s230u: fix sata port map for the msata port
......................................................................
mb/lenovo/s230u: fix sata port map for the msata port
s230u seems only have two sata ports: one for the 2.5in hdd and one for
msata. map 0x11 (port 1 & 4) enables hdd but not msata, and map 0x5
(port 1 & 3) enables both.
Change-Id: I1e9e96f0d0849b1e8c4e02aa4f686ceb5e10b3ab
Signed-off-by: Bill XIE <persmule(a)gmail.com>
---
M src/mainboard/lenovo/s230u/devicetree.cb
1 file changed, 1 insertion(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/23/19523/2
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Gerrit-Change-Id: I1e9e96f0d0849b1e8c4e02aa4f686ceb5e10b3ab
Gerrit-PatchSet: 2
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Hello build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/19522
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Change subject: mb/gigabyte/ga-b75m-d3h: add libgfxinit support
......................................................................
mb/gigabyte/ga-b75m-d3h: add libgfxinit support
Currently native video init works only on port HDMI1 wired to the
on-board DVI-D socket, both text mode and fb mode.
Tested against an IVB cpu (i7-3770T).
Change-Id: If00a7247df0c32b3d1f489fb92d86baaa8fdf8ba
Signed-off-by: Bill XIE <persmule(a)gmail.com>
---
M src/mainboard/gigabyte/ga-b75m-d3h/Kconfig
M src/mainboard/gigabyte/ga-b75m-d3h/Makefile.inc
A src/mainboard/gigabyte/ga-b75m-d3h/gma-mainboard.ads
3 files changed, 19 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/22/19522/2
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Gerrit-MessageType: newpatchset
Gerrit-Change-Id: If00a7247df0c32b3d1f489fb92d86baaa8fdf8ba
Gerrit-PatchSet: 2
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Hello build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/19521
to look at the new patch set (#2).
Change subject: mb/gigabyte/ga-b75m-d3h: Add tpm support for its onboard tpm socket
......................................................................
mb/gigabyte/ga-b75m-d3h: Add tpm support for its onboard tpm socket
Tested against a lenovo-manufactured tpm module:
a /dev/tpm0 visible inside GNU/Linux, but there is no menu items in
SeaBIOS' interface, which seems a common issue of SeaBIOS on ivb boards.
Change-Id: Id0dee74d945bae5d77eb669d8b9d468a67aee508
Signed-off-by: Bill XIE <persmule(a)gmail.com>
---
M src/mainboard/gigabyte/ga-b75m-d3h/Kconfig
M src/mainboard/gigabyte/ga-b75m-d3h/devicetree.cb
2 files changed, 5 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/21/19521/2
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Aamir Bohra has posted comments on this change. ( https://review.coreboot.org/19372 )
Change subject: soc/intel/common/block: Add Intel common smbus code
......................................................................
Patch Set 6:
> it seems very similar to what is attempted in https://review.coreboot.org/#/c/19258/
> could it be more unified instead of having code in src/soc and
> src/soutbridge that is almost identical?
This code change is an attempt to unify and bring all IP specific common code under soc/intel/common/block ,so that it can be used for existing and upcoming platforms.As this is specific to Intel IPs ,plan to keep it under soc.
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Gerrit-Change-Id: I936143a334c31937d557c6828e5876d35b133567
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Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/19521 )
Change subject: gigabyte/ga-b75m-d3h: add tpm acknowledgement for its onboard tpm socket.
......................................................................
Patch Set 1:
(2 comments)
Thanks for this.
https://review.coreboot.org/#/c/19521/1//COMMIT_MSG
Commit Message:
PS1, Line 7: a
Small nit: Uppercase.
PS1, Line 10: persmule
Needs to be real/full name.
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Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/19523 )
Change subject: mb/lenovo/s230u: fix sata port map for the msata port
......................................................................
Patch Set 1:
(1 comment)
Thanks for this.
https://review.coreboot.org/#/c/19523/1/src/mainboard/lenovo/s230u/devicetr…
File src/mainboard/lenovo/s230u/devicetree.cb:
PS1, Line 55: x5
this would disable port4, while enabling port2. unless port4 does not exist on this board 0x15 is better.
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Aamir Bohra has posted comments on this change. ( https://review.coreboot.org/19372 )
Change subject: soc/intel/common/block: Add Intel common smbus code
......................................................................
Patch Set 5:
(6 comments)
https://review.coreboot.org/#/c/19372/5/src/soc/intel/common/block/include/…
File src/soc/intel/common/block/include/intelblocks/smbus.h:
PS5, Line 21: do_smbus_write_byte
> These are very poor names for globally visible functions.
Done.Revised name in PS#6
PS5, Line 23: enable_smbus
> This is overly generic. While there are other cases like this in the tree.
Done.Changed to smbus_common_init
https://review.coreboot.org/#/c/19372/5/src/soc/intel/common/block/smbus/sm…
File src/soc/intel/common/block/smbus/smbus.c:
PS5, Line 81: SMBUS_IO_BASE
> This is now being applied to all users of this module?
Yes. SMBUS IO base address is common to skylake/apollolake/glk and upcoming Intel SOCs.
Line 103: 0xa123, /* SunRisePoint H */
> Add ids to pci_ids.h ?
ok. Do you suggest moving it to soc/pci_ids.h or define pci_ids.h under common?
https://review.coreboot.org/#/c/19372/5/src/soc/intel/common/block/smbus/sm…
File src/soc/intel/common/block/smbus/smbuslib.c:
PS5, Line 24: 0xefa0
> This is duplicated in more than one place?
Ok.move it to intelblocks/smbus.h?
Line 180: #if !ENV_RAMSTAGE
> Why are these functions being guarded?
There was definition conflict due to declaration under device/early_smbus.h and device/smbus.h for smbus_write_byte/smbus_read_byte functions,had to limit scope.
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Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/19522 )
Change subject: mb/gigabyte/ga-b75m-d3h: add libgfxinit support.
......................................................................
Patch Set 1:
(3 comments)
https://review.coreboot.org/#/c/19522/1//COMMIT_MSG
Commit Message:
Line 1: Parent: 7f2c29b6 (amd/pi/hudson: Add config option for ACPI base)
Maybe add which cpu (gen) you used, like sandy bridge or ivy bridge?
PS1, Line 9: Currently native video init works only on port HDMI1 wired to the on-board DVI-D socket, both text mode and fb mode.
wrap line
PS1, Line 12: persmule
needs to be real/full name according to: https://www.coreboot.org/Development_Guidelines#Sign-off_Procedure
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