Hello Paul Menzel, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/19625
to look at the new patch set (#2).
Change subject: drivers/i2c: Add new driver for RTC type RX6110 SA
......................................................................
drivers/i2c: Add new driver for RTC type RX6110 SA
This driver enables the usage of the external RTC chip RX6110 SA
(http://www5.epsondevice.com/en/products/i2c/rx6110sab.html) which is
connected to the I2C bus. The I2C address of this device is fixed. One
can change parameters in the device tree so that the used setup can be
adapted to match the configuration of the device on the mainboard.
Change-Id: I1290a10c2d5ad76a317c99c8b92a013309a605d6
Signed-off-by: Mario Scheithauer <mario.scheithauer(a)siemens.com>
---
A src/drivers/i2c/rx6110sa/Kconfig
A src/drivers/i2c/rx6110sa/Makefile.inc
A src/drivers/i2c/rx6110sa/chip.h
A src/drivers/i2c/rx6110sa/rx6110sa.c
A src/drivers/i2c/rx6110sa/rx6110sa.h
5 files changed, 237 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/25/19625/2
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Gerrit-MessageType: newpatchset
Gerrit-Change-Id: I1290a10c2d5ad76a317c99c8b92a013309a605d6
Gerrit-PatchSet: 2
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Owner: Mario Scheithauer <mario.scheithauer(a)siemens.com>
Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net>
Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com>
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Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/18504 )
Change subject: nb/x4x: Add ramstage IGD disable function
......................................................................
Patch Set 20:
> That should be implemented and tested on gm45 and sandybridge as
> well.
I could try to find a mPCIe to PCIe 16x riser card just for the fun of of testing gm45. probably better to test with T500.
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Gerrit-Change-Id: I74890918feb0f1ff6b971c4aaa96f1f7b75266ac
Gerrit-PatchSet: 20
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Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/19607 )
Change subject: nb/intel/x4x: Don't run NGI if IGD has not been assigned VGA cycles
......................................................................
Patch Set 4: Code-Review+1
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Gerrit-Change-Id: I0a03e35c0d7f2532edd6cc5e62d1cf07dab57f60
Gerrit-PatchSet: 4
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Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/18504 )
Change subject: nb/x4x: Add ramstage IGD disable function
......................................................................
Patch Set 20: Code-Review+1
That should be implemented and tested on gm45 and sandybridge as well.
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Gerrit-Change-Id: I74890918feb0f1ff6b971c4aaa96f1f7b75266ac
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Caesar Wang has posted comments on this change. ( https://review.coreboot.org/19622 )
Change subject: src/include: remove the __ROMCC__ to enable snprintf
......................................................................
Patch Set 4:
> edit: Oh, and only now I saw your comment. But the code you
> referred to is no longer relevant? This used to say __PRE_RAM__ but
> it was changed to __ROMCC__ in https://review.coreboot.org/17289,
> which I presume was correct (since Aaron put it there and he would
> probably know best).
Yes, https://review.coreboot.org/17289 works for me now.
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Gerrit-Change-Id: I6966dc8ebc911b954bc5ea8981df093df226dd6c
Gerrit-PatchSet: 4
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build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/19557 )
Change subject: rockchip/rk3399: enable DPLL SSC for DDR EMI test on bob
......................................................................
Patch Set 8: Verified+1
Build Successful
https://qa.coreboot.org/job/coreboot-gerrit/53487/ : SUCCESS
https://qa.coreboot.org/job/coreboot-checkpatch/9282/ : SUCCESS
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Gerrit-Change-Id: I75461d4235bcf55324e6664a1220754e770b4786
Gerrit-PatchSet: 8
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Hello build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/19557
to look at the new patch set (#8).
Change subject: rockchip/rk3399: enable DPLL SSC for DDR EMI test on bob
......................................................................
rockchip/rk3399: enable DPLL SSC for DDR EMI test on bob
Spread Spectrum Modulator (SSMOD) is a fully-digital circuit used to
modulate the frequency of the Silicon Creations’ Fractional PLL in order
to reduce EMI.
We need to turn the DPLL spread spectrum feature on to
reduce the EMI noise for DDR on bob.
Change-Id: I75461d4235bcf55324e6664a1220754e770b4786
Signed-off-by: Xing Zheng <zhengxing(a)rock-chips.com>
Signed-off-by: Caesar Wang <wxt(a)rock-chips.com>
---
M src/mainboard/google/gru/Kconfig
M src/soc/rockchip/rk3399/Kconfig
M src/soc/rockchip/rk3399/clock.c
3 files changed, 113 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/57/19557/8
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