Arthur Heymans has submitted this change and it was merged. ( https://review.coreboot.org/19523 )
Change subject: mb/lenovo/s230u: fix sata port map for the msata port
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mb/lenovo/s230u: fix sata port map for the msata port
s230u seems only have two sata ports: one for the 2.5in hdd and one for
msata. map 0x11 (port 0 & 4) enables hdd but not msata, and map 0x5
(port 0 & 2) enables both.
Change-Id: I1e9e96f0d0849b1e8c4e02aa4f686ceb5e10b3ab
Signed-off-by: Bill XIE <persmule(a)gmail.com>
Reviewed-on: https://review.coreboot.org/19523
Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org>
Reviewed-by: Alexander Couzens <lynxis(a)fe80.eu>
---
M src/mainboard/lenovo/s230u/devicetree.cb
1 file changed, 1 insertion(+), 1 deletion(-)
Approvals:
Alexander Couzens: Looks good to me, approved
build bot (Jenkins): Verified
diff --git a/src/mainboard/lenovo/s230u/devicetree.cb b/src/mainboard/lenovo/s230u/devicetree.cb
index ff4c6c4..b9b38dd 100644
--- a/src/mainboard/lenovo/s230u/devicetree.cb
+++ b/src/mainboard/lenovo/s230u/devicetree.cb
@@ -52,7 +52,7 @@
register "pcie_hotplug_map" = "{ 0, 1, 0, 1, 0, 0, 0, 0 }"
register "pcie_port_coalesce" = "1"
register "sata_interface_speed_support" = "0x3"
- register "sata_port_map" = "0x11"
+ register "sata_port_map" = "0x5"
register "superspeed_capable_ports" = "0x0000000f"
register "xhci_overcurrent_mapping" = "0x00000c03"
register "xhci_switchable_ports" = "0x0000000f"
--
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Gerrit-MessageType: merged
Gerrit-Change-Id: I1e9e96f0d0849b1e8c4e02aa4f686ceb5e10b3ab
Gerrit-PatchSet: 12
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Owner: Bill XIE <persmule(a)gmail.com>
Gerrit-Reviewer: Alexander Couzens <lynxis(a)fe80.eu>
Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz>
Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org>
Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/19644 )
Change subject: mb/lenovo/x201: Add support for ThinkLight
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Patch Set 1: Code-Review+2
(2 comments)
Nice find!
https://review.coreboot.org/#/c/19644/1//COMMIT_MSG
Commit Message:
PS1, Line 16: BIOS the UCMS method
Vendor bios seems to uses SMI for this on x200. also on x201?
PS1, Line 21: This change would potentially benefit all currently supported Thinkpad
: models, I only have an X201 available for tests though
I'll try to test on x60 and x200.
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Gerrit-MessageType: comment
Gerrit-Change-Id: I80285f6630b5830766d82e3ecd174c4a51aa9066
Gerrit-PatchSet: 1
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Owner: Stefan Ott <coreboot(a)desire.ch>
Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz>
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Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/19072 )
Change subject: ec: add support for KBC1126 in HP laptops
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Patch Set 5:
(1 comment)
https://review.coreboot.org/#/c/19072/3/src/ec/hp/kbc1126/Makefile.inc
File src/ec/hp/kbc1126/Makefile.inc:
PS3, Line 28: $(KBC1126_EC_INSERT) $(obj)/coreboot.pre \
: $(CONFIG_KBC1126_FW1) $(CONFIG_KBC1126_FW2) \
: $(CONFIG_KBC1126_FW1_OFFSET) $(CONFIG_KBC1126_FW2_OFFSET)
> It can, so users need to configure FW2_OFFSET to be at lease 64K smaller th
Maybe using Makefile to include the files at a certain offset is the way to go. how mrc.cache is added is a good example. It provides a 'position' option to specify base.
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Gerrit-Change-Id: I6b16eb7e26303eda740f52d667dedb7cc04b4ef0
Gerrit-PatchSet: 5
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Owner: Iru Cai <mytbk920423(a)gmail.com>
Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz>
Gerrit-Reviewer: Iru Cai <mytbk920423(a)gmail.com>
Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-HasComments: Yes