Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/19662 )
Change subject: src/sb/bd82x6x: Use default DxxIP and DxxIR
......................................................................
Patch Set 9: Code-Review-1
(3 comments)
devicetree with mptable generation still needs to be fixed for this...
https://review.coreboot.org/#/c/19662/4/src/southbridge/intel/bd82x6x/acpi/…
File src/southbridge/intel/bd82x6x/acpi/default_irq_route.asl:
> I suppose this can be included from pch.asl now? instead of each dsdt.asl.
ok
PS4, Line 24: /* Onboard graphics (IGD) 0:2.0 */
: Package() { 0x0002ffff, 0, 0, 16 },/* GFX INTA -> PIRQA (MSI) */
: /* XHCI 0:14.0 (ivy only) */
> wrong pins
I'll remove it.
PS4, Line 59: A
> A?
thanks, must have forgotten it.
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Gerrit-MessageType: comment
Gerrit-Change-Id: I7660c03dca0b7db34cf725488b6d6538fdfde62d
Gerrit-PatchSet: 9
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz>
Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz>
Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de>
Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-HasComments: Yes
Hello build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/19662
to look at the new patch set (#9).
Change subject: src/sb/bd82x6x: Use default DxxIP and DxxIR
......................................................................
src/sb/bd82x6x: Use default DxxIP and DxxIR
The defaults only use PIRQ A, B, C and D for PCI devices which does
not conflict with PIRQ needed on some chromebooks needed for trackpad
and/or light sensor.
This also affects ibexpeak which uses the same code and has the same
defaults.
Change-Id: I7660c03dca0b7db34cf725488b6d6538fdfde62d
Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz>
---
M src/mainboard/apple/macbookair4_2/dsdt.asl
M src/mainboard/gigabyte/ga-b75m-d3h/dsdt.asl
M src/mainboard/gigabyte/ga-b75m-d3v/dsdt.asl
D src/mainboard/google/butterfly/acpi/sandybridge_pci_irqs.asl
M src/mainboard/google/butterfly/dsdt.asl
M src/mainboard/google/butterfly/romstage.c
D src/mainboard/google/link/acpi/ivybridge_pci_irqs.asl
D src/mainboard/google/link/acpi/sandybridge_pci_irqs.asl
M src/mainboard/google/link/dsdt.asl
M src/mainboard/google/link/romstage.c
D src/mainboard/google/parrot/acpi/ivybridge_pci_irqs.asl
D src/mainboard/google/parrot/acpi/sandybridge_pci_irqs.asl
M src/mainboard/google/parrot/dsdt.asl
M src/mainboard/google/parrot/romstage.c
D src/mainboard/google/stout/acpi/sandybridge_pci_irqs.asl
M src/mainboard/google/stout/dsdt.asl
M src/mainboard/google/stout/romstage.c
D src/mainboard/intel/emeraldlake2/acpi/ivybridge_pci_irqs.asl
M src/mainboard/intel/emeraldlake2/dsdt.asl
M src/mainboard/intel/emeraldlake2/romstage.c
M src/mainboard/kontron/ktqm77/dsdt.asl
M src/mainboard/lenovo/l520/dsdt.asl
M src/mainboard/lenovo/s230u/dsdt.asl
M src/mainboard/lenovo/t420/dsdt.asl
M src/mainboard/lenovo/t420s/dsdt.asl
M src/mainboard/lenovo/t430s/dsdt.asl
M src/mainboard/lenovo/t520/dsdt.asl
M src/mainboard/lenovo/t530/dsdt.asl
M src/mainboard/lenovo/x1_carbon_gen1/dsdt.asl
M src/mainboard/lenovo/x201/dsdt.asl
M src/mainboard/lenovo/x201/romstage.c
M src/mainboard/lenovo/x220/dsdt.asl
M src/mainboard/lenovo/x230/dsdt.asl
M src/mainboard/packardbell/ms2290/dsdt.asl
M src/mainboard/packardbell/ms2290/romstage.c
M src/mainboard/roda/rv11/dsdt.asl
D src/mainboard/samsung/lumpy/acpi/sandybridge_pci_irqs.asl
M src/mainboard/samsung/lumpy/dsdt.asl
M src/mainboard/samsung/lumpy/romstage.c
D src/mainboard/samsung/stumpy/acpi/sandybridge_pci_irqs.asl
M src/mainboard/samsung/stumpy/dsdt.asl
M src/mainboard/samsung/stumpy/romstage.c
M src/mainboard/sapphire/pureplatinumh61/dsdt.asl
M src/northbridge/intel/sandybridge/romstage.c
M src/southbridge/intel/bd82x6x/Makefile.inc
M src/southbridge/intel/bd82x6x/acpi/default_irq_route.asl
M src/southbridge/intel/bd82x6x/acpi/pch.asl
D src/southbridge/intel/bd82x6x/early_rcba.c
M src/southbridge/intel/ibexpeak/Makefile.inc
49 files changed, 38 insertions(+), 926 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/62/19662/9
--
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To unsubscribe, visit https://review.coreboot.org/settings
Gerrit-MessageType: newpatchset
Gerrit-Change-Id: I7660c03dca0b7db34cf725488b6d6538fdfde62d
Gerrit-PatchSet: 9
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz>
Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de>
Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Hello build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/19662
to look at the new patch set (#8).
Change subject: src/sb/bd82x6x: Use default DxxIP and DxxIR
......................................................................
src/sb/bd82x6x: Use default DxxIP and DxxIR
The defaults only use PIRQ A, B, C and D for PCI devices which does
not conflict with PIRQ needed on some chromebooks needed for trackpad
and/or light sensor.
This also affects ibexpeak which uses the same code and has the same
defaults.
Change-Id: I7660c03dca0b7db34cf725488b6d6538fdfde62d
Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz>
---
D src/mainboard/google/butterfly/acpi/sandybridge_pci_irqs.asl
M src/mainboard/google/butterfly/dsdt.asl
M src/mainboard/google/butterfly/romstage.c
D src/mainboard/google/link/acpi/ivybridge_pci_irqs.asl
D src/mainboard/google/link/acpi/sandybridge_pci_irqs.asl
M src/mainboard/google/link/dsdt.asl
M src/mainboard/google/link/romstage.c
D src/mainboard/google/parrot/acpi/ivybridge_pci_irqs.asl
D src/mainboard/google/parrot/acpi/sandybridge_pci_irqs.asl
M src/mainboard/google/parrot/dsdt.asl
M src/mainboard/google/parrot/romstage.c
D src/mainboard/google/stout/acpi/sandybridge_pci_irqs.asl
M src/mainboard/google/stout/dsdt.asl
M src/mainboard/google/stout/romstage.c
D src/mainboard/intel/emeraldlake2/acpi/ivybridge_pci_irqs.asl
M src/mainboard/intel/emeraldlake2/dsdt.asl
M src/mainboard/intel/emeraldlake2/romstage.c
M src/mainboard/kontron/ktqm77/dsdt.asl
M src/mainboard/lenovo/s230u/dsdt.asl
M src/mainboard/lenovo/t420/dsdt.asl
M src/mainboard/lenovo/t420s/dsdt.asl
M src/mainboard/lenovo/t430s/dsdt.asl
M src/mainboard/lenovo/t520/dsdt.asl
M src/mainboard/lenovo/t530/dsdt.asl
M src/mainboard/lenovo/x1_carbon_gen1/dsdt.asl
M src/mainboard/lenovo/x201/dsdt.asl
M src/mainboard/lenovo/x201/romstage.c
M src/mainboard/lenovo/x220/dsdt.asl
M src/mainboard/lenovo/x230/dsdt.asl
M src/mainboard/packardbell/ms2290/dsdt.asl
M src/mainboard/packardbell/ms2290/romstage.c
M src/mainboard/roda/rv11/dsdt.asl
D src/mainboard/samsung/lumpy/acpi/sandybridge_pci_irqs.asl
M src/mainboard/samsung/lumpy/dsdt.asl
M src/mainboard/samsung/lumpy/romstage.c
D src/mainboard/samsung/stumpy/acpi/sandybridge_pci_irqs.asl
M src/mainboard/samsung/stumpy/dsdt.asl
M src/mainboard/samsung/stumpy/romstage.c
M src/northbridge/intel/sandybridge/romstage.c
M src/southbridge/intel/bd82x6x/Makefile.inc
M src/southbridge/intel/bd82x6x/acpi/default_irq_route.asl
M src/southbridge/intel/bd82x6x/acpi/pch.asl
D src/southbridge/intel/bd82x6x/early_rcba.c
M src/southbridge/intel/ibexpeak/Makefile.inc
44 files changed, 38 insertions(+), 921 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/62/19662/8
--
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To unsubscribe, visit https://review.coreboot.org/settings
Gerrit-MessageType: newpatchset
Gerrit-Change-Id: I7660c03dca0b7db34cf725488b6d6538fdfde62d
Gerrit-PatchSet: 8
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz>
Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de>
Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Hello build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/19662
to look at the new patch set (#7).
Change subject: [WIP]src/sb/bd82x6x: Use default DxxIP and DxxIR
......................................................................
[WIP]src/sb/bd82x6x: Use default DxxIP and DxxIR
The defaults only use PIRQ A, B, C and D for PCI devices which does
not conflict with PIRQ needed on some chromebooks needed for trackpad
and/or light sensor.
TODO: check if ibexpeak has same defaults.
Change-Id: I7660c03dca0b7db34cf725488b6d6538fdfde62d
Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz>
---
D src/mainboard/google/butterfly/acpi/sandybridge_pci_irqs.asl
M src/mainboard/google/butterfly/dsdt.asl
M src/mainboard/google/butterfly/romstage.c
D src/mainboard/google/link/acpi/ivybridge_pci_irqs.asl
D src/mainboard/google/link/acpi/sandybridge_pci_irqs.asl
M src/mainboard/google/link/dsdt.asl
M src/mainboard/google/link/romstage.c
D src/mainboard/google/parrot/acpi/ivybridge_pci_irqs.asl
D src/mainboard/google/parrot/acpi/sandybridge_pci_irqs.asl
M src/mainboard/google/parrot/dsdt.asl
M src/mainboard/google/parrot/romstage.c
D src/mainboard/google/stout/acpi/sandybridge_pci_irqs.asl
M src/mainboard/google/stout/dsdt.asl
M src/mainboard/google/stout/romstage.c
D src/mainboard/intel/emeraldlake2/acpi/ivybridge_pci_irqs.asl
M src/mainboard/intel/emeraldlake2/dsdt.asl
M src/mainboard/intel/emeraldlake2/romstage.c
M src/mainboard/kontron/ktqm77/dsdt.asl
M src/mainboard/lenovo/s230u/dsdt.asl
M src/mainboard/lenovo/t420/dsdt.asl
M src/mainboard/lenovo/t420s/dsdt.asl
M src/mainboard/lenovo/t430s/dsdt.asl
M src/mainboard/lenovo/t520/dsdt.asl
M src/mainboard/lenovo/t530/dsdt.asl
M src/mainboard/lenovo/x1_carbon_gen1/dsdt.asl
M src/mainboard/lenovo/x201/dsdt.asl
M src/mainboard/lenovo/x201/romstage.c
M src/mainboard/lenovo/x220/dsdt.asl
M src/mainboard/lenovo/x230/dsdt.asl
M src/mainboard/packardbell/ms2290/dsdt.asl
M src/mainboard/packardbell/ms2290/romstage.c
M src/mainboard/roda/rv11/dsdt.asl
D src/mainboard/samsung/lumpy/acpi/sandybridge_pci_irqs.asl
M src/mainboard/samsung/lumpy/dsdt.asl
M src/mainboard/samsung/lumpy/romstage.c
D src/mainboard/samsung/stumpy/acpi/sandybridge_pci_irqs.asl
M src/mainboard/samsung/stumpy/dsdt.asl
M src/mainboard/samsung/stumpy/romstage.c
M src/northbridge/intel/sandybridge/romstage.c
M src/southbridge/intel/bd82x6x/Makefile.inc
M src/southbridge/intel/bd82x6x/acpi/default_irq_route.asl
M src/southbridge/intel/bd82x6x/acpi/pch.asl
D src/southbridge/intel/bd82x6x/early_rcba.c
M src/southbridge/intel/ibexpeak/Makefile.inc
44 files changed, 37 insertions(+), 914 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/62/19662/7
--
To view, visit https://review.coreboot.org/19662
To unsubscribe, visit https://review.coreboot.org/settings
Gerrit-MessageType: newpatchset
Gerrit-Change-Id: I7660c03dca0b7db34cf725488b6d6538fdfde62d
Gerrit-PatchSet: 7
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz>
Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de>
Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>