Hello build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/19662
to look at the new patch set (#6).
Change subject: [WIP]src/sb/bd82x6x: Use default DxxIP and DxxIR
......................................................................
[WIP]src/sb/bd82x6x: Use default DxxIP and DxxIR
The defaults only use PIRQ A, B, C and D for PCI devices which does
not conflict with PIRQ needed on some chromebooks needed for trackpad
and/or light sensor.
TODO: check if ibexpeak has same defaults.
Change-Id: I7660c03dca0b7db34cf725488b6d6538fdfde62d
Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz>
---
D src/mainboard/google/butterfly/acpi/sandybridge_pci_irqs.asl
M src/mainboard/google/butterfly/dsdt.asl
M src/mainboard/google/butterfly/romstage.c
D src/mainboard/google/link/acpi/ivybridge_pci_irqs.asl
D src/mainboard/google/link/acpi/sandybridge_pci_irqs.asl
M src/mainboard/google/link/dsdt.asl
M src/mainboard/google/link/romstage.c
D src/mainboard/google/parrot/acpi/ivybridge_pci_irqs.asl
D src/mainboard/google/parrot/acpi/sandybridge_pci_irqs.asl
M src/mainboard/google/parrot/dsdt.asl
M src/mainboard/google/parrot/romstage.c
D src/mainboard/google/stout/acpi/sandybridge_pci_irqs.asl
M src/mainboard/google/stout/dsdt.asl
M src/mainboard/google/stout/romstage.c
D src/mainboard/intel/emeraldlake2/acpi/ivybridge_pci_irqs.asl
M src/mainboard/intel/emeraldlake2/romstage.c
M src/mainboard/lenovo/x201/romstage.c
M src/mainboard/packardbell/ms2290/romstage.c
D src/mainboard/samsung/lumpy/acpi/sandybridge_pci_irqs.asl
M src/mainboard/samsung/lumpy/dsdt.asl
M src/mainboard/samsung/lumpy/romstage.c
D src/mainboard/samsung/stumpy/acpi/sandybridge_pci_irqs.asl
M src/mainboard/samsung/stumpy/dsdt.asl
M src/mainboard/samsung/stumpy/romstage.c
M src/northbridge/intel/sandybridge/romstage.c
M src/southbridge/intel/bd82x6x/Makefile.inc
M src/southbridge/intel/bd82x6x/acpi/default_irq_route.asl
D src/southbridge/intel/bd82x6x/early_rcba.c
M src/southbridge/intel/ibexpeak/Makefile.inc
29 files changed, 41 insertions(+), 900 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/62/19662/6
--
To view, visit https://review.coreboot.org/19662
To unsubscribe, visit https://review.coreboot.org/settings
Gerrit-MessageType: newpatchset
Gerrit-Change-Id: I7660c03dca0b7db34cf725488b6d6538fdfde62d
Gerrit-PatchSet: 6
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz>
Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Hello build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/19662
to look at the new patch set (#5).
Change subject: [WIP]src/sb/bd82x6x: Use default DxxIP and DxxIR
......................................................................
[WIP]src/sb/bd82x6x: Use default DxxIP and DxxIR
The defaults only use PIRQ A, B, C and D for PCI devices which does
not conflict with PIRQ needed on some chromebooks needed for trackpad
and/or light sensor.
TODO: check if ibexpeak has same defaults.
Change-Id: I7660c03dca0b7db34cf725488b6d6538fdfde62d
Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz>
---
D src/mainboard/google/butterfly/acpi/sandybridge_pci_irqs.asl
M src/mainboard/google/butterfly/dsdt.asl
M src/mainboard/google/butterfly/romstage.c
D src/mainboard/google/link/acpi/ivybridge_pci_irqs.asl
D src/mainboard/google/link/acpi/sandybridge_pci_irqs.asl
M src/mainboard/google/link/dsdt.asl
M src/mainboard/google/link/romstage.c
D src/mainboard/google/parrot/acpi/ivybridge_pci_irqs.asl
D src/mainboard/google/parrot/acpi/sandybridge_pci_irqs.asl
M src/mainboard/google/parrot/dsdt.asl
M src/mainboard/google/parrot/romstage.c
D src/mainboard/google/stout/acpi/sandybridge_pci_irqs.asl
M src/mainboard/google/stout/dsdt.asl
M src/mainboard/google/stout/romstage.c
D src/mainboard/intel/emeraldlake2/acpi/ivybridge_pci_irqs.asl
M src/mainboard/intel/emeraldlake2/romstage.c
D src/mainboard/samsung/lumpy/acpi/sandybridge_pci_irqs.asl
M src/mainboard/samsung/lumpy/dsdt.asl
M src/mainboard/samsung/lumpy/romstage.c
D src/mainboard/samsung/stumpy/acpi/sandybridge_pci_irqs.asl
M src/mainboard/samsung/stumpy/dsdt.asl
M src/mainboard/samsung/stumpy/romstage.c
M src/northbridge/intel/sandybridge/romstage.c
M src/southbridge/intel/bd82x6x/Makefile.inc
M src/southbridge/intel/bd82x6x/acpi/default_irq_route.asl
D src/southbridge/intel/bd82x6x/early_rcba.c
M src/southbridge/intel/ibexpeak/Makefile.inc
27 files changed, 41 insertions(+), 896 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/62/19662/5
--
To view, visit https://review.coreboot.org/19662
To unsubscribe, visit https://review.coreboot.org/settings
Gerrit-MessageType: newpatchset
Gerrit-Change-Id: I7660c03dca0b7db34cf725488b6d6538fdfde62d
Gerrit-PatchSet: 5
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz>
Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Hello build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/19662
to look at the new patch set (#4).
Change subject: [WIP]src/sb/bd82x6x: Use default DxxIP and DxxIR
......................................................................
[WIP]src/sb/bd82x6x: Use default DxxIP and DxxIR
The defaults only use PIRQ A, B, C and D for PCI devices which does
not conflict with PIRQ needed on some chromebooks needed for trackpad
and/or light sensor.
Change-Id: I7660c03dca0b7db34cf725488b6d6538fdfde62d
Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz>
---
D src/mainboard/google/butterfly/acpi/sandybridge_pci_irqs.asl
M src/mainboard/google/butterfly/dsdt.asl
M src/mainboard/google/butterfly/romstage.c
D src/mainboard/google/link/acpi/ivybridge_pci_irqs.asl
D src/mainboard/google/link/acpi/sandybridge_pci_irqs.asl
M src/mainboard/google/link/dsdt.asl
M src/mainboard/google/link/romstage.c
D src/mainboard/google/parrot/acpi/ivybridge_pci_irqs.asl
D src/mainboard/google/parrot/acpi/sandybridge_pci_irqs.asl
M src/mainboard/google/parrot/dsdt.asl
M src/mainboard/google/parrot/romstage.c
D src/mainboard/google/stout/acpi/sandybridge_pci_irqs.asl
M src/mainboard/google/stout/dsdt.asl
M src/mainboard/google/stout/romstage.c
D src/mainboard/intel/emeraldlake2/acpi/ivybridge_pci_irqs.asl
D src/mainboard/samsung/lumpy/acpi/sandybridge_pci_irqs.asl
M src/mainboard/samsung/lumpy/dsdt.asl
M src/mainboard/samsung/lumpy/romstage.c
D src/mainboard/samsung/stumpy/acpi/sandybridge_pci_irqs.asl
M src/mainboard/samsung/stumpy/dsdt.asl
M src/mainboard/samsung/stumpy/romstage.c
M src/northbridge/intel/sandybridge/romstage.c
M src/southbridge/intel/bd82x6x/Makefile.inc
M src/southbridge/intel/bd82x6x/acpi/default_irq_route.asl
D src/southbridge/intel/bd82x6x/early_rcba.c
25 files changed, 41 insertions(+), 893 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/62/19662/4
--
To view, visit https://review.coreboot.org/19662
To unsubscribe, visit https://review.coreboot.org/settings
Gerrit-MessageType: newpatchset
Gerrit-Change-Id: I7660c03dca0b7db34cf725488b6d6538fdfde62d
Gerrit-PatchSet: 4
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz>
Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Hello build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/19662
to look at the new patch set (#3).
Change subject: [WIP]src/sb/bd82x6x: Use default DxxIP and DxxIR
......................................................................
[WIP]src/sb/bd82x6x: Use default DxxIP and DxxIR
The defaults only use PIRQ A, B, C and D for PCI devices which does
not conflict with PIRQ needed on some chromebooks needed for trackpad
and/or light sensor.
Change-Id: I7660c03dca0b7db34cf725488b6d6538fdfde62d
Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz>
---
D src/mainboard/google/butterfly/acpi/sandybridge_pci_irqs.asl
M src/mainboard/google/butterfly/dsdt.asl
M src/mainboard/google/butterfly/romstage.c
D src/mainboard/google/link/acpi/ivybridge_pci_irqs.asl
D src/mainboard/google/link/acpi/sandybridge_pci_irqs.asl
M src/mainboard/google/link/dsdt.asl
M src/mainboard/google/link/romstage.c
D src/mainboard/google/parrot/acpi/ivybridge_pci_irqs.asl
D src/mainboard/google/parrot/acpi/sandybridge_pci_irqs.asl
M src/mainboard/google/parrot/dsdt.asl
M src/mainboard/google/parrot/romstage.c
D src/mainboard/google/stout/acpi/sandybridge_pci_irqs.asl
M src/mainboard/google/stout/dsdt.asl
M src/mainboard/google/stout/romstage.c
D src/mainboard/intel/emeraldlake2/acpi/ivybridge_pci_irqs.asl
D src/mainboard/samsung/lumpy/acpi/sandybridge_pci_irqs.asl
M src/mainboard/samsung/lumpy/dsdt.asl
M src/mainboard/samsung/lumpy/romstage.c
D src/mainboard/samsung/stumpy/acpi/sandybridge_pci_irqs.asl
M src/mainboard/samsung/stumpy/dsdt.asl
M src/mainboard/samsung/stumpy/romstage.c
M src/northbridge/intel/sandybridge/romstage.c
M src/southbridge/intel/bd82x6x/Makefile.inc
M src/southbridge/intel/bd82x6x/acpi/default_irq_route.asl
D src/southbridge/intel/bd82x6x/early_rcba.c
25 files changed, 41 insertions(+), 893 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/62/19662/3
--
To view, visit https://review.coreboot.org/19662
To unsubscribe, visit https://review.coreboot.org/settings
Gerrit-MessageType: newpatchset
Gerrit-Change-Id: I7660c03dca0b7db34cf725488b6d6538fdfde62d
Gerrit-PatchSet: 3
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz>
Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Hello build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/19662
to look at the new patch set (#2).
Change subject: [WIP]src/sb/bd82x6x: Use default DxxIP and DxxIR
......................................................................
[WIP]src/sb/bd82x6x: Use default DxxIP and DxxIR
The defaults only use PIRQ A, B, C and D for PCI devices which does
not conflict with PIRQ needed on some chromebooks needed for trackpad
and/or light sensor.
Change-Id: I7660c03dca0b7db34cf725488b6d6538fdfde62d
Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz>
---
D src/mainboard/google/butterfly/acpi/sandybridge_pci_irqs.asl
M src/mainboard/google/butterfly/dsdt.asl
M src/mainboard/google/butterfly/romstage.c
D src/mainboard/google/link/acpi/ivybridge_pci_irqs.asl
D src/mainboard/google/link/acpi/sandybridge_pci_irqs.asl
M src/mainboard/google/link/dsdt.asl
M src/mainboard/google/link/romstage.c
D src/mainboard/google/parrot/acpi/ivybridge_pci_irqs.asl
D src/mainboard/google/parrot/acpi/sandybridge_pci_irqs.asl
M src/mainboard/google/parrot/dsdt.asl
M src/mainboard/google/parrot/romstage.c
D src/mainboard/google/stout/acpi/sandybridge_pci_irqs.asl
M src/mainboard/google/stout/dsdt.asl
M src/mainboard/google/stout/romstage.c
D src/mainboard/intel/emeraldlake2/acpi/ivybridge_pci_irqs.asl
D src/mainboard/samsung/lumpy/acpi/sandybridge_pci_irqs.asl
M src/mainboard/samsung/lumpy/dsdt.asl
M src/mainboard/samsung/lumpy/romstage.c
D src/mainboard/samsung/stumpy/acpi/sandybridge_pci_irqs.asl
M src/mainboard/samsung/stumpy/dsdt.asl
M src/mainboard/samsung/stumpy/romstage.c
M src/southbridge/intel/bd82x6x/acpi/default_irq_route.asl
D src/southbridge/intel/bd82x6x/early_rcba.c
23 files changed, 36 insertions(+), 891 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/62/19662/2
--
To view, visit https://review.coreboot.org/19662
To unsubscribe, visit https://review.coreboot.org/settings
Gerrit-MessageType: newpatchset
Gerrit-Change-Id: I7660c03dca0b7db34cf725488b6d6538fdfde62d
Gerrit-PatchSet: 2
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz>
Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>