coreboot-gerrit May 2017

coreboot-gerrit@coreboot.org

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Change in coreboot[master]: util/lint: Fix execution on OpenBSD
by Philippe Mathieu-Daudé (Code Review) 21 May '17

21 May '17

Philippe Mathieu-Daudé has posted comments on this change. ( https://review.coreboot.org/19745 ) Change subject: util/lint: Fix execution on OpenBSD ...................................................................... Patch Set 1: Code-Review+1 correct! -- To view, visit https://review.coreboot.org/19745 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: comment Gerrit-Change-Id: I0b80214dd83d21e12e16a5002c68127a7ca2e41b Gerrit-PatchSet: 1 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Piotr Kubaj <pkubaj(a)anongoth.pl> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Philippe Mathieu-Daudé <philippe.mathieu.daude(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-HasComments: No

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Change in coreboot[master]: nvramtool: Fix build with OpenBSD
by Philippe Mathieu-Daudé (Code Review) 21 May '17

21 May '17

Philippe Mathieu-Daudé has posted comments on this change. ( https://review.coreboot.org/19741 ) Change subject: nvramtool: Fix build with OpenBSD ...................................................................... Patch Set 3: Code-Review+1 (1 comment) https://review.coreboot.org/#/c/19741/3/util/nvramtool/Makefile File util/nvramtool/Makefile: PS3, Line 41: ifeq ($(OS_ARCH), OpenBSD) what about grouping OS using:? ifeq ($(OS_ARCH),$(filter $(OS_ARCH),NetBSD OpenBSD)) -- To view, visit https://review.coreboot.org/19741 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: comment Gerrit-Change-Id: I28273d4d87a3a77cf35412a0695325c0535e42e5 Gerrit-PatchSet: 3 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Piotr Kubaj <pkubaj(a)anongoth.pl> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Philippe Mathieu-Daudé <philippe.mathieu.daude(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-HasComments: Yes

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Change in coreboot[master]: include/console: Use IS_ENABLED() macro
by Philippe Mathieu-Daudé (Code Review) 21 May '17

21 May '17

Philippe Mathieu-Daudé has posted comments on this change. ( https://review.coreboot.org/19763 ) Change subject: include/console: Use IS_ENABLED() macro ...................................................................... Patch Set 2: Code-Review+1 -- To view, visit https://review.coreboot.org/19763 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: comment Gerrit-Change-Id: I3d0c61c37399e96c1d154c1d3af5c47db967a07a Gerrit-PatchSet: 2 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Philippe Mathieu-Daudé <philippe.mathieu.daude(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-HasComments: No

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Change in coreboot[master]: device/oprom/include: Use IS_ENABLED() macro
by Philippe Mathieu-Daudé (Code Review) 21 May '17

21 May '17

Philippe Mathieu-Daudé has posted comments on this change. ( https://review.coreboot.org/19762 ) Change subject: device/oprom/include: Use IS_ENABLED() macro ...................................................................... Patch Set 2: Code-Review+1 -- To view, visit https://review.coreboot.org/19762 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: comment Gerrit-Change-Id: Ibc3bf2f4f1e1bf1ffe9632aa150d549fcd6c201d Gerrit-PatchSet: 2 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Philippe Mathieu-Daudé <philippe.mathieu.daude(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-HasComments: No

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Change in coreboot[master]: arch/x86/include: Use IS_ENABLED() macro
by Philippe Mathieu-Daudé (Code Review) 21 May '17

21 May '17

Philippe Mathieu-Daudé has posted comments on this change. ( https://review.coreboot.org/19761 ) Change subject: arch/x86/include: Use IS_ENABLED() macro ...................................................................... Patch Set 2: Code-Review+1 nice cleanup in pci_io_cfg.h! -- To view, visit https://review.coreboot.org/19761 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: comment Gerrit-Change-Id: I0f9a92e595ec765d47f89f0023ff69636ee406af Gerrit-PatchSet: 2 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Philippe Mathieu-Daudé <philippe.mathieu.daude(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-HasComments: No

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Change in coreboot[master]: soc/intel/skylake: Use Intel SATA common code
by Philippe Mathieu-Daudé (Code Review) 21 May '17

21 May '17

Philippe Mathieu-Daudé has posted comments on this change. ( https://review.coreboot.org/19735 ) Change subject: soc/intel/skylake: Use Intel SATA common code ...................................................................... Patch Set 2: Code-Review+1 -- To view, visit https://review.coreboot.org/19735 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: comment Gerrit-Change-Id: Ib5d65f1afda6b2f8098f1c006623a48cf2690593 Gerrit-PatchSet: 2 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Barnali Sarkar <barnali.sarkar(a)intel.com> Gerrit-Reviewer: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Philippe Mathieu-Daudé <philippe.mathieu.daude(a)gmail.com> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-HasComments: No

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Change in coreboot[master]: soc/intel/common: Add Intel SATA common code support
by Philippe Mathieu-Daudé (Code Review) 21 May '17

21 May '17

Philippe Mathieu-Daudé has posted comments on this change. ( https://review.coreboot.org/19734 ) Change subject: soc/intel/common: Add Intel SATA common code support ...................................................................... Patch Set 2: Code-Review+1 -- To view, visit https://review.coreboot.org/19734 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: comment Gerrit-Change-Id: I42ec0059f7e311a232c38fef6a2e050a3e2c0ad3 Gerrit-PatchSet: 2 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Reviewer: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Barnali Sarkar <barnali.sarkar(a)intel.com> Gerrit-Reviewer: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Philippe Mathieu-Daudé <philippe.mathieu.daude(a)gmail.com> Gerrit-Reviewer: Rizwan Qureshi <riz.pro(a)gmail.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-HasComments: No

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Change in coreboot[master]: soc/intel/skylake: Use Intel PCIe common code
by Philippe Mathieu-Daudé (Code Review) 21 May '17

21 May '17

Philippe Mathieu-Daudé has posted comments on this change. ( https://review.coreboot.org/19666 ) Change subject: soc/intel/skylake: Use Intel PCIe common code ...................................................................... Patch Set 8: Code-Review+1 -- To view, visit https://review.coreboot.org/19666 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: comment Gerrit-Change-Id: Ia9fa22c30fffb1907320667ac37f55db9f3cb7b3 Gerrit-PatchSet: 8 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Reviewer: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Barnali Sarkar <barnali.sarkar(a)intel.com> Gerrit-Reviewer: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Philippe Mathieu-Daudé <philippe.mathieu.daude(a)gmail.com> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-HasComments: No

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Change in coreboot[master]: soc/intel/common: Add Intel PCIe common code
by Philippe Mathieu-Daudé (Code Review) 21 May '17

21 May '17

Philippe Mathieu-Daudé has posted comments on this change. ( https://review.coreboot.org/19665 ) Change subject: soc/intel/common: Add Intel PCIe common code ...................................................................... Patch Set 6: Code-Review+1 -- To view, visit https://review.coreboot.org/19665 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: comment Gerrit-Change-Id: I0c374317a3fe0be0bb1c5d9b16fcbc5cad83ca42 Gerrit-PatchSet: 6 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Reviewer: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Barnali Sarkar <barnali.sarkar(a)intel.com> Gerrit-Reviewer: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Philippe Mathieu-Daudé <philippe.mathieu.daude(a)gmail.com> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-HasComments: No

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Change in coreboot[master]: src/southbridge/i82801gx: Include a default SeaBIOS config file
by Kevin O'Connor (Code Review) 21 May '17

21 May '17

Kevin O'Connor has posted comments on this change. ( https://review.coreboot.org/19690 ) Change subject: src/southbridge/i82801gx: Include a default SeaBIOS config file ...................................................................... Patch Set 1: > (1 comment) > > > Why can’t this be enabled by default for coreboot? > > Why isn't it the global default in SeaBIOS? The SeaBIOS ATA DMA setting isn't safe on PATA, nor is it safe on SATA to PATA adapters. On those devices, a complicated controller specific negotiation must be done to determine the DMA level. The SeaBIOS ATA DMA support works fine on regular SATA devices, but almost all new machines use an AHCI controller now. -- To view, visit https://review.coreboot.org/19690 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: comment Gerrit-Change-Id: I6a6e79ea6cd0a14070b8092aefa477b9e3a0c4b1 Gerrit-PatchSet: 1 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Kevin O'Connor <kevin(a)koconnor.net> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-HasComments: No

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coreboot-gerrit May 2017