coreboot-gerrit May 2017

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Change in coreboot[master]: soc/rockchip: Move spi driver to use spi_bus_map
by Furquan Shaikh (Code Review) 24 May '17

24 May '17

Furquan Shaikh has submitted this change and it was merged. ( https://review.coreboot.org/19771 ) Change subject: soc/rockchip: Move spi driver to use spi_bus_map ...................................................................... soc/rockchip: Move spi driver to use spi_bus_map This is in preparation to get rid of the strong spi_setup_slave implemented by different platforms. BUG=b:38430839 Change-Id: I66b1b9635ece2381f62f2a9d6f5744d639d59163 Signed-off-by: Furquan Shaikh <furquan(a)chromium.org> Reviewed-on: https://review.coreboot.org/19771 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Julius Werner <jwerner(a)chromium.org> Reviewed-by: Aaron Durbin <adurbin(a)chromium.org> Reviewed-by: Philippe Mathieu-Daudé <philippe.mathieu.daude(a)gmail.com> --- M src/soc/rockchip/common/spi.c 1 file changed, 8 insertions(+), 9 deletions(-) Approvals: Aaron Durbin: Looks good to me, approved Philippe Mathieu-Daudé: Looks good to me, but someone else must approve Julius Werner: Looks good to me, approved build bot (Jenkins): Verified diff --git a/src/soc/rockchip/common/spi.c b/src/soc/rockchip/common/spi.c index 0e73769..86f2594 100644 --- a/src/soc/rockchip/common/spi.c +++ b/src/soc/rockchip/common/spi.c @@ -330,13 +330,12 @@ .max_xfer_size = 65535, }; -int spi_setup_slave(unsigned int bus, unsigned int cs, struct spi_slave *slave) -{ - assert(bus < ARRAY_SIZE(rockchip_spi_slaves)); +const struct spi_ctrlr_buses spi_ctrlr_bus_map[] = { + { + .ctrlr = &spi_ctrlr, + .bus_start = 0, + .bus_end = ARRAY_SIZE(rockchip_spi_slaves) - 1, + }, +}; - slave->bus = bus; - slave->cs = cs; - slave->ctrlr = &spi_ctrlr; - - return 0; -} +const size_t spi_ctrlr_bus_map_count = ARRAY_SIZE(spi_ctrlr_bus_map); -- To view, visit https://review.coreboot.org/19771 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: merged Gerrit-Change-Id: I66b1b9635ece2381f62f2a9d6f5744d639d59163 Gerrit-PatchSet: 6 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Duncan Laurie <dlaurie(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Philippe Mathieu-Daudé <philippe.mathieu.daude(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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Change in coreboot[master]: soc/mediatek/mt8173: Move spi driver to use spi_bus_map
by Furquan Shaikh (Code Review) 24 May '17

24 May '17

Furquan Shaikh has submitted this change and it was merged. ( https://review.coreboot.org/19770 ) Change subject: soc/mediatek/mt8173: Move spi driver to use spi_bus_map ...................................................................... soc/mediatek/mt8173: Move spi driver to use spi_bus_map This is in preparation to get rid of the strong spi_setup_slave implemented by different platforms. BUG=b:38430839 Change-Id: Ib0d6e4e8185ce1285b671af5ebcead1d42e049bc Signed-off-by: Furquan Shaikh <furquan(a)chromium.org> Reviewed-on: https://review.coreboot.org/19770 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Aaron Durbin <adurbin(a)chromium.org> Reviewed-by: Julius Werner <jwerner(a)chromium.org> --- M src/soc/mediatek/mt8173/spi.c 1 file changed, 27 insertions(+), 23 deletions(-) Approvals: Aaron Durbin: Looks good to me, approved Julius Werner: Looks good to me, approved build bot (Jenkins): Verified diff --git a/src/soc/mediatek/mt8173/spi.c b/src/soc/mediatek/mt8173/spi.c index b8ee423..ae6dc3b 100644 --- a/src/soc/mediatek/mt8173/spi.c +++ b/src/soc/mediatek/mt8173/spi.c @@ -289,35 +289,39 @@ mtk_slave->state = MTK_SPI_IDLE; } +static int spi_ctrlr_setup(const struct spi_slave *slave) +{ + struct mtk_spi_bus *eslave = to_mtk_spi(slave); + assert(read32(&eslave->regs->spi_cfg0_reg) != 0); + spi_sw_reset(eslave->regs); + return 0; +} + +static const struct spi_ctrlr spi_flash_ctrlr = { + .max_xfer_size = 65535, + .flash_probe = mtk_spi_flash_probe, +}; + static const struct spi_ctrlr spi_ctrlr = { + .setup = spi_ctrlr_setup, .claim_bus = spi_ctrlr_claim_bus, .release_bus = spi_ctrlr_release_bus, .xfer = spi_ctrlr_xfer, .xfer_vector = spi_xfer_two_vectors, .max_xfer_size = 65535, - .flash_probe = mtk_spi_flash_probe, }; -int spi_setup_slave(unsigned int bus, unsigned int cs, struct spi_slave *slave) -{ - struct mtk_spi_bus *eslave; +const struct spi_ctrlr_buses spi_ctrlr_bus_map[] = { + { + .ctrlr = &spi_ctrlr, + .bus_start = 0, + .bus_end = 0, + }, + { + .ctrlr = &spi_flash_ctrlr, + .bus_start = CONFIG_BOOT_DEVICE_SPI_FLASH_BUS, + .bus_end = CONFIG_BOOT_DEVICE_SPI_FLASH_BUS, + }, +}; - slave->ctrlr = &spi_ctrlr; - - switch (bus) { - case CONFIG_EC_GOOGLE_CHROMEEC_SPI_BUS: - slave->bus = bus; - slave->cs = cs; - eslave = to_mtk_spi(slave); - assert(read32(&eslave->regs->spi_cfg0_reg) != 0); - spi_sw_reset(eslave->regs); - return 0; - case CONFIG_BOOT_DEVICE_SPI_FLASH_BUS: - slave->bus = bus; - slave->cs = cs; - return 0; - default: - die ("wrong bus number.\n"); - }; - return -1; -} +const size_t spi_ctrlr_bus_map_count = ARRAY_SIZE(spi_ctrlr_bus_map); -- To view, visit https://review.coreboot.org/19770 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: merged Gerrit-Change-Id: Ib0d6e4e8185ce1285b671af5ebcead1d42e049bc Gerrit-PatchSet: 6 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Duncan Laurie <dlaurie(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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Change in coreboot[master]: soc/nvidia/tegra*: Move spi driver to use spi_bus_map
by Furquan Shaikh (Code Review) 24 May '17

24 May '17

Furquan Shaikh has submitted this change and it was merged. ( https://review.coreboot.org/19769 ) Change subject: soc/nvidia/tegra*: Move spi driver to use spi_bus_map ...................................................................... soc/nvidia/tegra*: Move spi driver to use spi_bus_map This is in preparation to get rid of the strong spi_setup_slave implemented by different platforms. BUG=b:38430839 Change-Id: I873b96d286655a814554bfd89f899ee87302b06d Signed-off-by: Furquan Shaikh <furquan(a)chromium.org> Reviewed-on: https://review.coreboot.org/19769 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Julius Werner <jwerner(a)chromium.org> Reviewed-by: Aaron Durbin <adurbin(a)chromium.org> Reviewed-by: Philippe Mathieu-Daudé <philippe.mathieu.daude(a)gmail.com> --- M src/soc/nvidia/tegra124/spi.c M src/soc/nvidia/tegra210/spi.c 2 files changed, 16 insertions(+), 22 deletions(-) Approvals: Aaron Durbin: Looks good to me, approved Philippe Mathieu-Daudé: Looks good to me, but someone else must approve Julius Werner: Looks good to me, approved build bot (Jenkins): Verified diff --git a/src/soc/nvidia/tegra124/spi.c b/src/soc/nvidia/tegra124/spi.c index 4ecd67a..ae07d53 100644 --- a/src/soc/nvidia/tegra124/spi.c +++ b/src/soc/nvidia/tegra124/spi.c @@ -800,15 +800,12 @@ .max_xfer_size = SPI_CTRLR_DEFAULT_MAX_XFER_SIZE, }; -int spi_setup_slave(unsigned int bus, unsigned int cs, struct spi_slave *slave) -{ - struct tegra_spi_channel *channel = to_tegra_spi(bus); - if (!channel) - return -1; +const struct spi_ctrlr_buses spi_ctrlr_bus_map[] = { + { + .ctrlr = &spi_ctrlr, + .bus_start = 1, + .bus_end = ARRAY_SIZE(tegra_spi_channels) + }, +}; - slave->bus = channel->slave.bus; - slave->cs = channel->slave.cs; - slave->ctrlr = &spi_ctrlr; - - return 0; -} +const size_t spi_ctrlr_bus_map_count = ARRAY_SIZE(spi_ctrlr_bus_map); diff --git a/src/soc/nvidia/tegra210/spi.c b/src/soc/nvidia/tegra210/spi.c index 0987ddb..54e46f1 100644 --- a/src/soc/nvidia/tegra210/spi.c +++ b/src/soc/nvidia/tegra210/spi.c @@ -836,15 +836,12 @@ .max_xfer_size = SPI_CTRLR_DEFAULT_MAX_XFER_SIZE, }; -int spi_setup_slave(unsigned int bus, unsigned int cs, struct spi_slave *slave) -{ - struct tegra_spi_channel *channel = to_tegra_spi(bus); - if (!channel) - return -1; +const struct spi_ctrlr_buses spi_ctrlr_bus_map[] = { + { + .ctrlr = &spi_ctrlr, + .bus_start = 1, + .bus_end = ARRAY_SIZE(tegra_spi_channels) + }, +}; - slave->cs = channel->slave.cs; - slave->bus = channel->slave.bus; - slave->ctrlr = &spi_ctrlr; - - return 0; -} +const size_t spi_ctrlr_bus_map_count = ARRAY_SIZE(spi_ctrlr_bus_map); -- To view, visit https://review.coreboot.org/19769 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: merged Gerrit-Change-Id: I873b96d286655a814554bfd89f899ee87302b06d Gerrit-PatchSet: 6 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Duncan Laurie <dlaurie(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Philippe Mathieu-Daudé <philippe.mathieu.daude(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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Change in coreboot[master]: sb/intel/bd82x6x: Disable unused bridges
by build bot (Jenkins) (Code Review) 24 May '17

24 May '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/19818 ) Change subject: sb/intel/bd82x6x: Disable unused bridges ...................................................................... Patch Set 3: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-checkpatch/9956/ : SUCCESS https://qa.coreboot.org/job/coreboot-gerrit/54222/ : SUCCESS -- To view, visit https://review.coreboot.org/19818 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: comment Gerrit-Change-Id: I6ee5e5f33824acdbca0f6ed28e90beab7fe10002 Gerrit-PatchSet: 3 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-HasComments: No

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Change in coreboot[master]: intel/common/block/i2c: Add common block for I2C and use the...
by Subrata Banik (Code Review) 24 May '17

24 May '17

Subrata Banik has posted comments on this change. ( https://review.coreboot.org/19468 ) Change subject: intel/common/block/i2c: Add common block for I2C and use the same in SoCs ...................................................................... Patch Set 14: > (1 comment) > > > > This is causing a boot regression. Was it tested on apollolake > > > boards? > > > > is that during PCI enumeration at device 18:01 something, i have > > also seen it 1-2 days before but wondering why others haven't > > reported the same hang. Hence i thought something bad about my > > setup. > > Yes. i guess it started regressing from patchset 7. -- To view, visit https://review.coreboot.org/19468 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: comment Gerrit-Change-Id: I4d91a04c22e181e3a995112cce6d5f0324130b81 Gerrit-PatchSet: 14 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Reviewer: Lee Leahy <leroy.p.leahy(a)intel.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-HasComments: No

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Change in coreboot[master]: Kconfig: Indent help text
by build bot (Jenkins) (Code Review) 24 May '17

24 May '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/19850 ) Change subject: Kconfig: Indent help text ...................................................................... Patch Set 1: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-checkpatch/9963/ : SUCCESS https://qa.coreboot.org/job/coreboot-gerrit/54229/ : SUCCESS -- To view, visit https://review.coreboot.org/19850 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: comment Gerrit-Change-Id: Ia9fdb22c0f5f0cec0c9d08aa6603b4ce8d60d9a3 Gerrit-PatchSet: 1 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-HasComments: No

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Change in coreboot[master]: device/device_util: Add function to determine bridge state
by build bot (Jenkins) (Code Review) 24 May '17

24 May '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/19817 ) Change subject: device/device_util: Add function to determine bridge state ...................................................................... Patch Set 3: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-checkpatch/9961/ : SUCCESS https://qa.coreboot.org/job/coreboot-gerrit/54228/ : SUCCESS -- To view, visit https://review.coreboot.org/19817 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: comment Gerrit-Change-Id: Ic8fe539d233031d4d177b03dd2c03edb5ab8c88d Gerrit-PatchSet: 3 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-HasComments: No

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Change in coreboot[master]: fsp1_1: Verify FSP_IMAGE_ID/_REV against headers
by build bot (Jenkins) (Code Review) 24 May '17

24 May '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/19635 ) Change subject: fsp1_1: Verify FSP_IMAGE_ID/_REV against headers ...................................................................... Patch Set 2: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-checkpatch/9962/ : SUCCESS https://qa.coreboot.org/job/coreboot-gerrit/54227/ : SUCCESS -- To view, visit https://review.coreboot.org/19635 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: comment Gerrit-Change-Id: Ic86229e7f0c2d0525b8a79add292c6c81a349aa6 Gerrit-PatchSet: 2 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)intel.com> Gerrit-Reviewer: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Reviewer: Lee Leahy <leroy.p.leahy(a)intel.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-HasComments: No

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Change in coreboot[master]: util/lint/kconfig_lint: update help checking
by build bot (Jenkins) (Code Review) 24 May '17

24 May '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/19851 ) Change subject: util/lint/kconfig_lint: update help checking ...................................................................... Patch Set 1: Verified-1 Build Failed https://qa.coreboot.org/job/coreboot-gerrit/54230/ : FAILURE https://qa.coreboot.org/job/coreboot-checkpatch/9964/ : SUCCESS -- To view, visit https://review.coreboot.org/19851 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: comment Gerrit-Change-Id: Ibf868c83e2a128ceb6c4d3da7f2cf7dc237054e6 Gerrit-PatchSet: 1 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-HasComments: No

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Change in coreboot[master]: intel/common/block/i2c: Add common block for I2C and use the...
by Subrata Banik (Code Review) 24 May '17

24 May '17

Subrata Banik has posted comments on this change. ( https://review.coreboot.org/19468 ) Change subject: intel/common/block/i2c: Add common block for I2C and use the same in SoCs ...................................................................... Patch Set 14: > This is causing a boot regression. Was it tested on apollolake > boards? is that during PCI enumeration at device 18:01 something, i have also seen it 1-2 days before but wondering why others haven't reported the same hang. Hence i thought something bad about my setup. -- To view, visit https://review.coreboot.org/19468 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: comment Gerrit-Change-Id: I4d91a04c22e181e3a995112cce6d5f0324130b81 Gerrit-PatchSet: 14 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Reviewer: Lee Leahy <leroy.p.leahy(a)intel.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-HasComments: No

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coreboot-gerrit May 2017