coreboot-gerrit March 2017

coreboot-gerrit@coreboot.org

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2925 discussions

Change in coreboot[master]: include/device: Move mmc.h and sdhci.h into include/device
by build bot (Jenkins) (Code Review) 27 Mar '17

27 Mar '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/19006 ) Change subject: include/device: Move mmc.h and sdhci.h into include/device ...................................................................... Patch Set 2: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-gerrit/50733/ : SUCCESS https://qa.coreboot.org/job/coreboot-checkpatch/6710/ : SUCCESS -- To view, visit https://review.coreboot.org/19006 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: comment Gerrit-Change-Id: Ief907499420dfe0b217494d1a4981bb9b93bee91 Gerrit-PatchSet: 2 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Lee Leahy <leroy.p.leahy(a)intel.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)intel.com> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: build bot (Jenkins) Gerrit-HasComments: No

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Change in coreboot[master]: [Not For Merge] nb/intel/i945: Remove unused #define REFRESH_*
by Arthur Heymans (Code Review) 27 Mar '17

27 Mar '17

Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/19016 ) Change subject: [Not For Merge] nb/intel/i945: Remove unused #define REFRESH_* ...................................................................... Patch Set 1: (1 comment) Oh indeed not tRFC but tREF or tRR like its called in ddr2.c https://review.coreboot.org/#/c/19016/1/src/northbridge/intel/i945/raminit.c File src/northbridge/intel/i945/raminit.c: PS1, Line 848: if (refresh == 2) { : sysinfo->refresh = 1; > The code expects either 13 or 14 row address bits. With the usual 64ms > The code expects either 13 or 14 row address bits. With the usual > 64ms > maximum refresh interval. This gives us either > > 64ms / 2^13 = 7.8us > 64ms / 2^14 = 3.9us > > Not sure if 14 row address bits is usual in DDR2. > Sure there is no off by one here? 15.625 μs is quite common/default (13 rows?) -- To view, visit https://review.coreboot.org/19016 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: comment Gerrit-Change-Id: I70d5437face1a3ff4cacda4cb3f9a67d2ca4c403 Gerrit-PatchSet: 1 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) Gerrit-HasComments: Yes

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Change in coreboot[master]: drivers/storage: Build SD/MMC driver for other stages
by Lee Leahy (Code Review) 27 Mar '17

27 Mar '17

Hello Andrey Petrov, Aaron Durbin, Bora Guvendik, build bot (Jenkins), Martin Roth, I'd like you to reexamine a change. Please visit https://review.coreboot.org/19014 to look at the new patch set (#2). Change subject: drivers/storage: Build SD/MMC driver for other stages ...................................................................... drivers/storage: Build SD/MMC driver for other stages Update Makefile.inc to build the driver for other stages. TEST=Build for reef Change-Id: Ia101d62aabc7ad1589ce669669792c138d3616c8 Signed-off-by: Lee Leahy <Leroy.P.Leahy(a)intel.com> --- M src/drivers/storage/Makefile.inc 1 file changed, 16 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/14/19014/2 -- To view, visit https://review.coreboot.org/19014 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: newpatchset Gerrit-Change-Id: Ia101d62aabc7ad1589ce669669792c138d3616c8 Gerrit-PatchSet: 2 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Lee Leahy <leroy.p.leahy(a)intel.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)intel.com> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: build bot (Jenkins)

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Change in coreboot[master]: drivers/storage: Add SDHCI debug support
by Lee Leahy (Code Review) 27 Mar '17

27 Mar '17

Hello Andrey Petrov, Aaron Durbin, Bora Guvendik, build bot (Jenkins), Martin Roth, I'd like you to reexamine a change. Please visit https://review.coreboot.org/19012 to look at the new patch set (#2). Change subject: drivers/storage: Add SDHCI debug support ...................................................................... drivers/storage: Add SDHCI debug support Display the bus width and speed. TEST=Build and run on reef Change-Id: Ic594b6bbd10a9509f4194c72134ae8a875b4ae47 Signed-off-by: Lee Leahy <Leroy.P.Leahy(a)intel.com> --- M src/drivers/storage/Kconfig M src/drivers/storage/mmc.c M src/drivers/storage/sdhci.c 3 files changed, 39 insertions(+), 4 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/12/19012/2 -- To view, visit https://review.coreboot.org/19012 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: newpatchset Gerrit-Change-Id: Ic594b6bbd10a9509f4194c72134ae8a875b4ae47 Gerrit-PatchSet: 2 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Lee Leahy <leroy.p.leahy(a)intel.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)intel.com> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: build bot (Jenkins)

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Change in coreboot[master]: include/device: Fix MMC voltage mask
by Lee Leahy (Code Review) 27 Mar '17

27 Mar '17

Hello Andrey Petrov, Aaron Durbin, Bora Guvendik, build bot (Jenkins), Martin Roth, I'd like you to reexamine a change. Please visit https://review.coreboot.org/19011 to look at the new patch set (#2). Change subject: include/device: Fix MMC voltage mask ...................................................................... include/device: Fix MMC voltage mask Add the missing voltage (MMC_VDD_35_36) into the voltage mask. TEST=None Change-Id: I30c4e8e47dfa34a5504feae016ad9b43e8bccc3b Signed-off-by: Lee Leahy <Leroy.P.Leahy(a)intel.com> --- M src/include/device/mmc.h 1 file changed, 1 insertion(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/11/19011/2 -- To view, visit https://review.coreboot.org/19011 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: newpatchset Gerrit-Change-Id: I30c4e8e47dfa34a5504feae016ad9b43e8bccc3b Gerrit-PatchSet: 2 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Lee Leahy <leroy.p.leahy(a)intel.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)intel.com> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: build bot (Jenkins)

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Change in coreboot[master]: drivers/storage: Fix formatting issues detected by checkpatch
by Lee Leahy (Code Review) 27 Mar '17

27 Mar '17

Hello Andrey Petrov, Aaron Durbin, Bora Guvendik, build bot (Jenkins), Martin Roth, I'd like you to reexamine a change. Please visit https://review.coreboot.org/19009 to look at the new patch set (#2). Change subject: drivers/storage: Fix formatting issues detected by checkpatch ...................................................................... drivers/storage: Fix formatting issues detected by checkpatch Fix the following errors and warnings detected by checkpatch.pl: ERROR: switch and case should be at the same indent ERROR: spaces prohibited around that '->' (ctx:VxW) WARNING: line over 80 characters WARNING: Prefer 'unsigned int' to bare use of 'unsigned' WARNING: suspect code indent for conditional statements (24, 28) These issues should not change the binary. TEST=None Change-Id: I6df6bc5f5342bbdd024a96f2396af558d8cdbc49 Signed-off-by: Lee Leahy <Leroy.P.Leahy(a)intel.com> --- M src/drivers/storage/mmc.c M src/drivers/storage/sdhci.c M src/include/device/sdhci.h 3 files changed, 50 insertions(+), 49 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/09/19009/2 -- To view, visit https://review.coreboot.org/19009 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: newpatchset Gerrit-Change-Id: I6df6bc5f5342bbdd024a96f2396af558d8cdbc49 Gerrit-PatchSet: 2 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Lee Leahy <leroy.p.leahy(a)intel.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)intel.com> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: build bot (Jenkins)

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Change in coreboot[master]: drivers/storage: Fix data flow issues detected by checkpatch
by Lee Leahy (Code Review) 27 Mar '17

27 Mar '17

Hello Andrey Petrov, Aaron Durbin, Bora Guvendik, build bot (Jenkins), Martin Roth, I'd like you to reexamine a change. Please visit https://review.coreboot.org/19010 to look at the new patch set (#2). Change subject: drivers/storage: Fix data flow issues detected by checkpatch ...................................................................... drivers/storage: Fix data flow issues detected by checkpatch Fix the following error and warnings detected by checkpatch.pl: ERROR: trailing statements should be on next line WARNING: else is not generally useful after a break or return WARNING: long udelay - prefer mdelay; see arch/arm/include/asm/delay.h These change are expected to change the binary. The following errors detected by checkpatch are false positives: ERROR: need consistent spacing around '*' (ctx:WxV) ERROR: Macros with complex values should be enclosed in parentheses TEST=None Change-Id: Ib55bb89196d81ffb3602a04664e5be3911096d8d Signed-off-by: Lee Leahy <Leroy.P.Leahy(a)intel.com> --- M src/drivers/storage/mmc.c M src/drivers/storage/sdhci.c M src/include/device/mmc.h 3 files changed, 10 insertions(+), 11 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/10/19010/2 -- To view, visit https://review.coreboot.org/19010 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: newpatchset Gerrit-Change-Id: Ib55bb89196d81ffb3602a04664e5be3911096d8d Gerrit-PatchSet: 2 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Lee Leahy <leroy.p.leahy(a)intel.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)intel.com> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: build bot (Jenkins)

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Change in coreboot[master]: drivers/storage: Split out ADMA support
by Lee Leahy (Code Review) 27 Mar '17

27 Mar '17

Hello Andrey Petrov, Aaron Durbin, Bora Guvendik, build bot (Jenkins), Martin Roth, I'd like you to reexamine a change. Please visit https://review.coreboot.org/19015 to look at the new patch set (#2). Change subject: drivers/storage: Split out ADMA support ...................................................................... drivers/storage: Split out ADMA support On x86 sysems DMA is only supported to RAM, early stages must do programed I/O to send/receive data from the SD/MMC device. Use Kconfig values to enable DMA during early boot stages. TEST=Build and run on reef Change-Id: I70aad97c74aa8a72e50627740d96fecb7485dde4 Signed-off-by: Lee Leahy <Leroy.P.Leahy(a)intel.com> --- M src/drivers/storage/Kconfig M src/drivers/storage/Makefile.inc M src/drivers/storage/sdhci.c A src/drivers/storage/sdhci_adma.c M src/include/device/sdhci.h 5 files changed, 239 insertions(+), 178 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/15/19015/2 -- To view, visit https://review.coreboot.org/19015 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: newpatchset Gerrit-Change-Id: I70aad97c74aa8a72e50627740d96fecb7485dde4 Gerrit-PatchSet: 2 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Lee Leahy <leroy.p.leahy(a)intel.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)intel.com> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: build bot (Jenkins)

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Change in coreboot[master]: drivers/storage: Allow SOC to override more controller features
by Lee Leahy (Code Review) 27 Mar '17

27 Mar '17

Hello Andrey Petrov, Aaron Durbin, Bora Guvendik, build bot (Jenkins), Martin Roth, I'd like you to reexamine a change. Please visit https://review.coreboot.org/19013 to look at the new patch set (#2). Change subject: drivers/storage: Allow SOC to override more controller features ...................................................................... drivers/storage: Allow SOC to override more controller features Instead of converting from SDHCI_PLATFORM_* to SDHCI_QUIRK_* to MMC_MODE_*, call the SOC back with the SdhciHost and MmcCtrlr structures to allow the necessary updates to support the controller quirks. TEST=Build for reef Change-Id: Ie2fc8a15727d6c487bafdf8ac5e530f1d2a73cce Signed-off-by: Lee Leahy <Leroy.P.Leahy(a)intel.com> --- M src/drivers/storage/sdhci.c M src/include/device/sdhci.h 2 files changed, 21 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/13/19013/2 -- To view, visit https://review.coreboot.org/19013 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: newpatchset Gerrit-Change-Id: Ie2fc8a15727d6c487bafdf8ac5e530f1d2a73cce Gerrit-PatchSet: 2 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Lee Leahy <leroy.p.leahy(a)intel.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)intel.com> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: build bot (Jenkins)

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Change in coreboot[master]: drivers/storage: Support PCI SD/MMC controllers
by Lee Leahy (Code Review) 27 Mar '17

27 Mar '17

Hello Andrey Petrov, Aaron Durbin, Bora Guvendik, build bot (Jenkins), Martin Roth, I'd like you to reexamine a change. Please visit https://review.coreboot.org/19008 to look at the new patch set (#2). Change subject: drivers/storage: Support PCI SD/MMC controllers ...................................................................... drivers/storage: Support PCI SD/MMC controllers Add support to initialize a PCI controller. TEST=Build and run on reef Change-Id: If38b0de989a3c71f7f84ddf0f1ea9d1b95f2fa7b Signed-off-by: Lee Leahy <Leroy.P.Leahy(a)intel.com> --- M src/drivers/storage/Makefile.inc A src/drivers/storage/pci_sdhci.c M src/include/device/sdhci.h 3 files changed, 89 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/08/19008/2 -- To view, visit https://review.coreboot.org/19008 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: newpatchset Gerrit-Change-Id: If38b0de989a3c71f7f84ddf0f1ea9d1b95f2fa7b Gerrit-PatchSet: 2 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Lee Leahy <leroy.p.leahy(a)intel.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)intel.com> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: build bot (Jenkins)

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coreboot-gerrit March 2017