coreboot-gerrit December 2017

coreboot-gerrit@coreboot.org

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Change in coreboot[master]: mb/google/nami: Revise speaker enable pin from A22 to A23
by Furquan Shaikh (Code Review) 17 Dec '17

17 Dec '17

Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/22863 ) Change subject: mb/google/nami: Revise speaker enable pin from A22 to A23 ...................................................................... Patch Set 1: I have already pushed this change here: https://review.coreboot.org/c/22844/ -- To view, visit https://review.coreboot.org/22863 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I4661749d0852f25e855d84f9416db67867545cb4 Gerrit-Change-Number: 22863 Gerrit-PatchSet: 1 Gerrit-Owner: Gaggery Tsai <gaggery.tsai(a)intel.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Sun, 17 Dec 2017 05:23:52 +0000 Gerrit-HasComments: No

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Change in coreboot[master]: crossgcc/patches: Update nds32 patch for patch 2.6
by build bot (Jenkins) (Code Review) 17 Dec '17

17 Dec '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/22915 ) Change subject: crossgcc/patches: Update nds32 patch for patch 2.6 ...................................................................... Patch Set 1: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-checkpatch/19472/ : SUCCESS https://qa.coreboot.org/job/coreboot-toolchain/396/ : SUCCESS https://qa.coreboot.org/job/coreboot-gerrit/64690/ : SUCCESS -- To view, visit https://review.coreboot.org/22915 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Ia807fe470213c9235b9dc87b1b850ff7de066cb2 Gerrit-Change-Number: 22915 Gerrit-PatchSet: 1 Gerrit-Owner: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Sun, 17 Dec 2017 02:46:42 +0000 Gerrit-HasComments: No

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Change in coreboot[master]: crossgcc/patches: Update nds32 patch for patch 2.6
by Martin Roth (Code Review) 17 Dec '17

17 Dec '17

Martin Roth has uploaded this change for review. ( https://review.coreboot.org/22915 Change subject: crossgcc/patches: Update nds32 patch for patch 2.6 ...................................................................... crossgcc/patches: Update nds32 patch for patch 2.6 Patch version 2.7 introduced the rename feature. Unfortunately, the old versions of patch, while not behaving as expected, also don't give any indication that the patch failed. This update removes the rename, instead deleting the old file and adding the new file. This works correctly on either version of patch. BUG=chromium:762283 TEST=Apply old and new patches, verify the results are the same. Apply with Patch v2.6 and verify that GCC can build. Change-Id: Ia807fe470213c9235b9dc87b1b850ff7de066cb2 Signed-off-by: Martin Roth <martinroth(a)google.com> --- M util/crossgcc/patches/gcc-6.3.0_nds32_ite.patch 1 file changed, 18,195 insertions(+), 18,805 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/15/22915/1 -- To view, visit https://review.coreboot.org/22915 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: Ia807fe470213c9235b9dc87b1b850ff7de066cb2 Gerrit-Change-Number: 22915 Gerrit-PatchSet: 1 Gerrit-Owner: Martin Roth <martinroth(a)google.com>

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Change in coreboot[master]: nb/intel/x4x/raminit: Fix programming dual channel registers
by build bot (Jenkins) (Code Review) 16 Dec '17

16 Dec '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/22914 ) Change subject: nb/intel/x4x/raminit: Fix programming dual channel registers ...................................................................... Patch Set 2: Build Successful https://qa.coreboot.org/job/coreboot-gerrit/64689/ : SUCCESS -- To view, visit https://review.coreboot.org/22914 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: If84099d27100e57437bf214dc4cf975f67c2ea1f Gerrit-Change-Number: 22914 Gerrit-PatchSet: 2 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Sat, 16 Dec 2017 22:24:42 +0000 Gerrit-HasComments: No

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Change in coreboot[master]: nb/intel/x4x/raminit: Fix programming dual channel registers
by Arthur Heymans (Code Review) 16 Dec '17

16 Dec '17

Hello build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/22914 to look at the new patch set (#2). Change subject: nb/intel/x4x/raminit: Fix programming dual channel registers ...................................................................... nb/intel/x4x/raminit: Fix programming dual channel registers Some things in programming registers related to dual channel interleaved operation were wrong. This also adds some code that could in the future be used when me is active and claims some memory for its UMA. This also uses some more sensible variable names to clarify at least some of the magic. This fixes memtest86+ failing with some assymetric DIMM configuration. TESTED on DG43GT: memtest86+ now succeeds on many more different DIMM configuration setups (would instantly fail at addresses above 4G on many configurations). Change-Id: If84099d27100e57437bf214dc4cf975f67c2ea1f Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M src/northbridge/intel/x4x/raminit_ddr2.c 1 file changed, 51 insertions(+), 27 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/14/22914/2 -- To view, visit https://review.coreboot.org/22914 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newpatchset Gerrit-Change-Id: If84099d27100e57437bf214dc4cf975f67c2ea1f Gerrit-Change-Number: 22914 Gerrit-PatchSet: 2 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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Change in coreboot[master]: nb/intel/x4x/raminit: Fix programming dual channel registers
by build bot (Jenkins) (Code Review) 16 Dec '17

16 Dec '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/22914 ) Change subject: nb/intel/x4x/raminit: Fix programming dual channel registers ...................................................................... Patch Set 1: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-checkpatch/19470/ : SUCCESS https://qa.coreboot.org/job/coreboot-gerrit/64687/ : SUCCESS -- To view, visit https://review.coreboot.org/22914 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: If84099d27100e57437bf214dc4cf975f67c2ea1f Gerrit-Change-Number: 22914 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Sat, 16 Dec 2017 22:07:37 +0000 Gerrit-HasComments: No

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Change in coreboot[master]: nb/intel/x4x/raminit: Fix programming dual channel registers
by Arthur Heymans (Code Review) 16 Dec '17

16 Dec '17

Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/22914 Change subject: nb/intel/x4x/raminit: Fix programming dual channel registers ...................................................................... nb/intel/x4x/raminit: Fix programming dual channel registers Some things in programming registers related to dual channel interleaved operation were wrong. This also adds some code that could in the future be used when me is active and claims some memory for its UMA. This fixes memtest86+ failing with some assymetric DIMM configuration. TESTED on DG43GT: memtest86+ now succeeds on many more different DIMM configuration setups (would instantly fail at addresses above 4G on many configurations). Change-Id: If84099d27100e57437bf214dc4cf975f67c2ea1f Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M src/northbridge/intel/x4x/raminit_ddr2.c 1 file changed, 51 insertions(+), 27 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/14/22914/1 diff --git a/src/northbridge/intel/x4x/raminit_ddr2.c b/src/northbridge/intel/x4x/raminit_ddr2.c index 6254323..c7e5ed7 100644 --- a/src/northbridge/intel/x4x/raminit_ddr2.c +++ b/src/northbridge/intel/x4x/raminit_ddr2.c @@ -1168,8 +1168,8 @@ u32 dra0; u32 dra1; u16 totalmemorymb; - u32 size, offset; - u32 size0, size1; + u32 dual_channel_size, single_channel_size, single_channel_offset; + u32 size_ch0, size_ch1, size_me; u8 dratab[2][2][2][4] = { { { @@ -1256,47 +1256,71 @@ s->channel_capacity[0], s->channel_capacity[1], totalmemorymb); /* Populated channel sizes in MiB */ - size0 = s->channel_capacity[0]; - size1 = s->channel_capacity[1]; + size_ch0 = s->channel_capacity[0]; + size_ch1 = s->channel_capacity[1]; + size_me = ME_UMA_SIZEMB; MCHBAR8(0x111) = MCHBAR8(0x111) & ~0x2; MCHBAR8(0x111) = MCHBAR8(0x111) | (1 << 4); - /* Set ME UMA size in MiB */ - MCHBAR16(0x100) = ME_UMA_SIZEMB; - - /* Set ME UMA Present bit */ - MCHBAR32(0x111) = MCHBAR32(0x111) | 1; - - size = MIN(size0 - ME_UMA_SIZEMB, size1) * 2; - - MCHBAR16(0x104) = size; - MCHBAR16(0x102) = size0 + size1 - size; + if (size_me == 0) { + dual_channel_size = MIN(size_ch0, size_ch1) * 2; + } else { + if (size_ch0 == 0) { + /* ME needs ram on CH0 */ + size_me = 0; + /* TOTEST: bailout? */ + } else { + /* Set ME UMA size in MiB */ + MCHBAR16(0x100) = size_me; + /* Set ME UMA Present bit */ + MCHBAR32(0x111) = MCHBAR32(0x111) | 1; + } + dual_channel_size = MIN(size_ch0 - size_me, size_ch1) * 2; + } + MCHBAR16(0x104) = dual_channel_size; + single_channel_size = size_ch0 + size_ch1 - dual_channel_size; + MCHBAR16(0x102) = single_channel_size; map = 0; - if (size0 == 0) + if (size_ch0 == 0) map = 0; - else if (size1 == 0) + else if (size_ch1 == 0) map |= 0x20; else map |= 0x40; - if (size == 0) + if (dual_channel_size == 0) map |= 0x18; + if (size_me == 0) { + if (size_ch0 <= size_ch1) + map |= 0x05; + else + map |= 0x04; + } else { + map |= 0x04; + } - if (size0 - ME_UMA_SIZEMB >= size1) - map |= 0x4; MCHBAR8(0x110) = map; MCHBAR16(0x10e) = 0; - if (size1 != 0) - offset = 0; - else if ((size0 > size1) && ((map & 0x7) == 0x4)) - offset = size/2 + (size0 + size1 - size); - else - offset = size/2 + ME_UMA_SIZEMB; - MCHBAR16(0x108) = offset; - MCHBAR16(0x10a) = size/2; + if (size_me == 0) { + if (size_ch0 > size_ch1) + single_channel_offset = dual_channel_size / 2 + + single_channel_size; + else + single_channel_offset = dual_channel_size / 2; + } else { + if ((size_ch0 > size_ch1) && ((map & 0x7) == 4)) + single_channel_offset = dual_channel_size / 2 + + single_channel_size; + else + single_channel_offset = dual_channel_size / 2 + + size_me; + } + + MCHBAR16(0x108) = single_channel_offset; + MCHBAR16(0x10a) = dual_channel_size / 2; } static void mmap_ddr2(struct sysinfo *s) -- To view, visit https://review.coreboot.org/22914 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: If84099d27100e57437bf214dc4cf975f67c2ea1f Gerrit-Change-Number: 22914 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz>

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Change in coreboot[master]: nb/intel/x4x/raminit: Move dummy reads after JEDEC init
by build bot (Jenkins) (Code Review) 16 Dec '17

16 Dec '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/20979 ) Change subject: nb/intel/x4x/raminit: Move dummy reads after JEDEC init ...................................................................... Patch Set 7: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-checkpatch/19465/ : SUCCESS https://qa.coreboot.org/job/coreboot-gerrit/64682/ : SUCCESS -- To view, visit https://review.coreboot.org/20979 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I8069f9c08ad5e5268ddbe3711d58bc42522f938c Gerrit-Change-Number: 20979 Gerrit-PatchSet: 7 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Damien Zammit <damien(a)zamaudio.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Sat, 16 Dec 2017 21:13:20 +0000 Gerrit-HasComments: No

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Change in coreboot[master]: nb/intel/x4x/rcven.c: Change the verbosity of some messages
by build bot (Jenkins) (Code Review) 16 Dec '17

16 Dec '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/22912 ) Change subject: nb/intel/x4x/rcven.c: Change the verbosity of some messages ...................................................................... Patch Set 2: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-checkpatch/19464/ : SUCCESS https://qa.coreboot.org/job/coreboot-gerrit/64681/ : SUCCESS -- To view, visit https://review.coreboot.org/22912 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Ib568621e6d044624c1c0aeb6fb08945f561395c7 Gerrit-Change-Number: 22912 Gerrit-PatchSet: 2 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Sat, 16 Dec 2017 20:46:31 +0000 Gerrit-HasComments: No

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Change in coreboot[master]: nb/intel/x4x: Fix programming CxDRB
by build bot (Jenkins) (Code Review) 16 Dec '17

16 Dec '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/22911 ) Change subject: nb/intel/x4x: Fix programming CxDRB ...................................................................... Patch Set 2: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-checkpatch/19462/ : SUCCESS https://qa.coreboot.org/job/coreboot-gerrit/64680/ : SUCCESS -- To view, visit https://review.coreboot.org/22911 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I7ff3264824c843f84b9eb6c06a06aa3f151fe4b3 Gerrit-Change-Number: 22911 Gerrit-PatchSet: 2 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Sat, 16 Dec 2017 20:40:24 +0000 Gerrit-HasComments: No

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coreboot-gerrit December 2017