coreboot-gerrit December 2017

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Change in coreboot[master]: mainboard/hp: Add Elitebook Revolve 810 G1
by build bot (Jenkins) (Code Review) 22 Dec '17

22 Dec '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/22972 ) Change subject: mainboard/hp: Add Elitebook Revolve 810 G1 ...................................................................... Patch Set 4: Build Successful https://qa.coreboot.org/job/coreboot-gerrit/64920/ : SUCCESS -- To view, visit https://review.coreboot.org/22972 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Iba9c361591697e6a2b3b7b485f7f1649c2a83524 Gerrit-Change-Number: 22972 Gerrit-PatchSet: 4 Gerrit-Owner: Bill XIE <persmule(a)gmail.com> Gerrit-Reviewer: Bill XIE <persmule(a)gmail.com> Gerrit-Reviewer: Iru Cai <mytbk920423(a)gmail.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Fri, 22 Dec 2017 10:11:32 +0000 Gerrit-HasComments: No Gerrit-HasLabels: No

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Change in coreboot[master]: mainboard/hp: Add Elitebook Revolve 810 G1
by Bill XIE (Code Review) 22 Dec '17

22 Dec '17

Hello Patrick Rudolph, Iru Cai, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/22972 to look at the new patch set (#4). Change subject: mainboard/hp: Add Elitebook Revolve 810 G1 ...................................................................... mainboard/hp: Add Elitebook Revolve 810 G1 The code is based on autoport and that for 8470p. Tested: - CPU i5-3437U - Slotted DIMM 8GiB - Soldered RAM 4GiB from Hynix (There may be more models here) - Onboard USB2 interfaces (digitizer, wlan slot, wwan slot, camera) - Mini pci-e on wlan slot - USB3 ports - S3 - TPM1 on LPC Not work: - An "NFC" device connected to LPC Not implemented yet: - Detecting the model of Soldered RAM at runtime, and load the corresponding SPD datum (3 observed) from CBFS Change-Id: Iba9c361591697e6a2b3b7b485f7f1649c2a83524 Signed-off-by: Bill XIE <persmule(a)gmail.com> --- A src/mainboard/hp/revolve_810_g1/Kconfig A src/mainboard/hp/revolve_810_g1/Kconfig.name A src/mainboard/hp/revolve_810_g1/Makefile.inc A src/mainboard/hp/revolve_810_g1/acpi/ec.asl A src/mainboard/hp/revolve_810_g1/acpi/platform.asl A src/mainboard/hp/revolve_810_g1/acpi/superio.asl A src/mainboard/hp/revolve_810_g1/acpi_tables.c A src/mainboard/hp/revolve_810_g1/board_info.txt A src/mainboard/hp/revolve_810_g1/cmos.default A src/mainboard/hp/revolve_810_g1/cmos.layout A src/mainboard/hp/revolve_810_g1/devicetree.cb A src/mainboard/hp/revolve_810_g1/dsdt.asl A src/mainboard/hp/revolve_810_g1/gma-mainboard.ads A src/mainboard/hp/revolve_810_g1/gpio.c A src/mainboard/hp/revolve_810_g1/hda_verb.c A src/mainboard/hp/revolve_810_g1/mainboard.c A src/mainboard/hp/revolve_810_g1/romstage.c A src/mainboard/hp/revolve_810_g1/spd/hynix_4g.spd.hex 18 files changed, 997 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/72/22972/4 -- To view, visit https://review.coreboot.org/22972 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newpatchset Gerrit-Change-Id: Iba9c361591697e6a2b3b7b485f7f1649c2a83524 Gerrit-Change-Number: 22972 Gerrit-PatchSet: 4 Gerrit-Owner: Bill XIE <persmule(a)gmail.com> Gerrit-Reviewer: Bill XIE <persmule(a)gmail.com> Gerrit-Reviewer: Iru Cai <mytbk920423(a)gmail.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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Change in coreboot[master]: mainboard/hp: Add Elitebook Revolve 810 G1
by build bot (Jenkins) (Code Review) 22 Dec '17

22 Dec '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/22972 ) Change subject: mainboard/hp: Add Elitebook Revolve 810 G1 ...................................................................... Patch Set 3: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-checkpatch/19684/ : SUCCESS https://qa.coreboot.org/job/coreboot-gerrit/64919/ : SUCCESS -- To view, visit https://review.coreboot.org/22972 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Iba9c361591697e6a2b3b7b485f7f1649c2a83524 Gerrit-Change-Number: 22972 Gerrit-PatchSet: 3 Gerrit-Owner: Bill XIE <persmule(a)gmail.com> Gerrit-Reviewer: Bill XIE <persmule(a)gmail.com> Gerrit-Reviewer: Iru Cai <mytbk920423(a)gmail.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Fri, 22 Dec 2017 09:38:33 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in coreboot[master]: mainboard/hp: Add Elitebook Revolve 810 G1
by Bill XIE (Code Review) 22 Dec '17

22 Dec '17

Hello Patrick Rudolph, Iru Cai, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/22972 to look at the new patch set (#3). Change subject: mainboard/hp: Add Elitebook Revolve 810 G1 ...................................................................... mainboard/hp: Add Elitebook Revolve 810 G1 The code is based on autoport and that for 8470p. Tested: - CPU i5-3437U - Slotted DIMM 8GiB - Soldered RAM 4GiB from Hynix (There may be more models here) - Onboard USB2 interfaces (digitizer, wlan slot, wwan slot, camera) - Mini pci-e on wlan slot - USB3 ports - S3 - TPM1 on LPC Change-Id: Iba9c361591697e6a2b3b7b485f7f1649c2a83524 Signed-off-by: Bill XIE <persmule(a)gmail.com> --- A src/mainboard/hp/revolve_810_g1/Kconfig A src/mainboard/hp/revolve_810_g1/Kconfig.name A src/mainboard/hp/revolve_810_g1/Makefile.inc A src/mainboard/hp/revolve_810_g1/acpi/ec.asl A src/mainboard/hp/revolve_810_g1/acpi/platform.asl A src/mainboard/hp/revolve_810_g1/acpi/superio.asl A src/mainboard/hp/revolve_810_g1/acpi_tables.c A src/mainboard/hp/revolve_810_g1/board_info.txt A src/mainboard/hp/revolve_810_g1/cmos.default A src/mainboard/hp/revolve_810_g1/cmos.layout A src/mainboard/hp/revolve_810_g1/devicetree.cb A src/mainboard/hp/revolve_810_g1/dsdt.asl A src/mainboard/hp/revolve_810_g1/gma-mainboard.ads A src/mainboard/hp/revolve_810_g1/gpio.c A src/mainboard/hp/revolve_810_g1/hda_verb.c A src/mainboard/hp/revolve_810_g1/mainboard.c A src/mainboard/hp/revolve_810_g1/romstage.c A src/mainboard/hp/revolve_810_g1/spd/hynix_4g.spd.hex 18 files changed, 997 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/72/22972/3 -- To view, visit https://review.coreboot.org/22972 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newpatchset Gerrit-Change-Id: Iba9c361591697e6a2b3b7b485f7f1649c2a83524 Gerrit-Change-Number: 22972 Gerrit-PatchSet: 3 Gerrit-Owner: Bill XIE <persmule(a)gmail.com> Gerrit-Reviewer: Bill XIE <persmule(a)gmail.com> Gerrit-Reviewer: Iru Cai <mytbk920423(a)gmail.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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Change in coreboot[master]: mainboard/hp: Add Eliteboot Revolve 810 G1
by Bill XIE (Code Review) 22 Dec '17

22 Dec '17

Bill XIE has posted comments on this change. ( https://review.coreboot.org/22972 ) Change subject: mainboard/hp: Add Eliteboot Revolve 810 G1 ...................................................................... Patch Set 2: (1 comment) https://review.coreboot.org/#/c/22972/2/src/mainboard/hp/revolve_810_g1/rom… File src/mainboard/hp/revolve_810_g1/romstage.c: https://review.coreboot.org/#/c/22972/2/src/mainboard/hp/revolve_810_g1/rom… PS2, Line 91: void *spd_file = cbfs_boot_map_with_leak("spd.bin", CBFS_TYPE_SPD, > please don't leak the file I just follow the common way to read spd files from cbfs, see romstage.c of mb/lenovo/s230u and x1_carbon_gen1 -- To view, visit https://review.coreboot.org/22972 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Iba9c361591697e6a2b3b7b485f7f1649c2a83524 Gerrit-Change-Number: 22972 Gerrit-PatchSet: 2 Gerrit-Owner: Bill XIE <persmule(a)gmail.com> Gerrit-Reviewer: Bill XIE <persmule(a)gmail.com> Gerrit-Reviewer: Iru Cai <mytbk920423(a)gmail.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Fri, 22 Dec 2017 09:30:04 +0000 Gerrit-HasComments: Yes Gerrit-HasLabels: No

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Change in coreboot[master]: soc/intel/{apollolake, cannonlake, common, skylake}: Add _soc_ prefix...
by build bot (Jenkins) (Code Review) 22 Dec '17

22 Dec '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/22973 ) Change subject: soc/intel/{apollolake, cannonlake, common, skylake}: Add _soc_ prefix in weak function ...................................................................... Patch Set 2: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-checkpatch/19683/ : SUCCESS https://qa.coreboot.org/job/coreboot-gerrit/64918/ : SUCCESS -- To view, visit https://review.coreboot.org/22973 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Iab1b2f51eaad87906e35dbb9e90272590974e145 Gerrit-Change-Number: 22973 Gerrit-PatchSet: 2 Gerrit-Owner: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Fri, 22 Dec 2017 08:48:24 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in coreboot[master]: mainboard/hp: Add Eliteboot Revolve 810 G1
by Patrick Rudolph (Code Review) 22 Dec '17

22 Dec '17

Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/22972 ) Change subject: mainboard/hp: Add Eliteboot Revolve 810 G1 ...................................................................... Patch Set 2: (3 comments) What doesn't work or needs to be implemented ? https://review.coreboot.org/#/c/22972/2//COMMIT_MSG Commit Message: https://review.coreboot.org/#/c/22972/2//COMMIT_MSG@7 PS2, Line 7: mainboard/hp: Add Eliteboot Revolve 810 G1 Elitebook https://review.coreboot.org/#/c/22972/2/src/mainboard/hp/revolve_810_g1/rom… File src/mainboard/hp/revolve_810_g1/romstage.c: https://review.coreboot.org/#/c/22972/2/src/mainboard/hp/revolve_810_g1/rom… PS2, Line 18: #include <stdint.h> please remove obsolete headers https://review.coreboot.org/#/c/22972/2/src/mainboard/hp/revolve_810_g1/rom… PS2, Line 91: void *spd_file = cbfs_boot_map_with_leak("spd.bin", CBFS_TYPE_SPD, please don't leak the file -- To view, visit https://review.coreboot.org/22972 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Iba9c361591697e6a2b3b7b485f7f1649c2a83524 Gerrit-Change-Number: 22972 Gerrit-PatchSet: 2 Gerrit-Owner: Bill XIE <persmule(a)gmail.com> Gerrit-Reviewer: Iru Cai <mytbk920423(a)gmail.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Fri, 22 Dec 2017 08:46:35 +0000 Gerrit-HasComments: Yes Gerrit-HasLabels: No

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Change in coreboot[master]: soc/intel/{apollolake, cannonlake, common, skylake}: Add _soc_ prefix...
by build bot (Jenkins) (Code Review) 22 Dec '17

22 Dec '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/22973 ) Change subject: soc/intel/{apollolake, cannonlake, common, skylake}: Add _soc_ prefix in weak function ...................................................................... Patch Set 1: Verified-1 Build Failed https://qa.coreboot.org/job/coreboot-gerrit/64917/ : ABORTED https://qa.coreboot.org/job/coreboot-checkpatch/19682/ : SUCCESS -- To view, visit https://review.coreboot.org/22973 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Iab1b2f51eaad87906e35dbb9e90272590974e145 Gerrit-Change-Number: 22973 Gerrit-PatchSet: 1 Gerrit-Owner: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Fri, 22 Dec 2017 08:41:39 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in coreboot[master]: soc/intel/{apollolake, cannonlake, common, skylake}: Add _soc_ prefix...
by Subrata Banik (Code Review) 22 Dec '17

22 Dec '17

Subrata Banik has uploaded this change for review. ( https://review.coreboot.org/22973 Change subject: soc/intel/{apollolake, cannonlake, common, skylake}: Add _soc_ prefix in weak function ...................................................................... soc/intel/{apollolake, cannonlake, common, skylake}: Add _soc_ prefix in weak function This patch ensures all soc function name is having _soc_ prefix in it. TEST=Able to compile SMM common code for all supported SOC. Change-Id: Iab1b2f51eaad87906e35dbb9e90272590974e145 Signed-off-by: Subrata Banik <subrata.banik(a)intel.com> --- M src/soc/intel/apollolake/smihandler.c M src/soc/intel/cannonlake/smihandler.c M src/soc/intel/common/block/include/intelblocks/smihandler.h M src/soc/intel/common/block/smm/smihandler.c M src/soc/intel/skylake/smihandler.c 5 files changed, 49 insertions(+), 33 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/73/22973/1 diff --git a/src/soc/intel/apollolake/smihandler.c b/src/soc/intel/apollolake/smihandler.c index f42ae01..5b28db2 100644 --- a/src/soc/intel/apollolake/smihandler.c +++ b/src/soc/intel/apollolake/smihandler.c @@ -22,7 +22,7 @@ #include <soc/pci_devs.h> #include <soc/pm.h> -int smihandler_disable_busmaster(device_t dev) +int smihandler_soc_disable_busmaster(device_t dev) { if (dev == PCH_DEV_PMC) return 0; @@ -35,7 +35,7 @@ } /* SMI handlers that should be serviced in SCI mode too. */ -uint32_t smi_handler_get_sci_mask(void) +uint32_t smihandler_soc_get_sci_mask(void) { uint32_t sci_mask = SMI_HANDLER_SCI_EN(APM_SMI_STS) | diff --git a/src/soc/intel/cannonlake/smihandler.c b/src/soc/intel/cannonlake/smihandler.c index 6c57d4a..f40e81d 100644 --- a/src/soc/intel/cannonlake/smihandler.c +++ b/src/soc/intel/cannonlake/smihandler.c @@ -25,7 +25,7 @@ return &em64t101_smm_ops; } -void smihandler_check_illegal_access(uint32_t tco_sts) +void smihandler_soc_check_illegal_access(uint32_t tco_sts) { if (!((tco_sts & (1 << 8)) && IS_ENABLED(CONFIG_SPI_FLASH_SMM) && fast_spi_wpd_status())) @@ -46,7 +46,7 @@ } /* SMI handlers that should be serviced in SCI mode too. */ -uint32_t smi_handler_get_sci_mask(void) +uint32_t smihandler_soc_get_sci_mask(void) { uint32_t sci_mask = SMI_HANDLER_SCI_EN(APM_STS_BIT) | diff --git a/src/soc/intel/common/block/include/intelblocks/smihandler.h b/src/soc/intel/common/block/include/intelblocks/smihandler.h index f1e3ecf..df2d17c 100644 --- a/src/soc/intel/common/block/include/intelblocks/smihandler.h +++ b/src/soc/intel/common/block/include/intelblocks/smihandler.h @@ -62,9 +62,6 @@ #define SMI_HANDLER_SCI_EN(__bit) (1 << (__bit)) -/* SMI handlers that should be serviced in SCI mode too. */ -uint32_t smi_handler_get_sci_mask(void); - /* * This function should be implemented in SOC specific code to handle * the SMI event on SLP_EN. The default functionality is provided in @@ -143,23 +140,31 @@ */ void smihandler_southbridge_espi( const struct smm_save_state_ops *save_state_ops); -/* - * This function returns a 1 or 0 depending on whether disable_busmaster - * needs to be done for the specified device on S5 entry - */ -int smihandler_disable_busmaster(device_t dev); - -/* - * SoC needs to implement the mechanism to know if an illegal attempt - * has been made to write to the BIOS area. - */ -void smihandler_check_illegal_access(uint32_t tco_sts); /* * Returns gnvs pointer within SMM context */ struct global_nvs_t *smm_get_gnvs(void); +/* SoC overrides. */ + +/* + * This function returns a 1 or 0 depending on whether disable_busmaster + * needs to be done for the specified device on S5 entry + */ +int smihandler_soc_disable_busmaster(device_t dev); + +/* SMI handlers that should be serviced in SCI mode too. */ +uint32_t smihandler_soc_get_sci_mask(void); + +/* + * SoC needs to implement the mechanism to know if an illegal attempt + * has been made to write to the BIOS area. + */ +void smihandler_soc_check_illegal_access(uint32_t tco_sts); + +/* Mainboard overrides. */ + /* Mainboard handler for GPI SMIs */ void mainboard_smi_gpi_handler(const struct gpi_status *sts); diff --git a/src/soc/intel/common/block/smm/smihandler.c b/src/soc/intel/common/block/smm/smihandler.c index 9a4ee7c..5cf0ccd 100644 --- a/src/soc/intel/common/block/smm/smihandler.c +++ b/src/soc/intel/common/block/smm/smihandler.c @@ -2,7 +2,7 @@ * This file is part of the coreboot project. * * Copyright (C) 2013 Google Inc. - * Copyright (C) 2015-2016 Intel Corp. + * Copyright (C) 2015-2017 Intel Corp. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -38,13 +38,13 @@ /* SoC overrides. */ -__attribute__((weak)) int smihandler_disable_busmaster(device_t dev) +__attribute__((weak)) int smihandler_soc_disable_busmaster(device_t dev) { return 1; } /* SMI handlers that should be serviced in SCI mode too. */ -__attribute__((weak)) uint32_t smi_handler_get_sci_mask(void) +__attribute__((weak)) uint32_t smihandler_soc_get_sci_mask(void) { return 0; /* No valid SCI mask for SMI handler */ } @@ -53,11 +53,27 @@ * Needs to implement the mechanism to know if an illegal attempt * has been made to write to the BIOS area. */ -__attribute__((weak)) void smihandler_check_illegal_access(uint32_t tco_sts) +__attribute__((weak)) void smihandler_soc_check_illegal_access( + uint32_t tco_sts) { return; } +/* Mainboard overrides. */ + +__attribute__((weak)) void mainboard_smi_gpi_handler(const struct + gpi_status *sts) +{ + return; +} + +__attribute__((weak)) void mainboard_smi_espi_handler(void) +{ + return; +} + +/* Common Functions */ + static void *find_save_state(const struct smm_save_state_ops *save_state_ops, int cmd) { @@ -112,7 +128,7 @@ u32 reg32; device_t dev = PCI_DEV(bus, slot, func); - if (!smihandler_disable_busmaster(dev)) + if (!smihandler_soc_disable_busmaster(dev)) continue; val = pci_read_config32(dev, PCI_VENDOR_ID); @@ -360,7 +376,7 @@ if (!tco_sts) return; - smihandler_check_illegal_access(tco_sts); + smihandler_soc_check_illegal_access(tco_sts); if (tco_sts & TCO_TIMEOUT) { /* TIMEOUT */ /* Handle TCO timeout */ @@ -381,9 +397,6 @@ printk(BIOS_DEBUG, "Periodic SMI.\n"); } -void __attribute__((weak)) -mainboard_smi_gpi_handler(const struct gpi_status *sts) { } - void smihandler_southbridge_gpi( const struct smm_save_state_ops *save_state_ops) { @@ -396,8 +409,6 @@ gpi_clear_get_smi_status(&smi_sts); } -void __attribute__((weak)) mainboard_smi_espi_handler(void) { } - void smihandler_southbridge_espi( const struct smm_save_state_ops *save_state_ops) { @@ -419,10 +430,10 @@ /* * In SCI mode, execute only those SMI handlers that have * declared themselves as available for service in that mode - * using smi_handler_get_sci_mask. + * using smihandler_soc_get_sci_mask. */ if (pmc_read_pm1_control() & SCI_EN) - smi_sts &= smi_handler_get_sci_mask(); + smi_sts &= smihandler_soc_get_sci_mask(); if (!smi_sts) return; diff --git a/src/soc/intel/skylake/smihandler.c b/src/soc/intel/skylake/smihandler.c index 6e0054b..e402ba5 100644 --- a/src/soc/intel/skylake/smihandler.c +++ b/src/soc/intel/skylake/smihandler.c @@ -25,7 +25,7 @@ return &em64t101_smm_ops; } -void smihandler_check_illegal_access(uint32_t tco_sts) +void smihandler_soc_check_illegal_access(uint32_t tco_sts) { if (!((tco_sts & (1 << 8)) && IS_ENABLED(CONFIG_SPI_FLASH_SMM) && fast_spi_wpd_status())) @@ -46,7 +46,7 @@ } /* SMI handlers that should be serviced in SCI mode too. */ -uint32_t smi_handler_get_sci_mask(void) +uint32_t smihandler_soc_get_sci_mask(void) { uint32_t sci_mask = SMI_HANDLER_SCI_EN(APM_STS_BIT) | -- To view, visit https://review.coreboot.org/22973 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: Iab1b2f51eaad87906e35dbb9e90272590974e145 Gerrit-Change-Number: 22973 Gerrit-PatchSet: 1 Gerrit-Owner: Subrata Banik <subrata.banik(a)intel.com>

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Change in coreboot[master]: mainboard/hp: Add Eliteboot Revolve 810 G1
by Iru Cai (Code Review) 22 Dec '17

22 Dec '17

Iru Cai has posted comments on this change. ( https://review.coreboot.org/22972 ) Change subject: mainboard/hp: Add Eliteboot Revolve 810 G1 ...................................................................... Patch Set 2: (1 comment) https://review.coreboot.org/#/c/22972/2/src/mainboard/hp/revolve_810_g1/Mak… File src/mainboard/hp/revolve_810_g1/Makefile.inc: https://review.coreboot.org/#/c/22972/2/src/mainboard/hp/revolve_810_g1/Mak… PS2, Line 18: ramstage-$(CONFIG_MAINBOARD_USE_LIBGFXINIT) += gma-mainboard.ads gma-mainboard.ads not found in this patch set -- To view, visit https://review.coreboot.org/22972 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Iba9c361591697e6a2b3b7b485f7f1649c2a83524 Gerrit-Change-Number: 22972 Gerrit-PatchSet: 2 Gerrit-Owner: Bill XIE <persmule(a)gmail.com> Gerrit-Reviewer: Iru Cai <mytbk920423(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Fri, 22 Dec 2017 08:18:02 +0000 Gerrit-HasComments: Yes Gerrit-HasLabels: No

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coreboot-gerrit December 2017