build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/22980 )
Change subject: sb/intel/i82801ix: Use the common ACPI pirq generator
......................................................................
Patch Set 4:
Build Successful
https://qa.coreboot.org/job/coreboot-checkpatch/19730/ : SUCCESS
https://qa.coreboot.org/job/coreboot-gerrit/64971/ : SUCCESS
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build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/22980 )
Change subject: sb/intel/i82801ix: Use the common ACPI pirq generator
......................................................................
Patch Set 3: Verified-1
Build Failed
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https://qa.coreboot.org/job/coreboot-checkpatch/19728/ : SUCCESS
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Gerrit-Change-Number: 22980
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Gerrit-Comment-Date: Sun, 24 Dec 2017 01:29:38 +0000
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Hello build bot (Jenkins), Nico Huber,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/22979
to look at the new patch set (#5).
Change subject: src/sb/intel/common/pirq_gen: Rework generating pin-route tables
......................................................................
src/sb/intel/common/pirq_gen: Rework generating pin-route tables
This creates a pin-route matrix first and then generates the ACPI
entries based on that. This approach has the advantage of being
simpler (no need for checks on double entries) and requiring less
access to the pci config space.
A few thing that are also fixed:
* Don't declare DEFAULT_RCBA redundantly.
* Only loop over PCI devices on bus 0
* Add a license header to rcba_pirq.c
* Remove inappropriate use of typedefs
Change-Id: Ic68a91d0cb55942a4d928b30f73e1c779142420d
Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz>
---
M src/southbridge/intel/bd82x6x/Kconfig
M src/southbridge/intel/bd82x6x/pch.h
M src/southbridge/intel/common/acpi_pirq_gen.c
M src/southbridge/intel/common/acpi_pirq_gen.h
M src/southbridge/intel/common/rcba_pirq.c
M src/southbridge/intel/common/rcba_pirq.h
6 files changed, 83 insertions(+), 70 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/79/22979/5
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Gerrit-Change-Number: 22979
Gerrit-PatchSet: 5
Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz>
Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Hello build bot (Jenkins), Nico Huber,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/22979
to look at the new patch set (#4).
Change subject: src/sb/intel/common/pirq_gen: Rework generating pin-route map
......................................................................
src/sb/intel/common/pirq_gen: Rework generating pin-route map
This creates a pin-route matrix first and then generates the ACPI
entries based on that. This approach has the advantage of being
simpler (no need for checks on double entries) and requiring less
access to the pci config space.
A few thing that are also fixed:
* Don't declare DEFAULT_RCBA redundantly.
* Only loop over PCI devices on bus 0
* Add a license header to rcba_pirq.c
* Remove inappropriate use of typedefs
Change-Id: Ic68a91d0cb55942a4d928b30f73e1c779142420d
Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz>
---
M src/southbridge/intel/bd82x6x/Kconfig
M src/southbridge/intel/bd82x6x/pch.h
M src/southbridge/intel/common/acpi_pirq_gen.c
M src/southbridge/intel/common/acpi_pirq_gen.h
M src/southbridge/intel/common/rcba_pirq.c
M src/southbridge/intel/common/rcba_pirq.h
6 files changed, 83 insertions(+), 69 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/79/22979/4
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Gerrit-Change-Number: 22979
Gerrit-PatchSet: 4
Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz>
Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/22980 )
Change subject: sb/intel/i82801ix: Use the common ACPI pirq generator
......................................................................
Patch Set 2: Verified+1
Build Successful
https://qa.coreboot.org/job/coreboot-gerrit/64967/ : SUCCESS
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Gerrit-Change-Number: 22980
Gerrit-PatchSet: 2
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Gerrit-Comment-Date: Sat, 23 Dec 2017 22:25:06 +0000
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Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/22980 )
Change subject: sb/intel/i82801ix: Use the common ACPI pirq generator
......................................................................
Patch Set 2:
Is there something needed for the Q35 qemu device?
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Gerrit-Change-Number: 22980
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Arthur Heymans has uploaded a new patch set (#2). ( https://review.coreboot.org/22980 )
Change subject: sb/intel/i82801ix: Use the common ACPI pirq generator
......................................................................
sb/intel/i82801ix: Use the common ACPI pirq generator
For this to work the northbridge and lpc bridge device need acpi_name
functions.
This also needs DEFAULT_RCBA being configured in Kconfig.
TESTED on Thinkpad X200, a valid PIRQ routing in SSDT in
/sys/firmware/acpi/tables/SSDT
Change-Id: I62e520f53fa3f928a8e6f3b3cf33af2acdd53ed9
Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz>
---
D src/mainboard/lenovo/t400/acpi/gm45_pci_irqs.asl
D src/mainboard/lenovo/x200/acpi/gm45_pci_irqs.asl
D src/mainboard/roda/rk9/acpi/gm45_pci_irqs.asl
M src/northbridge/intel/gm45/acpi/hostbridge.asl
M src/northbridge/intel/gm45/northbridge.c
M src/southbridge/intel/i82801ix/Kconfig
M src/southbridge/intel/i82801ix/i82801ix.h
M src/southbridge/intel/i82801ix/lpc.c
8 files changed, 32 insertions(+), 245 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/80/22980/2
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