coreboot-gerrit October 2017

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Change in coreboot[master]: util/superiotool: dump VT1211 registers
by build bot (Jenkins) (Code Review) 31 Oct '17

31 Oct '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/22255 ) Change subject: util/superiotool: dump VT1211 registers ...................................................................... Patch Set 1: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-checkpatch/17721/ : SUCCESS https://qa.coreboot.org/job/coreboot-gerrit/62717/ : SUCCESS -- To view, visit https://review.coreboot.org/22255 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Id01b72a2194ebf3359a11c3ff382efaedf28f9e1 Gerrit-Change-Number: 22255 Gerrit-PatchSet: 1 Gerrit-Owner: Lubomir Rintel <lkundrak(a)v3.sk> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Tue, 31 Oct 2017 08:34:56 +0000 Gerrit-HasComments: No

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Change in coreboot[master]: util/superiotool: recognize a VT1211 LPC superio
by build bot (Jenkins) (Code Review) 31 Oct '17

31 Oct '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/22253 ) Change subject: util/superiotool: recognize a VT1211 LPC superio ...................................................................... Patch Set 1: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-checkpatch/17719/ : SUCCESS https://qa.coreboot.org/job/coreboot-gerrit/62715/ : SUCCESS -- To view, visit https://review.coreboot.org/22253 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I2c24c347c3e044397944ca2abbceb36f83483daf Gerrit-Change-Number: 22253 Gerrit-PatchSet: 1 Gerrit-Owner: Lubomir Rintel <lkundrak(a)v3.sk> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Tue, 31 Oct 2017 08:32:47 +0000 Gerrit-HasComments: No

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Change in coreboot[master]: util/superiotool: distinguish between VT82C686 and VT1211
by build bot (Jenkins) (Code Review) 31 Oct '17

31 Oct '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/22254 ) Change subject: util/superiotool: distinguish between VT82C686 and VT1211 ...................................................................... Patch Set 1: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-checkpatch/17720/ : SUCCESS https://qa.coreboot.org/job/coreboot-gerrit/62716/ : SUCCESS -- To view, visit https://review.coreboot.org/22254 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Ic7529c84724c8d6b9eb75b863f1bceef5e4b52b5 Gerrit-Change-Number: 22254 Gerrit-PatchSet: 1 Gerrit-Owner: Lubomir Rintel <lkundrak(a)v3.sk> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Tue, 31 Oct 2017 08:31:46 +0000 Gerrit-HasComments: No

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Change in coreboot[master]: util/superiotool: dump VT1211 registers
by Lubomir Rintel (Code Review) 31 Oct '17

31 Oct '17

Lubomir Rintel has uploaded this change for review. ( https://review.coreboot.org/22255 Change subject: util/superiotool: dump VT1211 registers ...................................................................... util/superiotool: dump VT1211 registers Change-Id: Id01b72a2194ebf3359a11c3ff382efaedf28f9e1 Signed-off-by: Lubomir Rintel <lkundrak(a)v3.sk> --- M util/superiotool/via.c 1 file changed, 41 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/55/22255/1 diff --git a/util/superiotool/via.c b/util/superiotool/via.c index 3fa3635..0312de7 100644 --- a/util/superiotool/via.c +++ b/util/superiotool/via.c @@ -26,6 +26,47 @@ {0x3c00, "VT82C686A/VT82C686B", { {EOT}}}, {0x3c01, "VT1211", { + {NOLDN, NULL, + {0x20,0x21,0x22,0x23,0x24,0x25,0x26,0x27,0x28,0x29, + 0x2e,0x2f,EOT}, + {0x3c,0x01,0x00,0x11,0x00,0x00,0x00,0x00,0x00,0x00, + 0x00,0x00,EOT}}, + {0x0, "Floppy Disk Controller (FDC)", + {0x30,0x60,0x61,0x70,0x74,0xf0,0xf1,EOT}, + {0x00,0x03,0xf0,0x06,0x01,0x00,0x00,EOT}}, + {0x1, "Parallel Port (PP)", + {0x30,0x60,0x61,0x70,0x74,0xf0,EOT}, + {0x03,0x03,0x78,0x05,0x00,0x00,EOT}}, + {0x2, "Serial Port 1 (UART1)", + {0x30,0x60,0x61,0x70,0xf0,EOT}, + {0x00,0x03,0xf8,0x04,0x00,EOT}}, + {0x3, "Serial Port 2 (UART2)", + {0x30,0x60,0x61,0x70,0xf0,EOT}, + {0x00,0x02,0xf8,0x03,0x00,EOT}}, + {0x6, "MIDI", + {0x30,0x60,0x61,0x70,EOT}, + {0x00,0x03,0x30,0x00,EOT}}, + {0x7, "Game Port (GMP)", + {0x30,0x60,0x61,EOT}, + {0x00,0x02,0x00,EOT}}, + {0x8, "GPIO", + {0x30,0x60,0x61,0x70,0xf0,0xf1,0xf2,EOT}, + {0x00,0xe9,0x00,0x00,0x00,0x00,0x00,EOT}}, + {0x9, "Watch Dog (WDG)", + {0x30,0x60,0x61,0x70,0xf0,EOT}, + {0x00,0xea,0x00,0x00,0x00,EOT}}, + {0xa, "Wake-up Control (WUC)", + {0x30,0x60,0x61,0x70,EOT}, + {0x00,0xeb,0x00,0x00,EOT}}, + {0xb, "Hardware Monitor (HM)", + {0x30,0x60,0x61,0x70,EOT}, + {0x00,0xec,0x00,0x00,EOT}}, + {0xc, "Very Fast IR (VFIR)", + {0x30,0x60,0x61,0x70,0x74,0xf0,EOT}, + {0x00,0xe8,0x00,0x00,0x06,0x00,EOT}}, + {0xd, "Flash ROM (ROM)", + {0x30,0xf0,EOT}, + {0x01,0x00,EOT}}, {EOT}}}, {EOT} }; -- To view, visit https://review.coreboot.org/22255 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: Id01b72a2194ebf3359a11c3ff382efaedf28f9e1 Gerrit-Change-Number: 22255 Gerrit-PatchSet: 1 Gerrit-Owner: Lubomir Rintel <lkundrak(a)v3.sk>

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Change in coreboot[master]: util/superiotool: recognize a VT1211 LPC superio
by Lubomir Rintel (Code Review) 31 Oct '17

31 Oct '17

Lubomir Rintel has uploaded this change for review. ( https://review.coreboot.org/22253 Change subject: util/superiotool: recognize a VT1211 LPC superio ...................................................................... util/superiotool: recognize a VT1211 LPC superio Change-Id: I2c24c347c3e044397944ca2abbceb36f83483daf Signed-off-by: Lubomir Rintel <lkundrak(a)v3.sk> --- M 3rdparty/libgfxinit M 3rdparty/libhwbase M 3rdparty/vboot M util/superiotool/superiotool.h M util/superiotool/via.c 5 files changed, 40 insertions(+), 20 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/53/22253/1 diff --git a/3rdparty/libgfxinit b/3rdparty/libgfxinit index 3a0e2a0..fb4f8ce 160000 --- a/3rdparty/libgfxinit +++ b/3rdparty/libgfxinit @@ -1 +1 @@ -Subproject commit 3a0e2a08f5489f3bb5c6e9f97b903e6e10c31a6c +Subproject commit fb4f8ce26a05c2304367c066b806519941658373 diff --git a/3rdparty/libhwbase b/3rdparty/libhwbase index 6685971..3bf6759 160000 --- a/3rdparty/libhwbase +++ b/3rdparty/libhwbase @@ -1 +1 @@ -Subproject commit 66859712e4817288591908d737dbf41ddea31c3a +Subproject commit 3bf6759dc09d27c06b3533fd536e667356853d3d diff --git a/3rdparty/vboot b/3rdparty/vboot index 3b80572..3d25d2b 160000 --- a/3rdparty/vboot +++ b/3rdparty/vboot @@ -1 +1 @@ -Subproject commit 3b805725c15022783f0737a72b4f27962abf48cd +Subproject commit 3d25d2b4ba7886244176aa8c429fdac2acf7db3e diff --git a/util/superiotool/superiotool.h b/util/superiotool/superiotool.h index 58a9d61..01237a5 100644 --- a/util/superiotool/superiotool.h +++ b/util/superiotool/superiotool.h @@ -249,7 +249,7 @@ {probe_idregs_smsc, {0x2e, 0x4e, 0x162e, 0x164e, 0x3f0, 0x370, EOT}}, {probe_idregs_winbond, {0x2e, 0x4e, 0x3f0, 0x370, 0x250, EOT}}, #ifdef PCI_SUPPORT - {probe_idregs_via, {0x3f0, EOT}}, + {probe_idregs_via, {0x2e, 0x4e, 0x3f0, EOT}}, /* in fact read the BASE from HW */ {probe_idregs_amd, {0xaa, EOT}}, #endif diff --git a/util/superiotool/via.c b/util/superiotool/via.c index b71d43c..4a97336 100644 --- a/util/superiotool/via.c +++ b/util/superiotool/via.c @@ -19,8 +19,11 @@ #define DEVICE_ID_VT82C686_REG 0xe0 #define DEVICE_REV_VT82C686_REG 0xe1 +#define DEVICE_ID_VT1211_REG 0x20 +#define DEVICE_REV_VT1211_REG 0x21 + static const struct superio_registers reg_table[] = { - {0x3c, "VT82C686A/VT82C686B", { + {0x3c, "VT82C686A/VT82C686B/VT1211", { {EOT}}}, {EOT} }; @@ -74,26 +77,43 @@ uint16_t id; uint8_t rev; - probing_for("VIA", "", port); + if (port == 0x3f0) { + probing_for("VIA", "(init=vt82c686)", port); + if (enter_conf_mode_via_vt82c686()) + return; - if (enter_conf_mode_via_vt82c686()) - return; + id = regval(port, DEVICE_ID_VT82C686_REG); + rev = regval(port, DEVICE_REV_VT82C686_REG); - id = regval(port, DEVICE_ID_VT82C686_REG); - rev = regval(port, DEVICE_REV_VT82C686_REG); - - if (superio_unknown(reg_table, id)) { - if (verbose) - printf(NOTFOUND "id=0x%04x, rev=0x%02x\n", id, rev); + if (superio_unknown(reg_table, id)) { + if (verbose) + printf(NOTFOUND "id=0x%04x, rev=0x%02x\n", id, rev); + } else { + printf("Found VIA %s (id=0x%04x, rev=0x%02x) at 0x%x\n", + get_superio_name(reg_table, id), id, rev, port); + chip_found = 1; + } exit_conf_mode_via_vt82c686(); - return; + if (chip_found) + return; + } else { + probing_for("VIA", "(init=0x87,0x87)", port); + enter_conf_mode_winbond_fintek_ite_8787(port); + + id = regval(port, DEVICE_ID_VT1211_REG); + rev = regval(port, DEVICE_REV_VT1211_REG); + + if (superio_unknown(reg_table, id)) { + if (verbose) + printf(NOTFOUND "id=0x%04x, rev=0x%02x\n", id, rev); + } else { + printf("Found VIA %s (id=0x%04x, rev=0x%02x) at 0x%x\n", + get_superio_name(reg_table, id), id, rev, port); + chip_found = 1; + } } - printf("Found VIA %s (id=0x%04x, rev=0x%02x) at 0x%x\n", - get_superio_name(reg_table, id), id, rev, port); - chip_found = 1; - - exit_conf_mode_via_vt82c686(); + exit_conf_mode_winbond_fintek_ite_8787(port); } void print_via_chips(void) -- To view, visit https://review.coreboot.org/22253 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: I2c24c347c3e044397944ca2abbceb36f83483daf Gerrit-Change-Number: 22253 Gerrit-PatchSet: 1 Gerrit-Owner: Lubomir Rintel <lkundrak(a)v3.sk>

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Change in coreboot[master]: util/superiotool: distinguish between VT82C686 and VT1211
by Lubomir Rintel (Code Review) 31 Oct '17

31 Oct '17

Lubomir Rintel has uploaded this change for review. ( https://review.coreboot.org/22254 Change subject: util/superiotool: distinguish between VT82C686 and VT1211 ...................................................................... util/superiotool: distinguish between VT82C686 and VT1211 They both have a device id of 0x3c. The former is part of the PCI chip set accessible via port 0x3f0 while the latter is a standalone LPC chip accessible via 0x2e/0x4e depending on strapping. They're not register compatible: the VT82C686 only provides a FDC, LPT and part of UARTs. The VT82C686 documentation suggests it has revision 0x00 while the VT1211 datasheet indicates 0x01. Nevertheless, the VT1211 I happen to have hs a revision of 0x02. Thus the revision is probably not good enough to tell one from the another. Change-Id: Ic7529c84724c8d6b9eb75b863f1bceef5e4b52b5 Signed-off-by: Lubomir Rintel <lkundrak(a)v3.sk> --- M util/superiotool/via.c 1 file changed, 17 insertions(+), 11 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/54/22254/1 diff --git a/util/superiotool/via.c b/util/superiotool/via.c index 4a97336..3fa3635 100644 --- a/util/superiotool/via.c +++ b/util/superiotool/via.c @@ -23,7 +23,9 @@ #define DEVICE_REV_VT1211_REG 0x21 static const struct superio_registers reg_table[] = { - {0x3c, "VT82C686A/VT82C686B/VT1211", { + {0x3c00, "VT82C686A/VT82C686B", { + {EOT}}}, + {0x3c01, "VT1211", { {EOT}}}, {EOT} }; @@ -75,41 +77,45 @@ void probe_idregs_via(uint16_t port) { uint16_t id; + uint8_t devid; uint8_t rev; if (port == 0x3f0) { - probing_for("VIA", "(init=vt82c686)", port); + probing_for("VIA", "(init=vt82c686) ", port); if (enter_conf_mode_via_vt82c686()) return; - id = regval(port, DEVICE_ID_VT82C686_REG); + devid = regval(port, DEVICE_ID_VT82C686_REG); rev = regval(port, DEVICE_REV_VT82C686_REG); + id = devid << 8; if (superio_unknown(reg_table, id)) { if (verbose) - printf(NOTFOUND "id=0x%04x, rev=0x%02x\n", id, rev); + printf(NOTFOUND "id=0x%02x, rev=0x%02x\n", devid, rev); } else { - printf("Found VIA %s (id=0x%04x, rev=0x%02x) at 0x%x\n", - get_superio_name(reg_table, id), id, rev, port); + printf("Found VIA %s (id=0x%02x, rev=0x%02x) at 0x%x\n", + get_superio_name(reg_table, id), devid, rev, port); chip_found = 1; } exit_conf_mode_via_vt82c686(); if (chip_found) return; } else { - probing_for("VIA", "(init=0x87,0x87)", port); + probing_for("VIA", "(init=0x87,0x87) ", port); enter_conf_mode_winbond_fintek_ite_8787(port); - id = regval(port, DEVICE_ID_VT1211_REG); + devid = regval(port, DEVICE_ID_VT1211_REG); rev = regval(port, DEVICE_REV_VT1211_REG); + id = (devid << 8) | 1; if (superio_unknown(reg_table, id)) { if (verbose) - printf(NOTFOUND "id=0x%04x, rev=0x%02x\n", id, rev); + printf(NOTFOUND "id=0x%02x, rev=0x%02x\n", devid, rev); } else { - printf("Found VIA %s (id=0x%04x, rev=0x%02x) at 0x%x\n", - get_superio_name(reg_table, id), id, rev, port); + printf("Found VIA %s (id=0x%02x, rev=0x%02x) at 0x%x\n", + get_superio_name(reg_table, id), devid, rev, port); chip_found = 1; + dump_superio("VIA", reg_table, port, id, LDN_SEL); } } -- To view, visit https://review.coreboot.org/22254 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: Ic7529c84724c8d6b9eb75b863f1bceef5e4b52b5 Gerrit-Change-Number: 22254 Gerrit-PatchSet: 1 Gerrit-Owner: Lubomir Rintel <lkundrak(a)v3.sk>

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Change in coreboot[master]: mainboard/google/coral: Update touchscreen device ACPI nodes
by build bot (Jenkins) (Code Review) 31 Oct '17

31 Oct '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/22252 ) Change subject: mainboard/google/coral: Update touchscreen device ACPI nodes ...................................................................... Patch Set 1: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-checkpatch/17718/ : SUCCESS https://qa.coreboot.org/job/coreboot-gerrit/62714/ : SUCCESS -- To view, visit https://review.coreboot.org/22252 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Ibf501b40ecfc957fd8be7ebffd2357dfa0e07757 Gerrit-Change-Number: 22252 Gerrit-PatchSet: 1 Gerrit-Owner: Pan Sheng-Liang <sl.pan.quantw(a)gmail.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Tim Chen <Tim-Chen(a)quantatw.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Tue, 31 Oct 2017 05:30:56 +0000 Gerrit-HasComments: No

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Change in coreboot[master]: mainboard/google/coral: Update touchscreen device ACPI nodes
by Furquan Shaikh (Code Review) 31 Oct '17

31 Oct '17

Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/22252 ) Change subject: mainboard/google/coral: Update touchscreen device ACPI nodes ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/22252 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Ibf501b40ecfc957fd8be7ebffd2357dfa0e07757 Gerrit-Change-Number: 22252 Gerrit-PatchSet: 1 Gerrit-Owner: Pan Sheng-Liang <sl.pan.quantw(a)gmail.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Comment-Date: Tue, 31 Oct 2017 05:25:41 +0000 Gerrit-HasComments: No

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Change in coreboot[master]: mainboard/google/coral: Update touchscreen device ACPI nodes
by Pan Sheng-Liang (Code Review) 31 Oct '17

31 Oct '17

Pan Sheng-Liang has uploaded this change for review. ( https://review.coreboot.org/22252 Change subject: mainboard/google/coral: Update touchscreen device ACPI nodes ...................................................................... mainboard/google/coral: Update touchscreen device ACPI nodes For Raydium, export reset GPIO as well as PowerResource BUG=b:67879912 BRANCH=master TEST=emerge-coral coreboot Change-Id: Ibf501b40ecfc957fd8be7ebffd2357dfa0e07757 Signed-off-by: Pan Sheng-Liang <Sheng-Liang.Pan(a)quantatw.com> --- M src/mainboard/google/reef/variants/coral/devicetree.cb 1 file changed, 5 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/52/22252/1 diff --git a/src/mainboard/google/reef/variants/coral/devicetree.cb b/src/mainboard/google/reef/variants/coral/devicetree.cb index b82197a..0a06c76 100644 --- a/src/mainboard/google/reef/variants/coral/devicetree.cb +++ b/src/mainboard/google/reef/variants/coral/devicetree.cb @@ -193,6 +193,11 @@ register "desc" = ""Raydium Touchscreen"" register "irq" = "ACPI_IRQ_EDGE_LOW(GPIO_21_IRQ)" register "probed" = "1" + register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_36)" + register "reset_delay_ms" = "1" + register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_152)" + register "enable_delay_ms" = "50" + register "has_power_resource" = "1" device i2c 39 on end end end # - I2C 3 -- To view, visit https://review.coreboot.org/22252 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: Ibf501b40ecfc957fd8be7ebffd2357dfa0e07757 Gerrit-Change-Number: 22252 Gerrit-PatchSet: 1 Gerrit-Owner: Pan Sheng-Liang <sl.pan.quantw(a)gmail.com>

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Change in coreboot[master]: soc/intel/skylake: Turnoff XTAL Disqualification for XTAL Shutdown
by build bot (Jenkins) (Code Review) 31 Oct '17

31 Oct '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/22237 ) Change subject: soc/intel/skylake: Turnoff XTAL Disqualification for XTAL Shutdown ...................................................................... Patch Set 2: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-checkpatch/17717/ : SUCCESS https://qa.coreboot.org/job/coreboot-gerrit/62713/ : SUCCESS -- To view, visit https://review.coreboot.org/22237 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I8abc6e9b88b3bc25cf865824aa14b292ac0524ef Gerrit-Change-Number: 22237 Gerrit-PatchSet: 2 Gerrit-Owner: Roy Mingi Park <roy.mingi.park(a)intel.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Rajneesh Bhardwaj <rajneesh.bhardwaj(a)intel.corp-partner.google.com> Gerrit-Reviewer: Rushikesh S Kadam <rushikesh.s.kadam(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Tue, 31 Oct 2017 03:53:24 +0000 Gerrit-HasComments: No

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coreboot-gerrit October 2017