Rajneesh Bhardwaj has posted comments on this change. ( https://review.coreboot.org/22236 )
Change subject: soc/intelskylake: enable 8254 Static Clock Gating for XTAL shutdown
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Patch Set 2:
(4 comments)
https://review.coreboot.org/#/c/22236/2//COMMIT_MSG
Commit Message:
https://review.coreboot.org/#/c/22236/2//COMMIT_MSG@7
PS2, Line 7: intelskylake
soc/intel/skylake
https://review.coreboot.org/#/c/22236/2//COMMIT_MSG@10
PS2, Line 10: which has a power impact.
of around 2mw?
https://review.coreboot.org/#/c/22236/2//COMMIT_MSG@12
PS2, Line 12: None
better to link it to an existing S0ix enabling related bug.
https://review.coreboot.org/#/c/22236/2//COMMIT_MSG@13
PS2, Line 13: None
why not master?
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: comment
Gerrit-Change-Id: I87fb6fa86f10be6e3c888dd3590d0e77a2b886e8
Gerrit-Change-Number: 22236
Gerrit-PatchSet: 2
Gerrit-Owner: Roy Mingi Park <roy.mingi.park(a)intel.com>
Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com>
Gerrit-Reviewer: Rajneesh Bhardwaj <rajneesh.bhardwaj(a)intel.com>
Gerrit-Reviewer: Rajneesh Bhardwaj <rajneesh.bhardwaj(a)intel.corp-partner.google.com>
Gerrit-Reviewer: Roy Mingi Park <roy.mingi.park(a)intel.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-Reviewer: rushikesh s kadam <rushikesh.s.kadam(a)intel.com>
Gerrit-Comment-Date: Tue, 31 Oct 2017 01:28:07 +0000
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