Patrick Georgi (pgeorgi(a)google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/13673
-gerrit
commit 5653f19fb0867929f920cee31feb4962560808c9
Author: Patrick Georgi <pgeorgi(a)chromium.org>
Date: Wed Feb 10 22:27:42 2016 +0100
3rdparty/chromeec: fix build with paths containing "@"
Move submodule forward to a newer upstream master to fix the build on
paths containing "@", as can happen on jenkins.
Change-Id: Ie74012725c379909d5bf631f9cc9969106ca52b8
Signed-off-by: Patrick Georgi <pgeorgi(a)chromium.org>
---
3rdparty/chromeec | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/3rdparty/chromeec b/3rdparty/chromeec
index bc404c9..388a7fa 160000
--- a/3rdparty/chromeec
+++ b/3rdparty/chromeec
@@ -1 +1 @@
-Subproject commit bc404c94b4ab1e6a62e607fd7ef034aa31d6388e
+Subproject commit 388a7fa8cff831dcb5f25a3ea4bd67de898d865a
Patrick Georgi (pgeorgi(a)google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/13672
-gerrit
commit a54672ba73da6d834dbe3ee88de0353b39d89cb2
Author: Patrick Georgi <pgeorgi(a)chromium.org>
Date: Wed Feb 10 18:07:52 2016 +0100
util/cbfstool: Improve heuristic for cbfs header pointer protection
cbfstool has a routine to deal with old images that may encourage it to
overwrite the master header. That routine is triggered for
"cbfstool add-master-header" prepared images even though these are not
at risk, and - worse - destroys the chain structure (through a negative
file length), so avoid touching such images.
Change-Id: I9d0bbe3e6300b9b9f3e50347737d1850f83ddad8
Signed-off-by: Patrick Georgi <pgeorgi(a)chromium.org>
---
util/cbfstool/cbfs_image.c | 6 +++++-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/util/cbfstool/cbfs_image.c b/util/cbfstool/cbfs_image.c
index 314ea57..65d7f7c 100644
--- a/util/cbfstool/cbfs_image.c
+++ b/util/cbfstool/cbfs_image.c
@@ -110,6 +110,9 @@ static int cbfs_fix_legacy_size(struct cbfs_image *image, char *hdr_loc)
// A bug in old cbfstool may produce extra few bytes (by alignment) and
// cause cbfstool to overwrite things after free space -- which is
// usually CBFS header on x86. We need to workaround that.
+ // Except when the last file is smaller than the header alignment,
+ // since that's a pretty good clue that the last file exists to guard
+ // the header pointer (and the master header is in a file, too).
struct cbfs_file *entry, *first = NULL, *last = NULL;
for (first = entry = cbfs_find_first_entry(image);
@@ -118,7 +121,8 @@ static int cbfs_fix_legacy_size(struct cbfs_image *image, char *hdr_loc)
last = entry;
}
if ((char *)first < (char *)hdr_loc &&
- (char *)entry > (char *)hdr_loc) {
+ (char *)entry > (char *)hdr_loc &&
+ (ntohl(last->len) > image->header.align)) {
WARN("CBFS image was created with old cbfstool with size bug. "
"Fixing size in last entry...\n");
last->len = htonl(ntohl(last->len) - image->header.align);
Aaron Durbin (adurbin(a)chromium.org) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/13671
-gerrit
commit 97d54fe0f722eb5a5c384c0fe8ff20244259e4ef
Author: Aaron Durbin <adurbin(a)chromium.org>
Date: Wed Feb 10 11:01:49 2016 -0600
libpayload: honor TSC information under CONFIG_LP_TIMER_RDTSC
When CONFIG_LP_TIMER_RDTSC is enabled honor the TSC information
exported in the coreboot tables as the cpu_khz frequency. That
allows get_cpu_speed() not to be called which currently relies
on the 8254 PIT. As certain x86 platforms allow that device
to be optional or turned off for power saving reasons, allow
a path where get_cpu_speed() is no longer called. Additionally,
this approach also allows the libpayload to not duplicate logic
that already exists in coreboot.
BUG=chrome-os-partner:50214
BRANCH=glados
TEST=Confirmed in payload TSC frequency is honored instead of
using get_cpu_speed().
Change-Id: Ib8993afdfb49065d43de705d6dbbdb9174b6f2c4
Signed-off-by: Aaron Durbin <adurbin(a)chromium.org>
---
payloads/libpayload/arch/x86/sysinfo.c | 11 +++++++----
payloads/libpayload/include/coreboot_tables.h | 8 ++++++++
payloads/libpayload/libc/coreboot.c | 18 ++++++++++++++++++
3 files changed, 33 insertions(+), 4 deletions(-)
diff --git a/payloads/libpayload/arch/x86/sysinfo.c b/payloads/libpayload/arch/x86/sysinfo.c
index c3336b8..ddd6550 100644
--- a/payloads/libpayload/arch/x86/sysinfo.c
+++ b/payloads/libpayload/arch/x86/sysinfo.c
@@ -32,12 +32,14 @@
#include <coreboot_tables.h>
#include <multiboot_tables.h>
+#define CPU_KHZ_DEFAULT 200
+
/**
* This is a global structure that is used through the library - we set it
* up initially with some dummy values - hopefully they will be overridden.
*/
struct sysinfo_t lib_sysinfo = {
- .cpu_khz = 200,
+ .cpu_khz = CPU_KHZ_DEFAULT,
#if IS_ENABLED(CONFIG_LP_SERIAL_CONSOLE)
.ser_ioport = CONFIG_LP_SERIAL_IOBASE,
#else
@@ -49,9 +51,6 @@ int lib_get_sysinfo(void)
{
int ret;
- /* Get the CPU speed (for delays). */
- lib_sysinfo.cpu_khz = get_cpu_speed();
-
#if IS_ENABLED(CONFIG_LP_MULTIBOOT)
/* Get the information from the multiboot tables,
* if they exist */
@@ -63,6 +62,10 @@ int lib_get_sysinfo(void)
ret = get_coreboot_info(&lib_sysinfo);
+ /* Get the CPU speed (for delays) if not set from the default value. */
+ if (lib_sysinfo.cpu_khz == CPU_KHZ_DEFAULT)
+ lib_sysinfo.cpu_khz = get_cpu_speed();
+
if (!lib_sysinfo.n_memranges) {
/* If we can't get a good memory range, use the default. */
lib_sysinfo.n_memranges = 2;
diff --git a/payloads/libpayload/include/coreboot_tables.h b/payloads/libpayload/include/coreboot_tables.h
index 24cbf45..276f25f 100644
--- a/payloads/libpayload/include/coreboot_tables.h
+++ b/payloads/libpayload/include/coreboot_tables.h
@@ -268,6 +268,14 @@ struct cb_boot_media_params {
uint64_t boot_media_size;
};
+#define CB_TAG_TSC_INFO 0x0032
+struct cb_tsc_info {
+ uint32_t tag;
+ uint32_t size;
+
+ uint32_t freq_khz;
+};
+
#define CB_TAG_SERIALNO 0x002a
#define CB_MAX_SERIALNO_LENGTH 32
diff --git a/payloads/libpayload/libc/coreboot.c b/payloads/libpayload/libc/coreboot.c
index 3e248e1..3abd610 100644
--- a/payloads/libpayload/libc/coreboot.c
+++ b/payloads/libpayload/libc/coreboot.c
@@ -231,6 +231,19 @@ static void cb_parse_boot_media_params(unsigned char *ptr,
info->boot_media_size = bmp->boot_media_size;
}
+#if IS_ENABLED(CONFIG_LP_TIMER_RDTSC)
+static void cb_parse_tsc_info(void *ptr, struct sysinfo_t *info)
+{
+ const struct cb_tsc_info *tsc_info = ptr;
+
+ if (tsc_info->freq_khz == 0)
+ return;
+
+ /* Honor the TSC frequency passed to the payload. */
+ info->cpu_khz = tsc_info->freq_khz;
+}
+#endif
+
int cb_parse_header(void *addr, int len, struct sysinfo_t *info)
{
struct cb_header *header;
@@ -386,6 +399,11 @@ int cb_parse_header(void *addr, int len, struct sysinfo_t *info)
case CB_TAG_BOOT_MEDIA_PARAMS:
cb_parse_boot_media_params(ptr, info);
break;
+#if IS_ENABLED(CONFIG_LP_TIMER_RDTSC)
+ case CB_TAG_TSC_INFO:
+ cb_parse_tsc_info(ptr, info);
+ break;
+#endif
default:
cb_parse_arch_specific(rec, info);
break;
Aaron Durbin (adurbin(a)chromium.org) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/13670
-gerrit
commit 1d21e14715faddf40ff583eed42e5f9a97de7f9d
Author: Aaron Durbin <adurbin(a)chromium.org>
Date: Wed Feb 10 10:56:06 2016 -0600
x86: add coreboot table entry for TSC info
The 8254 (Programmable Interrupt Timer) is becoming optional
on x86 platforms -- either from saving power or not including it
at all. To allow a payload to still use a TSC without doing
calibration provide the TSC frequency information in the coreboot
tables. That data is provided by code/logic already employed
by platform. If tsc_freq_mhz() returns 0 or
CONFIG_TSC_CONSTANT_RATE is not selected the coreboot table
record isn't created.
BUG=chrome-os-partner:50214
BRANCH=glados
TEST=With all subsequent patches confirmed TSC is picked up in
libpayload.
Change-Id: Iaeadb85c2648587debcf55f4fa5351d0c287e971
Signed-off-by: Aaron Durbin <adurbin(a)chromium.org>
---
src/arch/x86/cpu.c | 23 +++++++++++++++++++++++
src/commonlib/include/commonlib/coreboot_tables.h | 8 ++++++++
2 files changed, 31 insertions(+)
diff --git a/src/arch/x86/cpu.c b/src/arch/x86/cpu.c
index d46e591..cba105a 100644
--- a/src/arch/x86/cpu.c
+++ b/src/arch/x86/cpu.c
@@ -11,6 +11,7 @@
* GNU General Public License for more details.
*/
+#include <boot/coreboot_tables.h>
#include <console/console.h>
#include <cpu/cpu.h>
#include <arch/io.h>
@@ -18,6 +19,7 @@
#include <cpu/x86/mtrr.h>
#include <cpu/x86/msr.h>
#include <cpu/x86/lapic.h>
+#include <cpu/x86/tsc.h>
#include <arch/cpu.h>
#include <device/path.h>
#include <device/device.h>
@@ -287,3 +289,24 @@ void cpu_initialize(unsigned int index)
return;
}
+
+void lb_arch_add_records(struct lb_header *header)
+{
+ uint32_t freq_khz;
+ struct lb_tsc_info *tsc_info;
+
+ /* Don't advertise a TSC rate unless it's constant. */
+ if (!IS_ENABLED(CONFIG_TSC_CONSTANT_RATE))
+ return;
+
+ freq_khz = tsc_freq_mhz() * 1000;
+
+ /* No use exposing a TSC frequency that is zero. */
+ if (freq_khz == 0)
+ return;
+
+ tsc_info = (void *)lb_new_record(header);
+ tsc_info->tag = LB_TAG_TSC_INFO;
+ tsc_info->size = sizeof(*tsc_info);
+ tsc_info->freq_khz = freq_khz;
+}
diff --git a/src/commonlib/include/commonlib/coreboot_tables.h b/src/commonlib/include/commonlib/coreboot_tables.h
index 43adb09..5c28791 100644
--- a/src/commonlib/include/commonlib/coreboot_tables.h
+++ b/src/commonlib/include/commonlib/coreboot_tables.h
@@ -335,6 +335,14 @@ struct lb_cbmem_entry {
uint32_t id;
};
+#define LB_TAG_TSC_INFO 0x0032
+struct lb_tsc_info {
+ uint32_t tag;
+ uint32_t size;
+
+ uint32_t freq_khz;
+};
+
#define LB_TAG_SERIALNO 0x002a
#define MAX_SERIALNO_LENGTH 32
Aaron Durbin (adurbin(a)chromium.org) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/13669
-gerrit
commit f45b72bd7a4196523d22a0236eb10f3165bbe981
Author: Aaron Durbin <adurbin(a)chromium.org>
Date: Wed Feb 10 10:52:47 2016 -0600
lib/coreboot_table: add function to allow arch code to add records
Add lb_arch_add_records() To allow the architecture code to
generically hook into the coreboot table generation.
BUG=chrome-os-partner:50214
BRANCH=glados
TEST=With all subsequent patches confirmed lb_arch_add_records() is
called when a strong symbol is provided.
Change-Id: I7c69c0ff0801392bbcf5aef586a48388b624afd4
Signed-off-by: Aaron Durbin <adurbin(a)chromium.org>
---
src/include/boot/coreboot_tables.h | 3 +++
src/lib/coreboot_table.c | 5 +++++
2 files changed, 8 insertions(+)
diff --git a/src/include/boot/coreboot_tables.h b/src/include/boot/coreboot_tables.h
index ff942f1..34183a0 100644
--- a/src/include/boot/coreboot_tables.h
+++ b/src/include/boot/coreboot_tables.h
@@ -22,6 +22,9 @@ void lb_board(struct lb_header *header);
/* Define this in soc or fsp driver to add specific table entries. */
void lb_framebuffer(struct lb_header *header);
+/* Allow arch to add records. */
+void lb_arch_add_records(struct lb_header *header);
+
/*
* Function to retrieve MAC address(es) from the VPD and store them in the
* coreboot table.
diff --git a/src/lib/coreboot_table.c b/src/lib/coreboot_table.c
index 86f22c9..cc336c2 100644
--- a/src/lib/coreboot_table.c
+++ b/src/lib/coreboot_table.c
@@ -389,6 +389,8 @@ static void lb_record_version_timestamp(struct lb_header *header)
void __attribute__((weak)) lb_board(struct lb_header *header) { /* NOOP */ }
+void __attribute__((weak)) lb_arch_add_records(struct lb_header *header) { }
+
static struct lb_forward *lb_forward(struct lb_header *header, struct lb_header *next_header)
{
struct lb_record *rec;
@@ -540,6 +542,9 @@ unsigned long write_coreboot_table(
lb_boot_media_params(head);
+ /* Add architecture records. */
+ lb_arch_add_records(head);
+
/* Add all cbmem entries into the coreboot tables. */
cbmem_add_records_to_cbtable(head);
the following patch was just integrated into master:
commit a02bb653fdfdd0e1c0426d3573a979594a93eb58
Author: Aaron Durbin <adurbin(a)chromium.org>
Date: Fri Feb 5 14:58:06 2016 -0600
cpu/intel/microcode: allow microcode to be loaded in romstage
The previous usage of the intel microcode support supported using
the library under ROMCC and ramstage. Allow for microcode support
to be used in normal C-based romstage as well by:
1. Only using walkcbfs when ROMCC is defined.
2. Only using spinlocks if !__PRE_RAM__
The header file now unconditionally exposes the declarations
of the supporting functions.
Change-Id: I903578bcb4422b4c050903c53b60372b64b79af1
Signed-off-by: Aaron Durbin <adurbin(a)chromium.org>
Reviewed-on: https://review.coreboot.org/13611
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth(a)google.com>
See https://review.coreboot.org/13611 for details.
-gerrit
the following patch was just integrated into master:
commit 5a70d6bdf2e70b29740a36061321af59b3005f85
Author: Martin Roth <martinroth(a)google.com>
Date: Sun Jan 31 15:17:34 2016 -0700
kconfig_lint: update kconfig lint shell scripts
- Add lint-stable script with just error checking
- Enable warnings in addition to errors in non-stable test.
- Use git grep if the code is in a git repo now that exclusions are
working.
- Check for perl, and ask the user to install it if it isn't
available.
Change-Id: Ie60d21f4ef8a61d879f116eb2056eb805b0a55f2
Signed-off-by: Martin Roth <martinroth(a)google.com>
Reviewed-on: https://review.coreboot.org/13542
Reviewed-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org>
Tested-by: build bot (Jenkins)
See https://review.coreboot.org/13542 for details.
-gerrit
Martin Roth (martinroth(a)google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/13542
-gerrit
commit c2631a12e635359a4e80a5a3144e175e93085b8b
Author: Martin Roth <martinroth(a)google.com>
Date: Sun Jan 31 15:17:34 2016 -0700
kconfig_lint: update kconfig lint shell scripts
- Add lint-stable script with just error checking
- Enable warnings in addition to errors in non-stable test.
- Use git grep if the code is in a git repo now that exclusions are
working.
- Check for perl, and ask the user to install it if it isn't
available.
Change-Id: Ie60d21f4ef8a61d879f116eb2056eb805b0a55f2
Signed-off-by: Martin Roth <martinroth(a)google.com>
---
util/lint/lint-008-kconfig | 16 ++++++++++++++--
util/lint/lint-stable-008-kconfig | 30 ++++++++++++++++++++++++++++++
2 files changed, 44 insertions(+), 2 deletions(-)
diff --git a/util/lint/lint-008-kconfig b/util/lint/lint-008-kconfig
index 16ae251..d3da17e 100755
--- a/util/lint/lint-008-kconfig
+++ b/util/lint/lint-008-kconfig
@@ -12,7 +12,19 @@
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
-# DESCR: check Kconfig files
+# DESCR: check Kconfig files for warnings and errors
LC_ALL=C export LC_ALL
-env perl util/lint/kconfig_lint --no_git_grep --warnings_off
+
+# Verify that the test can run, tell users the issue
+if [ -z "$(command -v perl)" ]; then
+ echo "The kconfig lint tool uses perl. Please install it to run this test."
+fi
+
+# If coreboot is in a git repo, use git grep to check as it will ignore any
+# files in the tree that aren't checked into git
+if [ -n "$(command -v git)" ] && [ -e ".git" ]; then
+ env perl util/lint/kconfig_lint
+else
+ env perl util/lint/kconfig_lint --no_git_grep
+fi
diff --git a/util/lint/lint-stable-008-kconfig b/util/lint/lint-stable-008-kconfig
new file mode 100755
index 0000000..986fdc9
--- /dev/null
+++ b/util/lint/lint-stable-008-kconfig
@@ -0,0 +1,30 @@
+#!/bin/sh
+# This file is part of the coreboot project.
+#
+# Copyright 2016 Google Inc.
+#
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; version 2 of the License.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# DESCR: check Kconfig files for errors
+
+LC_ALL=C export LC_ALL
+
+# Verify that the test can run, tell users the issue
+if [ -z "$(command -v perl)" ]; then
+ echo "The kconfig lint tool uses perl. Please install it to run this test."
+fi
+
+# If coreboot is in a git repo, use git grep to check as it will ignore any
+# files in the tree that aren't checked into git
+if [ -n "$(command -v git)" ] && [ -e ".git" ]; then
+ env perl util/lint/kconfig_lint --warnings_off
+else
+ env perl util/lint/kconfig_lint --no_git_grep --warnings_off
+fi
the following patch was just integrated into master:
commit 9e620eaff4c50ead711d726a764966d04d00c177
Author: Martin Roth <martinroth(a)chromium.org>
Date: Tue Feb 9 11:21:17 2016 -0700
chromeos/Kconfig: Remove dependency on GBB_HAVE_BMPFV
This symbol is not defined.
Change-Id: I2b0a3fca82d85962fc882f237b70702cab0400db
Signed-off-by: Martin Roth <martinroth(a)chromium.org>
Reviewed-on: https://review.coreboot.org/13647
Reviewed-by: Patrick Georgi <pgeorgi(a)google.com>
Tested-by: build bot (Jenkins)
See https://review.coreboot.org/13647 for details.
-gerrit