coreboot-gerrit December 2016

coreboot-gerrit@coreboot.org

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Patch merged into coreboot/master: PCI ops: Remove conflicting duplicate declarations
by gerrit＠coreboot.org 06 Dec '16

06 Dec '16

the following patch was just integrated into master: commit 8db31a8f4eb247df86c658acb4cb7c5f97456e68 Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Date: Mon Dec 5 06:33:32 2016 +0200 PCI ops: Remove conflicting duplicate declarations The code originates from times before __SIMPLE_DEVICE__ was introduced. To keep behaviour unchanged, use explicit PCI IO operations here. Change-Id: I44851633115f9aee4c308fd3711571a4b14c5f2f Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Reviewed-on: https://review.coreboot.org/17720 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin(a)chromium.org> See https://review.coreboot.org/17720 for details. -gerrit

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Patch merged into coreboot/master: intel PCI ops: Remove explicit PCI MMCONF access
by gerrit＠coreboot.org 06 Dec '16

06 Dec '16

the following patch was just integrated into master: commit b4a45dcf9d442b311dec7396a55be917713a0d15 Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Date: Fri Jul 26 08:53:59 2013 +0300 intel PCI ops: Remove explicit PCI MMCONF access MMCONF was explicitly used here to avoid races of 0xcf8/0xcfc access being non-atomic and/or need to access 4kiB of PCI config space. All these platforms now have MMCONF_SUPPORT_DEFAULT. Change-Id: If62537475eb67b7ecf85f2292a2a954a41bc18d1 Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Reviewed-on: https://review.coreboot.org/17545 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin(a)chromium.org> See https://review.coreboot.org/17545 for details. -gerrit

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Patch merged into coreboot/master: intel PCI ops: Remove explicit PCI MMCONF access
by gerrit＠coreboot.org 06 Dec '16

06 Dec '16

the following patch was just integrated into master: commit d45114ff59284cebc0c03821cc4d7782ca3bacf8 Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Date: Fri Jul 26 08:53:59 2013 +0300 intel PCI ops: Remove explicit PCI MMCONF access MMCONF was explicitly used here to avoid races of 0xcf8/0xcfc access being non-atomic and/or need to access 4kiB of PCI config space. All these platforms now have MMCONF_SUPPORT_DEFAULT. Change-Id: I943e354af0403e61263f1c780f02c7b463b3fe11 Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Reviewed-on: https://review.coreboot.org/17529 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin(a)chromium.org> See https://review.coreboot.org/17529 for details. -gerrit

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Patch merged into coreboot/master: mb/lowrisc/nexys4ddr: Read RAM information from the config string
by gerrit＠coreboot.org 06 Dec '16

06 Dec '16

the following patch was just integrated into master: commit b1de92ee04c7a410cd50bd5d6e155d7343003fef Author: Jonathan Neuschäfer <j.neuschaefer(a)gmx.net> Date: Sun Dec 4 08:49:38 2016 +0100 mb/lowrisc/nexys4ddr: Read RAM information from the config string Change-Id: I9147eca0b536b6267d58f6e8baa37b6950b35160 Signed-off-by: Jonathan Neuschäfer <j.neuschaefer(a)gmx.net> Reviewed-on: https://review.coreboot.org/17710 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich(a)gmail.com> See https://review.coreboot.org/17710 for details. -gerrit

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Patch set updated for coreboot: mb/lowrisc/nexys4ddr: Read RAM information from the config string
by Ronald G. Minnich 06 Dec '16

06 Dec '16

Ronald G. Minnich (rminnich(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/17710 -gerrit commit 727f2f8e7215a9c74348e4961f1f59fc7494a526 Author: Jonathan Neuschäfer <j.neuschaefer(a)gmx.net> Date: Sun Dec 4 08:49:38 2016 +0100 mb/lowrisc/nexys4ddr: Read RAM information from the config string Change-Id: I9147eca0b536b6267d58f6e8baa37b6950b35160 Signed-off-by: Jonathan Neuschäfer <j.neuschaefer(a)gmx.net> --- src/mainboard/lowrisc/nexys4ddr/mainboard.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/src/mainboard/lowrisc/nexys4ddr/mainboard.c b/src/mainboard/lowrisc/nexys4ddr/mainboard.c index 8b6bcb2..aae3b9b 100644 --- a/src/mainboard/lowrisc/nexys4ddr/mainboard.c +++ b/src/mainboard/lowrisc/nexys4ddr/mainboard.c @@ -14,17 +14,17 @@ */ #include <cbmem.h> +#include <commonlib/configstring.h> #include <device/device.h> #include <symbols.h> static void mainboard_enable(device_t dev) { - /* - * TODO: Get this size from the hardware-supplied configuration string. - */ - const size_t ram_size = 1*GiB; + uintptr_t ram_base; + size_t ram_size; - ram_resource(dev, 0, (uintptr_t)_dram / KiB, ram_size / KiB); + query_mem(configstring(), &ram_base, &ram_size); + ram_resource(dev, 0, ram_base / KiB, ram_size / KiB); cbmem_initialize_empty(); }

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Patch merged into coreboot/master: mb/lowrisc/nexys4ddr: Initialize CBMEM in romstage
by gerrit＠coreboot.org 06 Dec '16

06 Dec '16

the following patch was just integrated into master: commit c978886e7bdc59de6646a164dabf01b1144b2afa Author: Jonathan Neuschäfer <j.neuschaefer(a)gmx.net> Date: Sat Dec 3 17:00:52 2016 +0100 mb/lowrisc/nexys4ddr: Initialize CBMEM in romstage Change-Id: Ic1706ae8ab3cbef8f445d70cb78fa9d3301d87be Signed-off-by: Jonathan Neuschäfer <j.neuschaefer(a)gmx.net> Reviewed-on: https://review.coreboot.org/17707 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich(a)gmail.com> See https://review.coreboot.org/17707 for details. -gerrit

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Patch merged into coreboot/master: soc/lowrisc: Place CBMEM at top of autodetected RAM
by gerrit＠coreboot.org 06 Dec '16

06 Dec '16

the following patch was just integrated into master: commit 1e910c901b436adc6a0590e89b4b71262d23fcc9 Author: Jonathan Neuschäfer <j.neuschaefer(a)gmx.net> Date: Thu Nov 24 08:26:03 2016 +0100 soc/lowrisc: Place CBMEM at top of autodetected RAM Change-Id: I9f169db330d1792128db7a6308ed3afbe5803c03 Signed-off-by: Jonathan Neuschäfer <j.neuschaefer(a)gmx.net> Reviewed-on: https://review.coreboot.org/17708 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich(a)gmail.com> See https://review.coreboot.org/17708 for details. -gerrit

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Patch merged into coreboot/master: soc/marvell/mvmap2315: Fix integer arithmetic
by gerrit＠coreboot.org 06 Dec '16

06 Dec '16

the following patch was just integrated into master: commit 30140d2be95acb683d74d6a3ac13ce1cf791971b Author: Jonathan Neuschäfer <j.neuschaefer(a)gmx.net> Date: Sat Nov 12 13:50:17 2016 +0100 soc/marvell/mvmap2315: Fix integer arithmetic Replace logical with bitwise AND operator. Change-Id: I712fab61fbbc833fc2b2575948a875e2f07fd5de Reported-by: Coverity (CID 1362808) Signed-off-by: Jonathan Neuschäfer <j.neuschaefer(a)gmx.net> Reviewed-on: https://review.coreboot.org/17401 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter(a)users.sourceforge.net> Reviewed-by: Nico Huber <nico.h(a)gmx.de> Reviewed-by: Ronald G. Minnich <rminnich(a)gmail.com> See https://review.coreboot.org/17401 for details. -gerrit

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Patch merged into coreboot/master: riscv: Stub out sbi_(un)mask_interrupt
by gerrit＠coreboot.org 06 Dec '16

06 Dec '16

the following patch was just integrated into master: commit 522dcd1249d577c1828cb49f6cd300bc11c6f914 Author: Jonathan Neuschäfer <j.neuschaefer(a)gmx.net> Date: Thu Nov 24 08:10:13 2016 +0100 riscv: Stub out sbi_(un)mask_interrupt Linux needs these SBI calls, but so far it seems to work when they don't do anything. Change-Id: I2cd0bb3ab91e89805fed84ec87e4a48ce70c3a46 Signed-off-by: Jonathan Neuschäfer <j.neuschaefer(a)gmx.net> Reviewed-on: https://review.coreboot.org/17593 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich(a)gmail.com> See https://review.coreboot.org/17593 for details. -gerrit

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Patch merged into coreboot/master: soc/ucb/riscv: Place CBMEM at top of autodetected RAM
by gerrit＠coreboot.org 06 Dec '16

06 Dec '16

the following patch was just integrated into master: commit fc5e6c6696b7c7f6af0311dbb0870602b12bed73 Author: Jonathan Neuschäfer <j.neuschaefer(a)gmx.net> Date: Thu Nov 24 08:25:29 2016 +0100 soc/ucb/riscv: Place CBMEM at top of autodetected RAM Change-Id: Ida016aec11ccdb8da8d2ae1d30ddca16b069be11 Signed-off-by: Jonathan Neuschäfer <j.neuschaefer(a)gmx.net> Reviewed-on: https://review.coreboot.org/17595 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich(a)gmail.com> See https://review.coreboot.org/17595 for details. -gerrit

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coreboot-gerrit December 2016