Pratikkumar V Prajapati (pratikkumar.v.prajapati(a)intel.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/17664
-gerrit
commit 71687cc7eef58f7eb613751f7aece8c7970d0080
Author: Pratik Prajapati <pratikkumar.v.prajapati(a)intel.com>
Date: Wed Nov 30 17:29:10 2016 -0800
cbfs: New API to locate a file from specific region
method to find file by name from any specific
region of fmap.
Change-Id: Iabe785a6434937be6a57c7009882a0d68f6c8ad4
Signed-off-by: Pratik Prajapati <pratikkumar.v.prajapati(a)intel.com>
---
src/include/cbfs.h | 3 +++
src/lib/cbfs.c | 15 ++++++++++++++-
2 files changed, 17 insertions(+), 1 deletion(-)
diff --git a/src/include/cbfs.h b/src/include/cbfs.h
index 8538b3d..1350671 100644
--- a/src/include/cbfs.h
+++ b/src/include/cbfs.h
@@ -34,6 +34,9 @@ int cbfs_boot_locate(struct cbfsf *fh, const char *name, uint32_t *type);
* leaking mappings are a no-op. Returns NULL on error, else returns
* the mapping and sets the size of the file. */
void *cbfs_boot_map_with_leak(const char *name, uint32_t type, size_t *size);
+/* Locate file in a specific region of fmap. Return 0 on success. < 0 on error*/
+int cbfs_locate_file_in_region(struct cbfsf *fh, const char *region_name,
+ const char *name, uint32_t *type);
/* Load a struct file from CBFS into a buffer. Returns amount of loaded
* bytes on success or 0 on error. File will get decompressed as necessary.
* Same decompression requirements as cbfs_load_and_decompress(). */
diff --git a/src/lib/cbfs.c b/src/lib/cbfs.c
index 19737a4..8037c91 100644
--- a/src/lib/cbfs.c
+++ b/src/lib/cbfs.c
@@ -24,7 +24,7 @@
#include <lib.h>
#include <symbols.h>
#include <timestamp.h>
-
+#include <fmap.h>
#include "fmap_config.h"
#define ERROR(x...) printk(BIOS_ERR, "CBFS: " x)
@@ -72,6 +72,19 @@ void *cbfs_boot_map_with_leak(const char *name, uint32_t type, size_t *size)
return rdev_mmap(&fh.data, 0, fsize);
}
+int cbfs_locate_file_in_region(struct cbfsf *fh, const char *region_name,
+ const char *name, uint32_t *type)
+{
+ struct region_device rdev;
+
+ if (fmap_locate_area_as_rdev(region_name, &rdev) == 0) {
+ return cbfs_locate(fh, &rdev, name, type);
+ }
+
+ LOG("%s region not found while looking for %s\n", region_name, name);
+ return -1;
+}
+
size_t cbfs_load_and_decompress(const struct region_device *rdev, size_t offset,
size_t in_size, void *buffer, size_t buffer_size, uint32_t compression)
{
the following patch was just integrated into master:
commit c99526cce9c2f0665cc211f5395c44cf550ed1d5
Author: Shasha Zhao <Sarah_Zhao(a)asus.com>
Date: Thu Nov 17 12:42:51 2016 +0800
Bob: Update the memory ramid of bob
Update the memory ramid.
Move to one CA training pattern.
BUG=chrome-os-partner:59454
BRANCH=firmware-gru-8785.B
TEST=Build firmware passed
Change-Id: Ic05cbc1700a13e372f63d5202459add0e984f9d8
Signed-off-by: Patrick Georgi <pgeorgi(a)chromium.org>
Original-Commit-Id: 1030a78af3d489d13508f17a79df1e65bd5afa3b
Original-Change-Id: Ibe8acb5b698cec1adcdddbb13d35a5e20a5b8c0d
Original-Reviewed-on: https://chromium-review.googlesource.com/414664
Original-Commit-Ready: Shasha Zhao <Sarah_Zhao(a)asus.com>
Original-Tested-by: Shasha Zhao <Sarah_Zhao(a)asus.com>
Original-Reviewed-by: Julius Werner <jwerner(a)chromium.org>
Original-Change-Id: I0ae46e496cd18492a2b6c7167081798c2f2479b1
Original-Signed-off-by: Shasha Zhao <Sarah_Zhao(a)asus.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/411645
Original-Reviewed-by: Julius Werner <jwerner(a)chromium.org>
Reviewed-on: https://review.coreboot.org/17679
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth(a)google.com>
See https://review.coreboot.org/17679 for details.
-gerrit
the following patch was just integrated into master:
commit 6bd75ec94204719f30f4aed22cc7460d6250e9aa
Author: Shasha Zhao <Sarah_Zhao(a)asus.com>
Date: Mon Nov 14 20:10:55 2016 +0800
Bob: add bob in coreboot
Add bob in coreboot and update as necessary.
1. Add bob HWID
2. Add supported memory source
BUG=chrome-os-partner:59454
BRANCH=firmware-gru-8785.B
TEST=Build firmware passed
Signed-off-by: Patrick Georgi <pgeorgi(a)chromium.org>
Change-Id: Iad03a293bdbbb89450f0fea0822e34a4be7064bf
Original-Commit-Id: bff788c71a43403bff2c23b38e69cc27fb869559
Original-Change-Id: I0dcf47eb911337b176f73759a2c70a9dbf4dc68b
Original-Signed-off-by: Shasha Zhao <Sarah_Zhao(a)asus.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/411083
Original-Reviewed-by: Philip Chen <philipchen(a)chromium.org>
Original-(cherry picked from commit c5925dfcf59ac755a26182744b2bde59e41a37cf)
Original-Reviewed-on: https://chromium-review.googlesource.com/413744
Original-Reviewed-by: Julius Werner <jwerner(a)chromium.org>
Reviewed-on: https://review.coreboot.org/17678
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth(a)google.com>
See https://review.coreboot.org/17678 for details.
-gerrit
the following patch was just integrated into master:
commit f00af5833abd0792429ffb28c551eedb7b59aafc
Author: Lin Huang <hl(a)rock-chips.com>
Date: Tue Nov 15 11:40:58 2016 +0800
rockchip/rk3399: sdram: use register to calculate sdram sizes
We may support different sdram sizes on one board in future, so
we need to calculate sdram sizes from sdram drvier.
BRANCH=None
BUG=None
TEST=boot kevin
Change-Id: I43e8f164ecdb768c051464b4dbc7d890df8055d0
Signed-off-by: Patrick Georgi <pgeorgi(a)chromium.org>
Original-Commit-Id: 3c4d8b3cb647b2f9cebc416c298817c16d49330e
Original-Change-Id: I95d5ef34de9d79ebca3600dc7a4b9e14449606ff
Original-Signed-off-by: Lin Huang <hl(a)rock-chips.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/411600
Original-Reviewed-by: Julius Werner <jwerner(a)chromium.org>
Reviewed-on: https://review.coreboot.org/17629
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth(a)google.com>
See https://review.coreboot.org/17629 for details.
-gerrit