coreboot-gerrit December 2016

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Patch set updated for coreboot: cpu/intel/common: Add/Use common function to set virtualization
by Matt DeVillier 16 Dec '16

16 Dec '16

Matt DeVillier (matt.devillier(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/17874 -gerrit commit 189b3088ef1ba0e34135b3c593aaebdd9428c47e Author: Matt DeVillier <matt.devillier(a)gmail.com> Date: Wed Dec 14 16:12:43 2016 -0600 cpu/intel/common: Add/Use common function to set virtualization Migrate duplicated enable_vmx() method from multiple CPUs to common folder. Add common virtualization option for CPUs which support it. Change-Id: Ib110bed6c9f5508e3f867dcdc6f341fc50e501d1 Signed-off-by: Matt DeVillier <matt.devillier(a)gmail.com> --- src/cpu/intel/Kconfig | 1 + src/cpu/intel/common/Kconfig | 23 ++++++++ src/cpu/intel/common/Makefile.inc | 1 + src/cpu/intel/common/common.h | 20 +++++++ src/cpu/intel/common/common_init.c | 71 ++++++++++++++++++++++++ src/cpu/intel/fsp_model_206ax/Kconfig | 5 +- src/cpu/intel/fsp_model_206ax/Makefile.inc | 1 + src/cpu/intel/fsp_model_206ax/model_206ax_init.c | 42 +------------- src/cpu/intel/fsp_model_406dx/Kconfig | 5 +- src/cpu/intel/fsp_model_406dx/Makefile.inc | 1 + src/cpu/intel/fsp_model_406dx/model_406dx_init.c | 42 +------------- src/cpu/intel/haswell/Kconfig | 5 +- src/cpu/intel/haswell/Makefile.inc | 1 + src/cpu/intel/haswell/haswell_init.c | 46 +-------------- src/cpu/intel/model_1067x/Kconfig | 1 + src/cpu/intel/model_1067x/Makefile.inc | 1 + src/cpu/intel/model_1067x/model_1067x_init.c | 38 +------------ src/cpu/intel/model_106cx/Kconfig | 1 + src/cpu/intel/model_106cx/Makefile.inc | 1 + src/cpu/intel/model_106cx/model_106cx_init.c | 37 +----------- src/cpu/intel/model_2065x/Kconfig | 5 +- src/cpu/intel/model_2065x/Makefile.inc | 1 + src/cpu/intel/model_2065x/model_2065x_init.c | 55 +----------------- src/cpu/intel/model_206ax/Kconfig | 5 +- src/cpu/intel/model_206ax/Makefile.inc | 1 + src/cpu/intel/model_206ax/model_206ax_init.c | 55 +----------------- src/cpu/intel/model_6ex/Kconfig | 1 + src/cpu/intel/model_6ex/Makefile.inc | 1 + src/cpu/intel/model_6ex/model_6ex_init.c | 38 +------------ src/cpu/intel/model_6fx/Kconfig | 1 + src/cpu/intel/model_6fx/Makefile.inc | 1 + src/cpu/intel/model_6fx/model_6fx_init.c | 37 +----------- src/soc/intel/broadwell/Kconfig | 2 +- src/soc/intel/broadwell/Makefile.inc | 1 + src/soc/intel/broadwell/cpu.c | 4 ++ 35 files changed, 167 insertions(+), 384 deletions(-) diff --git a/src/cpu/intel/Kconfig b/src/cpu/intel/Kconfig index 5df8002..138da8c 100644 --- a/src/cpu/intel/Kconfig +++ b/src/cpu/intel/Kconfig @@ -45,3 +45,4 @@ source src/cpu/intel/socket_rPGA989/Kconfig # Architecture specific features source src/cpu/intel/fit/Kconfig source src/cpu/intel/turbo/Kconfig +source src/cpu/intel/common/Kconfig diff --git a/src/cpu/intel/common/Kconfig b/src/cpu/intel/common/Kconfig new file mode 100644 index 0000000..739333e --- /dev/null +++ b/src/cpu/intel/common/Kconfig @@ -0,0 +1,23 @@ +config CPU_INTEL_COMMON + bool + +if CPU_INTEL_COMMON + +config ENABLE_VMX + bool "Enable VMX for virtualization" + default y + +config SET_VMX_LOCK_BIT + bool "Set lock bit after configuring VMX" + depends on ENABLE_VMX + default y + help + Although the Intel manual says you must set the lock bit in addition + to the VMX bit in order for VMX to work, this isn't strictly true, so + we have the option to leave it unlocked and allow the OS (e.g. Linux) + to manage things itself. This is beneficial for testing purposes as + there is no need to reflash the firmware just to toggle the lock bit. + However, leaving the lock bit unset will break Windows' detection of + VMX support and built-in virtualization features like Hyper-V. + +endif diff --git a/src/cpu/intel/common/Makefile.inc b/src/cpu/intel/common/Makefile.inc new file mode 100644 index 0000000..1e94ec9 --- /dev/null +++ b/src/cpu/intel/common/Makefile.inc @@ -0,0 +1 @@ +ramstage-y += common_init.c diff --git a/src/cpu/intel/common/common.h b/src/cpu/intel/common/common.h new file mode 100644 index 0000000..0d0b954 --- /dev/null +++ b/src/cpu/intel/common/common.h @@ -0,0 +1,20 @@ +/* + * This file is part of the coreboot project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; version 2 of + * the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef _CPU_INTEL_COMMON_H +#define _CPU_INTEL_COMMON_H + +void set_vmx(void); + +#endif diff --git a/src/cpu/intel/common/common_init.c b/src/cpu/intel/common/common_init.c new file mode 100644 index 0000000..da7b826 --- /dev/null +++ b/src/cpu/intel/common/common_init.c @@ -0,0 +1,71 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2007-2009 coresystems GmbH + * Copyright (C) 2011 The ChromiumOS Authors. All rights reserved. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; version 2 of + * the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <console/console.h> +#include <cpu/x86/msr.h> +#include "common.h" + +#define IA32_FEATURE_CONTROL 0x3a +#define CPUID_VMX (1 << 5) +#define CPUID_SMX (1 << 6) + +void set_vmx(void) +{ + struct cpuid_result regs; + msr_t msr; + int enable = IS_ENABLED(CONFIG_ENABLE_VMX); + int lock = IS_ENABLED(CONFIG_SET_VMX_LOCK_BIT); + + regs = cpuid(1); + /* Check that the VMX is supported before reading or writing the MSR. */ + if (!((regs.ecx & CPUID_VMX) || (regs.ecx & CPUID_SMX))) { + printk(BIOS_DEBUG, "CPU doesn't support VMX; exiting\n"); + return; + } + + msr = rdmsr(IA32_FEATURE_CONTROL); + + if (msr.lo & (1 << 0)) { + printk(BIOS_ERR, "VMX is locked, so %s will do nothing\n", __func__); + /* VMX locked. If we set it again we get an illegal + * instruction + */ + return; + } + + /* The IA32_FEATURE_CONTROL MSR may initialize with random values. + * It must be cleared regardless of VMX config setting. + */ + msr.hi = msr.lo = 0; + + if (enable) { + msr.lo |= (1 << 2); + if (regs.ecx & CPUID_SMX) + msr.lo |= (1 << 1); + } + + wrmsr(IA32_FEATURE_CONTROL, msr); + + if (lock) { + /* Set lock bit */ + msr.lo |= (1 << 0); + wrmsr(IA32_FEATURE_CONTROL, msr); + } + + printk(BIOS_DEBUG, "VMX status: %s, %s\n", enable ? "enabled" : "disabled", + lock ? "locked" : "unlocked"); +} diff --git a/src/cpu/intel/fsp_model_206ax/Kconfig b/src/cpu/intel/fsp_model_206ax/Kconfig index 030c863..8782448 100644 --- a/src/cpu/intel/fsp_model_206ax/Kconfig +++ b/src/cpu/intel/fsp_model_206ax/Kconfig @@ -37,6 +37,7 @@ config CPU_SPECIFIC_OPTIONS select PARALLEL_CPU_INIT select TSC_SYNC_MFENCE select LAPIC_MONOTONIC_TIMER + select CPU_INTEL_COMMON config BOOTBLOCK_CPU_INIT string @@ -46,8 +47,4 @@ config SMM_TSEG_SIZE hex default 0x800000 -config ENABLE_VMX - bool "Enable VMX for virtualization" - default n - endif diff --git a/src/cpu/intel/fsp_model_206ax/Makefile.inc b/src/cpu/intel/fsp_model_206ax/Makefile.inc index d2d61ef..65498f8 100644 --- a/src/cpu/intel/fsp_model_206ax/Makefile.inc +++ b/src/cpu/intel/fsp_model_206ax/Makefile.inc @@ -1,6 +1,7 @@ ramstage-y += model_206ax_init.c subdirs-y += ../../x86/name subdirs-y += ../smm/gen1 +subdirs-y += ../common ramstage-y += acpi.c diff --git a/src/cpu/intel/fsp_model_206ax/model_206ax_init.c b/src/cpu/intel/fsp_model_206ax/model_206ax_init.c index 6789bae..1b3004c 100644 --- a/src/cpu/intel/fsp_model_206ax/model_206ax_init.c +++ b/src/cpu/intel/fsp_model_206ax/model_206ax_init.c @@ -32,43 +32,7 @@ #include "model_206ax.h" #include "chip.h" #include <cpu/intel/smm/gen1/smi.h> - -static void enable_vmx(void) -{ - struct cpuid_result regs; - msr_t msr; - int enable = IS_ENABLED(CONFIG_ENABLE_VMX); - - regs = cpuid(1); - /* Check that the VMX is supported before reading or writing the MSR. */ - if (!((regs.ecx & CPUID_VMX) || (regs.ecx & CPUID_SMX))) - return; - - msr = rdmsr(IA32_FEATURE_CONTROL); - - if (msr.lo & (1 << 0)) { - printk(BIOS_ERR, "VMX is locked, so %s will do nothing\n", __func__); - /* VMX locked. If we set it again we get an illegal - * instruction - */ - return; - } - - /* The IA32_FEATURE_CONTROL MSR may initialize with random values. - * It must be cleared regardless of VMX config setting. - */ - msr.hi = msr.lo = 0; - - printk(BIOS_DEBUG, "%s VMX\n", enable ? "Enabling" : "Disabling"); - - if (enable) { - msr.lo |= (1 << 2); - if (regs.ecx & CPUID_SMX) - msr.lo |= (1 << 1); - } - - wrmsr(IA32_FEATURE_CONTROL, msr); -} +#include <cpu/intel/common/common.h> /* Convert time in seconds to POWER_LIMIT_1_TIME MSR value */ static const u8 power_limit_time_sec_to_msr[] = { @@ -390,8 +354,8 @@ static void model_206ax_init(struct device *cpu) enable_lapic_tpr(); setup_lapic(); - /* Enable virtualization if Kconfig option is set */ - enable_vmx(); + /* Set virtualization based on Kconfig option */ + set_vmx(); /* Configure Enhanced SpeedStep and Thermal Sensors */ configure_misc(); diff --git a/src/cpu/intel/fsp_model_406dx/Kconfig b/src/cpu/intel/fsp_model_406dx/Kconfig index edf18f5..4c79b23 100644 --- a/src/cpu/intel/fsp_model_406dx/Kconfig +++ b/src/cpu/intel/fsp_model_406dx/Kconfig @@ -32,6 +32,7 @@ config CPU_SPECIFIC_OPTIONS select PARALLEL_CPU_INIT select TSC_SYNC_MFENCE select LAPIC_MONOTONIC_TIMER + select CPU_INTEL_COMMON # Microcode header files are delivered in FSP package select USES_MICROCODE_HEADER_FILES if HAVE_FSP_BIN @@ -52,10 +53,6 @@ config BOOTBLOCK_CPU_INIT string default "cpu/intel/fsp_model_406dx/bootblock.c" -config ENABLE_VMX - bool "Enable VMX for virtualization" - default n - #set up microcode for rangeley POSTGOLD4 release config CPU_MICROCODE_HEADER_FILES string diff --git a/src/cpu/intel/fsp_model_406dx/Makefile.inc b/src/cpu/intel/fsp_model_406dx/Makefile.inc index 3e29348..d82ddd6 100644 --- a/src/cpu/intel/fsp_model_406dx/Makefile.inc +++ b/src/cpu/intel/fsp_model_406dx/Makefile.inc @@ -15,6 +15,7 @@ ramstage-y += model_406dx_init.c subdirs-y += ../../x86/name +subdirs-y += ../common ramstage-y += acpi.c diff --git a/src/cpu/intel/fsp_model_406dx/model_406dx_init.c b/src/cpu/intel/fsp_model_406dx/model_406dx_init.c index ef48c03..11f5286 100644 --- a/src/cpu/intel/fsp_model_406dx/model_406dx_init.c +++ b/src/cpu/intel/fsp_model_406dx/model_406dx_init.c @@ -25,46 +25,10 @@ #include <cpu/intel/microcode.h> #include <cpu/x86/cache.h> #include <cpu/x86/name.h> +#include <cpu/intel/common/common.h> #include "model_406dx.h" #include "chip.h" -static void enable_vmx(void) -{ - struct cpuid_result regs; - msr_t msr; - int enable = IS_ENABLED(CONFIG_ENABLE_VMX); - - regs = cpuid(1); - /* Check that the VMX is supported before reading or writing the MSR. */ - if (!((regs.ecx & CPUID_VMX) || (regs.ecx & CPUID_SMX))) - return; - - msr = rdmsr(IA32_FEATURE_CONTROL); - - if (msr.lo & (1 << 0)) { - printk(BIOS_ERR, "VMX is locked, so %s will do nothing\n", __func__); - /* VMX locked. If we set it again we get an illegal - * instruction - */ - return; - } - - /* The IA32_FEATURE_CONTROL MSR may initialize with random values. - * It must be cleared regardless of VMX config setting. - */ - msr.hi = msr.lo = 0; - - printk(BIOS_DEBUG, "%s VMX\n", enable ? "Enabling" : "Disabling"); - - if (enable) { - msr.lo |= (1 << 2); - if (regs.ecx & CPUID_SMX) - msr.lo |= (1 << 1); - } - - wrmsr(IA32_FEATURE_CONTROL, msr); -} - int cpu_config_tdp_levels(void) { msr_t platform_info; @@ -185,8 +149,8 @@ static void model_406dx_init(struct device *cpu) /* Enable the local CPU APICs */ setup_lapic(); - /* Enable virtualization */ - enable_vmx(); + /* Set virtualization based on Kconfig option */ + set_vmx(); /* Configure Enhanced SpeedStep and Thermal Sensors */ configure_misc(); diff --git a/src/cpu/intel/haswell/Kconfig b/src/cpu/intel/haswell/Kconfig index ec75391..d6df9c0 100644 --- a/src/cpu/intel/haswell/Kconfig +++ b/src/cpu/intel/haswell/Kconfig @@ -26,6 +26,7 @@ config CPU_SPECIFIC_OPTIONS select CPU_INTEL_FIRMWARE_INTERFACE_TABLE select PARALLEL_CPU_INIT select PARALLEL_MP + select CPU_INTEL_COMMON config BOOTBLOCK_CPU_INIT string @@ -35,10 +36,6 @@ config SMM_TSEG_SIZE hex default 0x800000 -config ENABLE_VMX - bool "Enable VMX for virtualization" - default n - config IED_REGION_SIZE hex default 0x400000 diff --git a/src/cpu/intel/haswell/Makefile.inc b/src/cpu/intel/haswell/Makefile.inc index d54a25c..bb0f376 100644 --- a/src/cpu/intel/haswell/Makefile.inc +++ b/src/cpu/intel/haswell/Makefile.inc @@ -23,6 +23,7 @@ subdirs-y += ../../x86/cache subdirs-y += ../../x86/smm subdirs-y += ../microcode subdirs-y += ../turbo +subdirs-y += ../common cpu_microcode_bins += 3rdparty/blobs/cpu/intel/model_306cx/microcode.bin cpu_microcode_bins += 3rdparty/blobs/cpu/intel/model_4065x/microcode.bin diff --git a/src/cpu/intel/haswell/haswell_init.c b/src/cpu/intel/haswell/haswell_init.c index 2fac879..0b243ad 100644 --- a/src/cpu/intel/haswell/haswell_init.c +++ b/src/cpu/intel/haswell/haswell_init.c @@ -34,6 +34,7 @@ #include <pc80/mc146818rtc.h> #include <northbridge/intel/haswell/haswell.h> #include <southbridge/intel/lynxpoint/pch.h> +#include <cpu/intel/common/common.h> #include "haswell.h" #include "chip.h" @@ -145,47 +146,6 @@ static acpi_cstate_t cstate_map[NUM_C_STATES] = { }, }; -static void enable_vmx(void) -{ - struct cpuid_result regs; - msr_t msr; - int enable = IS_ENABLED(CONFIG_ENABLE_VMX); - - regs = cpuid(1); - /* Check that the VMX is supported before reading or writing the MSR. */ - if (!((regs.ecx & CPUID_VMX) || (regs.ecx & CPUID_SMX))) - return; - - msr = rdmsr(IA32_FEATURE_CONTROL); - - if (msr.lo & (1 << 0)) { - printk(BIOS_ERR, "VMX is locked, so %s will do nothing\n", __func__); - /* VMX locked. If we set it again we get an illegal - * instruction - */ - return; - } - - /* The IA32_FEATURE_CONTROL MSR may initialize with random values. - * It must be cleared regardless of VMX config setting. - */ - msr.hi = msr.lo = 0; - - printk(BIOS_DEBUG, "%s VMX\n", enable ? "Enabling" : "Disabling"); - - if (enable) { - msr.lo |= (1 << 2); - if (regs.ecx & CPUID_SMX) - msr.lo |= (1 << 1); - } - - wrmsr(IA32_FEATURE_CONTROL, msr); - - msr.lo |= (1 << 0); /* Set lock bit */ - - wrmsr(IA32_FEATURE_CONTROL, msr); -} - /* Convert time in seconds to POWER_LIMIT_1_TIME MSR value */ static const u8 power_limit_time_sec_to_msr[] = { [0] = 0x00, @@ -724,8 +684,8 @@ static void haswell_init(struct device *cpu) enable_lapic_tpr(); setup_lapic(); - /* Enable virtualization if Kconfig option is set */ - enable_vmx(); + /* Set virtualization based on Kconfig option */ + set_vmx(); /* Configure C States */ configure_c_states(); diff --git a/src/cpu/intel/model_1067x/Kconfig b/src/cpu/intel/model_1067x/Kconfig index 12f04cc..2e154a3 100644 --- a/src/cpu/intel/model_1067x/Kconfig +++ b/src/cpu/intel/model_1067x/Kconfig @@ -9,3 +9,4 @@ config CPU_INTEL_MODEL_1067X # select UDELAY_LAPIC select TSC_SYNC_MFENCE select SUPPORT_CPU_UCODE_IN_CBFS + select CPU_INTEL_COMMON diff --git a/src/cpu/intel/model_1067x/Makefile.inc b/src/cpu/intel/model_1067x/Makefile.inc index 3e0af86..3e6cb2c 100644 --- a/src/cpu/intel/model_1067x/Makefile.inc +++ b/src/cpu/intel/model_1067x/Makefile.inc @@ -1,4 +1,5 @@ ramstage-y += model_1067x_init.c subdirs-y += ../../x86/name +subdirs-y += ../common cpu_microcode_bins += 3rdparty/blobs/cpu/intel/model_1067x/microcode.bin diff --git a/src/cpu/intel/model_1067x/model_1067x_init.c b/src/cpu/intel/model_1067x/model_1067x_init.c index e28a331..e0f74b2 100644 --- a/src/cpu/intel/model_1067x/model_1067x_init.c +++ b/src/cpu/intel/model_1067x/model_1067x_init.c @@ -27,7 +27,7 @@ #include <cpu/intel/hyperthreading.h> #include <cpu/x86/cache.h> #include <cpu/x86/name.h> - +#include <cpu/intel/common/common.h> #include "chip.h" static void init_timer(void) @@ -42,38 +42,6 @@ static void init_timer(void) lapic_write(LAPIC_TMICT, 0xffffffff); } -#define IA32_FEATURE_CONTROL 0x003a - -#define CPUID_VMX (1 << 5) -#define CPUID_SMX (1 << 6) -static void enable_vmx(void) -{ - struct cpuid_result regs; - msr_t msr; - - msr = rdmsr(IA32_FEATURE_CONTROL); - - if (msr.lo & (1 << 0)) { - /* VMX locked. If we set it again we get an illegal - * instruction - */ - return; - } - - regs = cpuid(1); - if (regs.ecx & CPUID_VMX) { - msr.lo |= (1 << 2); - if (regs.ecx & CPUID_SMX) - msr.lo |= (1 << 1); - } - - wrmsr(IA32_FEATURE_CONTROL, msr); - - msr.lo |= (1 << 0); /* Set lock bit */ - - wrmsr(IA32_FEATURE_CONTROL, msr); -} - #define MSR_BBL_CR_CTL3 0x11e static void configure_c_states(const int quad) @@ -328,8 +296,8 @@ static void model_1067x_init(struct device *cpu) /* Initialize the APIC timer */ init_timer(); - /* Enable virtualization */ - enable_vmx(); + /* Set virtualization based on Kconfig option */ + set_vmx(); /* Configure C States */ configure_c_states(quad); diff --git a/src/cpu/intel/model_106cx/Kconfig b/src/cpu/intel/model_106cx/Kconfig index a005ba2..f365cf1 100644 --- a/src/cpu/intel/model_106cx/Kconfig +++ b/src/cpu/intel/model_106cx/Kconfig @@ -12,6 +12,7 @@ config CPU_INTEL_MODEL_106CX select TSC_SYNC_MFENCE select SUPPORT_CPU_UCODE_IN_CBFS select SERIALIZED_SMM_INITIALIZATION + select CPU_INTEL_COMMON if CPU_INTEL_MODEL_106CX diff --git a/src/cpu/intel/model_106cx/Makefile.inc b/src/cpu/intel/model_106cx/Makefile.inc index 720052d..cd753db 100644 --- a/src/cpu/intel/model_106cx/Makefile.inc +++ b/src/cpu/intel/model_106cx/Makefile.inc @@ -1,4 +1,5 @@ ramstage-y += model_106cx_init.c subdirs-y += ../../x86/name +subdirs-y += ../common cpu_microcode_bins += 3rdparty/blobs/cpu/intel/model_106cx/microcode.bin diff --git a/src/cpu/intel/model_106cx/model_106cx_init.c b/src/cpu/intel/model_106cx/model_106cx_init.c index 7f4a9ab..3b9cbdb 100644 --- a/src/cpu/intel/model_106cx/model_106cx_init.c +++ b/src/cpu/intel/model_106cx/model_106cx_init.c @@ -25,38 +25,7 @@ #include <cpu/intel/hyperthreading.h> #include <cpu/x86/cache.h> #include <cpu/x86/name.h> - -#define IA32_FEATURE_CONTROL 0x003a - -#define CPUID_VMX (1 << 5) -#define CPUID_SMX (1 << 6) -static void enable_vmx(void) -{ - struct cpuid_result regs; - msr_t msr; - - msr = rdmsr(IA32_FEATURE_CONTROL); - - if (msr.lo & (1 << 0)) { - /* VMX locked. If we set it again we get an illegal - * instruction - */ - return; - } - - regs = cpuid(1); - if (regs.ecx & CPUID_VMX) { - msr.lo |= (1 << 2); - if (regs.ecx & CPUID_SMX) - msr.lo |= (1 << 1); - } - - wrmsr(IA32_FEATURE_CONTROL, msr); - - msr.lo |= (1 << 0); /* Set lock bit */ - - wrmsr(IA32_FEATURE_CONTROL, msr); -} +#include <cpu/intel/common/common.h> #define HIGHEST_CLEVEL 3 static void configure_c_states(void) @@ -127,8 +96,8 @@ static void model_106cx_init(struct device *cpu) /* Enable the local CPU APICs */ setup_lapic(); - /* Enable virtualization */ - enable_vmx(); + /* Set virtualization based on Kconfig option */ + set_vmx(); /* Configure C States */ configure_c_states(); diff --git a/src/cpu/intel/model_2065x/Kconfig b/src/cpu/intel/model_2065x/Kconfig index f6d812f..59bb8d8 100644 --- a/src/cpu/intel/model_2065x/Kconfig +++ b/src/cpu/intel/model_2065x/Kconfig @@ -19,6 +19,7 @@ config CPU_SPECIFIC_OPTIONS select PARALLEL_CPU_INIT #select AP_IN_SIPI_WAIT select TSC_SYNC_MFENCE + select CPU_INTEL_COMMON config BOOTBLOCK_CPU_INIT string @@ -28,10 +29,6 @@ config SMM_TSEG_SIZE hex default 0x800000 -config ENABLE_VMX - bool "Enable VMX for virtualization" - default n - config XIP_ROM_SIZE hex default 0x20000 diff --git a/src/cpu/intel/model_2065x/Makefile.inc b/src/cpu/intel/model_2065x/Makefile.inc index cdf9fed..137d1c9 100644 --- a/src/cpu/intel/model_2065x/Makefile.inc +++ b/src/cpu/intel/model_2065x/Makefile.inc @@ -8,6 +8,7 @@ subdirs-y += ../../intel/turbo subdirs-y += ../../intel/microcode subdirs-y += ../../x86/smm subdirs-y += ../smm/gen1 +subdirs-y += ../common ramstage-y += tsc_freq.c romstage-y += tsc_freq.c diff --git a/src/cpu/intel/model_2065x/model_2065x_init.c b/src/cpu/intel/model_2065x/model_2065x_init.c index 7987f8e..9bc9df1 100644 --- a/src/cpu/intel/model_2065x/model_2065x_init.c +++ b/src/cpu/intel/model_2065x/model_2065x_init.c @@ -32,6 +32,7 @@ #include "model_2065x.h" #include "chip.h" #include <cpu/intel/smm/gen1/smi.h> +#include <cpu/intel/common/common.h> /* * List of supported C-states in this processor @@ -132,56 +133,6 @@ int cpu_get_apic_id_map(int *apic_id_map) return threads_per_package; } -static void enable_vmx(void) -{ - struct cpuid_result regs; - msr_t msr; - int enable = CONFIG_ENABLE_VMX; - - regs = cpuid(1); - /* Check that the VMX is supported before reading or writing the MSR. */ - if (!((regs.ecx & CPUID_VMX) || (regs.ecx & CPUID_SMX))) - return; - - msr = rdmsr(IA32_FEATURE_CONTROL); - - if (msr.lo & (1 << 0)) { - printk(BIOS_ERR, "VMX is locked, so %s will do nothing\n", __func__); - /* VMX locked. If we set it again we get an illegal - * instruction - */ - return; - } - - /* The IA32_FEATURE_CONTROL MSR may initialize with random values. - * It must be cleared regardless of VMX config setting. - */ - msr.hi = msr.lo = 0; - - printk(BIOS_DEBUG, "%s VMX\n", enable ? "Enabling" : "Disabling"); - - /* Even though the Intel manual says you must set the lock bit in addition - * to the VMX bit in order for VMX to work, it is incorrect. Thus we leave - * it unlocked for the OS to manage things itself. This is good for a few - * reasons: - * - No need to reflash the bios just to toggle the lock bit. - * - The VMX bits really really should match each other across cores, so - * hard locking it on one while another has the opposite setting can - * easily lead to crashes as code using VMX migrates between them. - * - Vendors that want to "upsell" from a bios that disables+locks to - * one that doesn't is sleazy. - * By leaving this to the OS (e.g. Linux), people can do exactly what they - * want on the fly, and do it correctly (e.g. across multiple cores). - */ - if (enable) { - msr.lo |= (1 << 2); - if (regs.ecx & CPUID_SMX) - msr.lo |= (1 << 1); - } - - wrmsr(IA32_FEATURE_CONTROL, msr); -} - int cpu_config_tdp_levels(void) { @@ -383,8 +334,8 @@ static void model_2065x_init(struct device *cpu) enable_lapic_tpr(); setup_lapic(); - /* Enable virtualization if enabled in CMOS */ - enable_vmx(); + /* Set virtualization based on Kconfig option */ + set_vmx(); /* Configure Enhanced SpeedStep and Thermal Sensors */ configure_misc(); diff --git a/src/cpu/intel/model_206ax/Kconfig b/src/cpu/intel/model_206ax/Kconfig index b954b79..6c04fba 100644 --- a/src/cpu/intel/model_206ax/Kconfig +++ b/src/cpu/intel/model_206ax/Kconfig @@ -20,6 +20,7 @@ config CPU_SPECIFIC_OPTIONS #select AP_IN_SIPI_WAIT select TSC_SYNC_MFENCE select LAPIC_MONOTONIC_TIMER + select CPU_INTEL_COMMON config BOOTBLOCK_CPU_INIT string @@ -33,8 +34,4 @@ config SMM_TSEG_SIZE hex default 0x800000 -config ENABLE_VMX - bool "Enable VMX for virtualization" - default n - endif diff --git a/src/cpu/intel/model_206ax/Makefile.inc b/src/cpu/intel/model_206ax/Makefile.inc index 25f0742..b79ccd7 100644 --- a/src/cpu/intel/model_206ax/Makefile.inc +++ b/src/cpu/intel/model_206ax/Makefile.inc @@ -1,6 +1,7 @@ ramstage-y += model_206ax_init.c subdirs-y += ../../x86/name subdirs-y += ../smm/gen1 +subdirs-y += ../common ramstage-y += acpi.c diff --git a/src/cpu/intel/model_206ax/model_206ax_init.c b/src/cpu/intel/model_206ax/model_206ax_init.c index e7bfd9e..af712d0 100644 --- a/src/cpu/intel/model_206ax/model_206ax_init.c +++ b/src/cpu/intel/model_206ax/model_206ax_init.c @@ -32,6 +32,7 @@ #include "model_206ax.h" #include "chip.h" #include <cpu/intel/smm/gen1/smi.h> +#include <cpu/intel/common/common.h> /* * List of supported C-states in this processor @@ -110,56 +111,6 @@ static acpi_cstate_t cstate_map[] = { { 0 } }; -static void enable_vmx(void) -{ - struct cpuid_result regs; - msr_t msr; - int enable = CONFIG_ENABLE_VMX; - - regs = cpuid(1); - /* Check that the VMX is supported before reading or writing the MSR. */ - if (!((regs.ecx & CPUID_VMX) || (regs.ecx & CPUID_SMX))) - return; - - msr = rdmsr(IA32_FEATURE_CONTROL); - - if (msr.lo & (1 << 0)) { - printk(BIOS_ERR, "VMX is locked, so %s will do nothing\n", __func__); - /* VMX locked. If we set it again we get an illegal - * instruction - */ - return; - } - - /* The IA32_FEATURE_CONTROL MSR may initialize with random values. - * It must be cleared regardless of VMX config setting. - */ - msr.hi = msr.lo = 0; - - printk(BIOS_DEBUG, "%s VMX\n", enable ? "Enabling" : "Disabling"); - - /* Even though the Intel manual says you must set the lock bit in addition - * to the VMX bit in order for VMX to work, it is incorrect. Thus we leave - * it unlocked for the OS to manage things itself. This is good for a few - * reasons: - * - No need to reflash the bios just to toggle the lock bit. - * - The VMX bits really really should match each other across cores, so - * hard locking it on one while another has the opposite setting can - * easily lead to crashes as code using VMX migrates between them. - * - Vendors that want to "upsell" from a bios that disables+locks to - * one that doesn't is sleazy. - * By leaving this to the OS (e.g. Linux), people can do exactly what they - * want on the fly, and do it correctly (e.g. across multiple cores). - */ - if (enable) { - msr.lo |= (1 << 2); - if (regs.ecx & CPUID_SMX) - msr.lo |= (1 << 1); - } - - wrmsr(IA32_FEATURE_CONTROL, msr); -} - /* Convert time in seconds to POWER_LIMIT_1_TIME MSR value */ static const u8 power_limit_time_sec_to_msr[] = { [0] = 0x00, @@ -576,8 +527,8 @@ static void model_206ax_init(struct device *cpu) enable_lapic_tpr(); setup_lapic(); - /* Enable virtualization if enabled in CMOS */ - enable_vmx(); + /* Set virtualization based on Kconfig option */ + set_vmx(); /* Configure C States */ configure_c_states(); diff --git a/src/cpu/intel/model_6ex/Kconfig b/src/cpu/intel/model_6ex/Kconfig index 08a5775..10ebcc7 100644 --- a/src/cpu/intel/model_6ex/Kconfig +++ b/src/cpu/intel/model_6ex/Kconfig @@ -10,3 +10,4 @@ config CPU_INTEL_MODEL_6EX select AP_IN_SIPI_WAIT select TSC_SYNC_MFENCE select SUPPORT_CPU_UCODE_IN_CBFS + select CPU_INTEL_COMMON diff --git a/src/cpu/intel/model_6ex/Makefile.inc b/src/cpu/intel/model_6ex/Makefile.inc index 69d5c1b..4321f2a 100644 --- a/src/cpu/intel/model_6ex/Makefile.inc +++ b/src/cpu/intel/model_6ex/Makefile.inc @@ -1,4 +1,5 @@ ramstage-y += model_6ex_init.c subdirs-y += ../../x86/name +subdirs-y += ../common cpu_microcode_bins += 3rdparty/blobs/cpu/intel/model_6ex/microcode.bin diff --git a/src/cpu/intel/model_6ex/model_6ex_init.c b/src/cpu/intel/model_6ex/model_6ex_init.c index d42ff69..cc1260e 100644 --- a/src/cpu/intel/model_6ex/model_6ex_init.c +++ b/src/cpu/intel/model_6ex/model_6ex_init.c @@ -26,39 +26,7 @@ #include <cpu/intel/speedstep.h> #include <cpu/x86/cache.h> #include <cpu/x86/name.h> - - -#define IA32_FEATURE_CONTROL 0x003a - -#define CPUID_VMX (1 << 5) -#define CPUID_SMX (1 << 6) -static void enable_vmx(void) -{ - struct cpuid_result regs; - msr_t msr; - - msr = rdmsr(IA32_FEATURE_CONTROL); - - if (msr.lo & (1 << 0)) { - /* VMX locked. If we set it again we get an illegal - * instruction - */ - return; - } - - regs = cpuid(1); - if (regs.ecx & CPUID_VMX) { - msr.lo |= (1 << 2); - if (regs.ecx & CPUID_SMX) - msr.lo |= (1 << 1); - } - - wrmsr(IA32_FEATURE_CONTROL, msr); - - msr.lo |= (1 << 0); /* Set lock bit */ - - wrmsr(IA32_FEATURE_CONTROL, msr); -} +#include <cpu/intel/common/common.h> #define HIGHEST_CLEVEL 3 static void configure_c_states(void) @@ -163,8 +131,8 @@ static void model_6ex_init(struct device *cpu) /* Enable the local CPU APICs */ setup_lapic(); - /* Enable virtualization */ - enable_vmx(); + /* Set virtualization based on Kconfig option */ + set_vmx(); /* Configure C States */ configure_c_states(); diff --git a/src/cpu/intel/model_6fx/Kconfig b/src/cpu/intel/model_6fx/Kconfig index baae196..8f05314 100644 --- a/src/cpu/intel/model_6fx/Kconfig +++ b/src/cpu/intel/model_6fx/Kconfig @@ -10,3 +10,4 @@ config CPU_INTEL_MODEL_6FX select AP_IN_SIPI_WAIT select TSC_SYNC_MFENCE select SUPPORT_CPU_UCODE_IN_CBFS + select CPU_INTEL_COMMON diff --git a/src/cpu/intel/model_6fx/Makefile.inc b/src/cpu/intel/model_6fx/Makefile.inc index ba31c7e..de6fd8d 100644 --- a/src/cpu/intel/model_6fx/Makefile.inc +++ b/src/cpu/intel/model_6fx/Makefile.inc @@ -1,4 +1,5 @@ ramstage-y += model_6fx_init.c subdirs-y += ../../x86/name +subdirs-y += ../common cpu_microcode_bins += 3rdparty/blobs/cpu/intel/model_6fx/microcode.bin diff --git a/src/cpu/intel/model_6fx/model_6fx_init.c b/src/cpu/intel/model_6fx/model_6fx_init.c index 67a7408..91d8d01 100644 --- a/src/cpu/intel/model_6fx/model_6fx_init.c +++ b/src/cpu/intel/model_6fx/model_6fx_init.c @@ -26,38 +26,7 @@ #include <cpu/intel/hyperthreading.h> #include <cpu/x86/cache.h> #include <cpu/x86/name.h> - -#define IA32_FEATURE_CONTROL 0x003a - -#define CPUID_VMX (1 << 5) -#define CPUID_SMX (1 << 6) -static void enable_vmx(void) -{ - struct cpuid_result regs; - msr_t msr; - - msr = rdmsr(IA32_FEATURE_CONTROL); - - if (msr.lo & (1 << 0)) { - /* VMX locked. If we set it again we get an illegal - * instruction - */ - return; - } - - regs = cpuid(1); - if (regs.ecx & CPUID_VMX) { - msr.lo |= (1 << 2); - if (regs.ecx & CPUID_SMX) - msr.lo |= (1 << 1); - } - - wrmsr(IA32_FEATURE_CONTROL, msr); - - msr.lo |= (1 << 0); /* Set lock bit */ - - wrmsr(IA32_FEATURE_CONTROL, msr); -} +#include <cpu/intel/common/common.h> #define HIGHEST_CLEVEL 3 static void configure_c_states(void) @@ -180,8 +149,8 @@ static void model_6fx_init(struct device *cpu) /* Enable the local CPU APICs */ setup_lapic(); - /* Enable virtualization */ - enable_vmx(); + /* Set virtualization based on Kconfig option */ + set_vmx(); /* Configure C States */ configure_c_states(); diff --git a/src/soc/intel/broadwell/Kconfig b/src/soc/intel/broadwell/Kconfig index 75cd831..01bcaf1 100644 --- a/src/soc/intel/broadwell/Kconfig +++ b/src/soc/intel/broadwell/Kconfig @@ -44,6 +44,7 @@ config CPU_SPECIFIC_OPTIONS select HAVE_INTEL_FIRMWARE select SOC_INTEL_COMMON_ACPI_WAKE_SOURCE select HAVE_SPI_CONSOLE_SUPPORT + select CPU_INTEL_COMMON config BOOTBLOCK_CPU_INIT string @@ -57,7 +58,6 @@ config BOOTBLOCK_SOUTHBRIDGE_INIT string default "soc/intel/broadwell/bootblock/pch.c" - config MMCONF_BASE_ADDRESS hex default 0xf0000000 diff --git a/src/soc/intel/broadwell/Makefile.inc b/src/soc/intel/broadwell/Makefile.inc index 4da8c20..c4f4538 100644 --- a/src/soc/intel/broadwell/Makefile.inc +++ b/src/soc/intel/broadwell/Makefile.inc @@ -7,6 +7,7 @@ subdirs-y += ../../../cpu/x86/smm subdirs-y += ../../../cpu/x86/tsc subdirs-y += ../../../cpu/intel/microcode subdirs-y += ../../../cpu/intel/turbo +subdirs-y += ../../../cpu/intel/common ramstage-y += acpi.c ramstage-y += adsp.c diff --git a/src/soc/intel/broadwell/cpu.c b/src/soc/intel/broadwell/cpu.c index 16f350c..09fe5ac 100644 --- a/src/soc/intel/broadwell/cpu.c +++ b/src/soc/intel/broadwell/cpu.c @@ -40,6 +40,7 @@ #include <soc/smm.h> #include <soc/systemagent.h> #include <soc/intel/broadwell/chip.h> +#include <cpu/intel/common/common.h> /* Convert time in seconds to POWER_LIMIT_1_TIME MSR value */ static const u8 power_limit_time_sec_to_msr[] = { @@ -580,6 +581,9 @@ static void cpu_core_init(device_t cpu) enable_lapic_tpr(); setup_lapic(); + /* Set virtualization based on Kconfig option */ + set_vmx(); + /* Configure C States */ configure_c_states();

1 0

New patch to review for coreboot: amd-based mainboards: Fix whitespace in _PTS comments
by Marshall Dawson 16 Dec '16

16 Dec '16

Marshall Dawson (marshalldawson3rd(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/17905 -gerrit commit 974e9feca641d86eb684acb3b8f100ee9dc96786 Author: Marshall Dawson <marshalldawson3rd(a)gmail.com> Date: Fri Dec 16 13:17:34 2016 -0500 amd-based mainboards: Fix whitespace in _PTS comments Correct tabs that were intended as spaces. Change-Id: Idcf33d829f87a866b5ed880527102918d5b93842 Signed-off-by: Marshall Dawson <marshalldawson3rd(a)gmail.com> --- src/mainboard/advansus/a785e-i/dsdt.asl | 4 ++-- src/mainboard/amd/bettong/acpi/sleep.asl | 4 ++-- src/mainboard/amd/bimini_fam10/dsdt.asl | 4 ++-- src/mainboard/amd/dbm690t/dsdt.asl | 4 ++-- src/mainboard/amd/dinar/dsdt.asl | 4 ++-- src/mainboard/amd/gardenia/acpi/sleep.asl | 4 ++-- src/mainboard/amd/inagua/acpi/sleep.asl | 4 ++-- src/mainboard/amd/lamar/acpi/sleep.asl | 4 ++-- src/mainboard/amd/mahogany/dsdt.asl | 4 ++-- src/mainboard/amd/mahogany_fam10/dsdt.asl | 4 ++-- src/mainboard/amd/olivehill/acpi/sleep.asl | 4 ++-- src/mainboard/amd/parmer/acpi/sleep.asl | 4 ++-- src/mainboard/amd/persimmon/acpi/sleep.asl | 4 ++-- src/mainboard/amd/pistachio/dsdt.asl | 4 ++-- src/mainboard/amd/south_station/acpi/sleep.asl | 4 ++-- src/mainboard/amd/thatcher/acpi/sleep.asl | 4 ++-- src/mainboard/amd/tilapia_fam10/dsdt.asl | 4 ++-- src/mainboard/amd/torpedo/dsdt.asl | 4 ++-- src/mainboard/amd/union_station/acpi/sleep.asl | 4 ++-- src/mainboard/asrock/e350m1/acpi/sleep.asl | 4 ++-- src/mainboard/asrock/imb-a180/acpi/sleep.asl | 4 ++-- src/mainboard/asus/f2a85-m/acpi/sleep.asl | 4 ++-- src/mainboard/asus/kcma-d8/acpi/pm_ctrl.asl | 2 +- src/mainboard/asus/kfsn4-dre/acpi/pm_ctrl.asl | 2 +- src/mainboard/asus/kfsn4-dre_k8/acpi/pm_ctrl.asl | 2 +- src/mainboard/asus/kgpe-d16/acpi/pm_ctrl.asl | 2 +- src/mainboard/asus/m4a78-em/dsdt.asl | 4 ++-- src/mainboard/asus/m4a785-m/dsdt.asl | 4 ++-- src/mainboard/asus/m4a785t-m/dsdt.asl | 4 ++-- src/mainboard/asus/m5a88-v/dsdt.asl | 4 ++-- src/mainboard/avalue/eax-785e/dsdt.asl | 4 ++-- src/mainboard/bap/ode_e20XX/acpi/sleep.asl | 4 ++-- src/mainboard/biostar/am1ml/acpi/sleep.asl | 4 ++-- src/mainboard/elmex/pcm205400/acpi/sleep.asl | 4 ++-- src/mainboard/gigabyte/ma785gm/dsdt.asl | 4 ++-- src/mainboard/gigabyte/ma785gmt/dsdt.asl | 4 ++-- src/mainboard/gigabyte/ma78gm/dsdt.asl | 4 ++-- src/mainboard/gizmosphere/gizmo/acpi/sleep.asl | 4 ++-- src/mainboard/gizmosphere/gizmo2/acpi/sleep.asl | 4 ++-- src/mainboard/hp/abm/acpi/sleep.asl | 4 ++-- src/mainboard/hp/pavilion_m6_1035dx/acpi/sleep.asl | 4 ++-- src/mainboard/iei/kino-780am2-fam10/dsdt.asl | 4 ++-- src/mainboard/jetway/nf81-t56n-lf/acpi/sleep.asl | 4 ++-- src/mainboard/jetway/pa78vm5/dsdt.asl | 4 ++-- src/mainboard/kontron/kt690/dsdt.asl | 4 ++-- src/mainboard/lenovo/g505s/acpi/sleep.asl | 4 ++-- src/mainboard/lippert/frontrunner-af/dsdt.asl | 4 ++-- src/mainboard/lippert/toucan-af/dsdt.asl | 4 ++-- src/mainboard/msi/ms7721/acpi/sleep.asl | 4 ++-- src/mainboard/pcengines/apu1/acpi/sleep.asl | 4 ++-- src/mainboard/siemens/sitemp_g1p1/acpi/event.asl | 4 ++-- src/mainboard/supermicro/h8qgi/dsdt.asl | 4 ++-- src/mainboard/supermicro/h8scm/dsdt.asl | 4 ++-- src/mainboard/supermicro/h8scm_fam10/dsdt.asl | 4 ++-- src/mainboard/technexion/tim5690/dsdt.asl | 4 ++-- src/mainboard/technexion/tim8690/dsdt.asl | 4 ++-- src/mainboard/tyan/s8226/dsdt.asl | 4 ++-- 57 files changed, 110 insertions(+), 110 deletions(-) diff --git a/src/mainboard/advansus/a785e-i/dsdt.asl b/src/mainboard/advansus/a785e-i/dsdt.asl index 37b9ae1..88d4f07 100644 --- a/src/mainboard/advansus/a785e-i/dsdt.asl +++ b/src/mainboard/advansus/a785e-i/dsdt.asl @@ -831,9 +831,9 @@ DefinitionBlock ( * -none- * * The _PTS control method is executed at the beginning of the sleep process - * for S1-S5. The sleeping value is passed to the _PTS control method. This + * for S1-S5. The sleeping value is passed to the _PTS control method. This * control method may be executed a relatively long time before entering the - * sleep state and the OS may abort the operation without notification to + * sleep state and the OS may abort the operation without notification to * the ACPI driver. This method cannot modify the configuration or power * state of any device in the system. */ diff --git a/src/mainboard/amd/bettong/acpi/sleep.asl b/src/mainboard/amd/bettong/acpi/sleep.asl index e11ea07..58f0752 100644 --- a/src/mainboard/amd/bettong/acpi/sleep.asl +++ b/src/mainboard/amd/bettong/acpi/sleep.asl @@ -26,9 +26,9 @@ Name(WKST,Package(){Zero, Zero}) * -none- * * The _PTS control method is executed at the beginning of the sleep process -* for S1-S5. The sleeping value is passed to the _PTS control method. This +* for S1-S5. The sleeping value is passed to the _PTS control method. This * control method may be executed a relatively long time before entering the -* sleep state and the OS may abort the operation without notification to +* sleep state and the OS may abort the operation without notification to * the ACPI driver. This method cannot modify the configuration or power * state of any device in the system. */ diff --git a/src/mainboard/amd/bimini_fam10/dsdt.asl b/src/mainboard/amd/bimini_fam10/dsdt.asl index 6411968..eade7ee 100644 --- a/src/mainboard/amd/bimini_fam10/dsdt.asl +++ b/src/mainboard/amd/bimini_fam10/dsdt.asl @@ -831,9 +831,9 @@ DefinitionBlock ( * -none- * * The _PTS control method is executed at the beginning of the sleep process - * for S1-S5. The sleeping value is passed to the _PTS control method. This + * for S1-S5. The sleeping value is passed to the _PTS control method. This * control method may be executed a relatively long time before entering the - * sleep state and the OS may abort the operation without notification to + * sleep state and the OS may abort the operation without notification to * the ACPI driver. This method cannot modify the configuration or power * state of any device in the system. */ diff --git a/src/mainboard/amd/dbm690t/dsdt.asl b/src/mainboard/amd/dbm690t/dsdt.asl index 744c687..00e1c12 100644 --- a/src/mainboard/amd/dbm690t/dsdt.asl +++ b/src/mainboard/amd/dbm690t/dsdt.asl @@ -798,9 +798,9 @@ DefinitionBlock ( * -none- * * The _PTS control method is executed at the beginning of the sleep process - * for S1-S5. The sleeping value is passed to the _PTS control method. This + * for S1-S5. The sleeping value is passed to the _PTS control method. This * control method may be executed a relatively long time before entering the - * sleep state and the OS may abort the operation without notification to + * sleep state and the OS may abort the operation without notification to * the ACPI driver. This method cannot modify the configuration or power * state of any device in the system. */ diff --git a/src/mainboard/amd/dinar/dsdt.asl b/src/mainboard/amd/dinar/dsdt.asl index b6a9c3c..8e51d31 100644 --- a/src/mainboard/amd/dinar/dsdt.asl +++ b/src/mainboard/amd/dinar/dsdt.asl @@ -703,9 +703,9 @@ DefinitionBlock ( * -none- * * The _PTS control method is executed at the beginning of the sleep process - * for S1-S5. The sleeping value is passed to the _PTS control method. This + * for S1-S5. The sleeping value is passed to the _PTS control method. This * control method may be executed a relatively long time before entering the - * sleep state and the OS may abort the operation without notification to + * sleep state and the OS may abort the operation without notification to * the ACPI driver. This method cannot modify the configuration or power * state of any device in the system. */ diff --git a/src/mainboard/amd/gardenia/acpi/sleep.asl b/src/mainboard/amd/gardenia/acpi/sleep.asl index e11ea07..58f0752 100644 --- a/src/mainboard/amd/gardenia/acpi/sleep.asl +++ b/src/mainboard/amd/gardenia/acpi/sleep.asl @@ -26,9 +26,9 @@ Name(WKST,Package(){Zero, Zero}) * -none- * * The _PTS control method is executed at the beginning of the sleep process -* for S1-S5. The sleeping value is passed to the _PTS control method. This +* for S1-S5. The sleeping value is passed to the _PTS control method. This * control method may be executed a relatively long time before entering the -* sleep state and the OS may abort the operation without notification to +* sleep state and the OS may abort the operation without notification to * the ACPI driver. This method cannot modify the configuration or power * state of any device in the system. */ diff --git a/src/mainboard/amd/inagua/acpi/sleep.asl b/src/mainboard/amd/inagua/acpi/sleep.asl index b3fd07e..d7cf365 100644 --- a/src/mainboard/amd/inagua/acpi/sleep.asl +++ b/src/mainboard/amd/inagua/acpi/sleep.asl @@ -26,9 +26,9 @@ Name(WKST,Package(){Zero, Zero}) * -none- * * The _PTS control method is executed at the beginning of the sleep process -* for S1-S5. The sleeping value is passed to the _PTS control method. This +* for S1-S5. The sleeping value is passed to the _PTS control method. This * control method may be executed a relatively long time before entering the -* sleep state and the OS may abort the operation without notification to +* sleep state and the OS may abort the operation without notification to * the ACPI driver. This method cannot modify the configuration or power * state of any device in the system. */ diff --git a/src/mainboard/amd/lamar/acpi/sleep.asl b/src/mainboard/amd/lamar/acpi/sleep.asl index 21a4cf9..2d26a54 100644 --- a/src/mainboard/amd/lamar/acpi/sleep.asl +++ b/src/mainboard/amd/lamar/acpi/sleep.asl @@ -26,9 +26,9 @@ Name(WKST,Package(){Zero, Zero}) * -none- * * The _PTS control method is executed at the beginning of the sleep process -* for S1-S5. The sleeping value is passed to the _PTS control method. This +* for S1-S5. The sleeping value is passed to the _PTS control method. This * control method may be executed a relatively long time before entering the -* sleep state and the OS may abort the operation without notification to +* sleep state and the OS may abort the operation without notification to * the ACPI driver. This method cannot modify the configuration or power * state of any device in the system. */ diff --git a/src/mainboard/amd/mahogany/dsdt.asl b/src/mainboard/amd/mahogany/dsdt.asl index e252454..ff2c292 100644 --- a/src/mainboard/amd/mahogany/dsdt.asl +++ b/src/mainboard/amd/mahogany/dsdt.asl @@ -794,9 +794,9 @@ DefinitionBlock ( * -none- * * The _PTS control method is executed at the beginning of the sleep process - * for S1-S5. The sleeping value is passed to the _PTS control method. This + * for S1-S5. The sleeping value is passed to the _PTS control method. This * control method may be executed a relatively long time before entering the - * sleep state and the OS may abort the operation without notification to + * sleep state and the OS may abort the operation without notification to * the ACPI driver. This method cannot modify the configuration or power * state of any device in the system. */ diff --git a/src/mainboard/amd/mahogany_fam10/dsdt.asl b/src/mainboard/amd/mahogany_fam10/dsdt.asl index df7a9ee..c4e6688 100644 --- a/src/mainboard/amd/mahogany_fam10/dsdt.asl +++ b/src/mainboard/amd/mahogany_fam10/dsdt.asl @@ -836,9 +836,9 @@ DefinitionBlock ( * -none- * * The _PTS control method is executed at the beginning of the sleep process - * for S1-S5. The sleeping value is passed to the _PTS control method. This + * for S1-S5. The sleeping value is passed to the _PTS control method. This * control method may be executed a relatively long time before entering the - * sleep state and the OS may abort the operation without notification to + * sleep state and the OS may abort the operation without notification to * the ACPI driver. This method cannot modify the configuration or power * state of any device in the system. */ diff --git a/src/mainboard/amd/olivehill/acpi/sleep.asl b/src/mainboard/amd/olivehill/acpi/sleep.asl index dc3cc49..1225a62 100644 --- a/src/mainboard/amd/olivehill/acpi/sleep.asl +++ b/src/mainboard/amd/olivehill/acpi/sleep.asl @@ -26,9 +26,9 @@ Name(WKST,Package(){Zero, Zero}) * -none- * * The _PTS control method is executed at the beginning of the sleep process -* for S1-S5. The sleeping value is passed to the _PTS control method. This +* for S1-S5. The sleeping value is passed to the _PTS control method. This * control method may be executed a relatively long time before entering the -* sleep state and the OS may abort the operation without notification to +* sleep state and the OS may abort the operation without notification to * the ACPI driver. This method cannot modify the configuration or power * state of any device in the system. */ diff --git a/src/mainboard/amd/parmer/acpi/sleep.asl b/src/mainboard/amd/parmer/acpi/sleep.asl index d3a2ce2..947a2f2 100644 --- a/src/mainboard/amd/parmer/acpi/sleep.asl +++ b/src/mainboard/amd/parmer/acpi/sleep.asl @@ -26,9 +26,9 @@ Name(WKST,Package(){Zero, Zero}) * -none- * * The _PTS control method is executed at the beginning of the sleep process -* for S1-S5. The sleeping value is passed to the _PTS control method. This +* for S1-S5. The sleeping value is passed to the _PTS control method. This * control method may be executed a relatively long time before entering the -* sleep state and the OS may abort the operation without notification to +* sleep state and the OS may abort the operation without notification to * the ACPI driver. This method cannot modify the configuration or power * state of any device in the system. */ diff --git a/src/mainboard/amd/persimmon/acpi/sleep.asl b/src/mainboard/amd/persimmon/acpi/sleep.asl index b3fd07e..d7cf365 100644 --- a/src/mainboard/amd/persimmon/acpi/sleep.asl +++ b/src/mainboard/amd/persimmon/acpi/sleep.asl @@ -26,9 +26,9 @@ Name(WKST,Package(){Zero, Zero}) * -none- * * The _PTS control method is executed at the beginning of the sleep process -* for S1-S5. The sleeping value is passed to the _PTS control method. This +* for S1-S5. The sleeping value is passed to the _PTS control method. This * control method may be executed a relatively long time before entering the -* sleep state and the OS may abort the operation without notification to +* sleep state and the OS may abort the operation without notification to * the ACPI driver. This method cannot modify the configuration or power * state of any device in the system. */ diff --git a/src/mainboard/amd/pistachio/dsdt.asl b/src/mainboard/amd/pistachio/dsdt.asl index 0e8bd05..d2b45fc 100644 --- a/src/mainboard/amd/pistachio/dsdt.asl +++ b/src/mainboard/amd/pistachio/dsdt.asl @@ -798,9 +798,9 @@ DefinitionBlock ( * -none- * * The _PTS control method is executed at the beginning of the sleep process - * for S1-S5. The sleeping value is passed to the _PTS control method. This + * for S1-S5. The sleeping value is passed to the _PTS control method. This * control method may be executed a relatively long time before entering the - * sleep state and the OS may abort the operation without notification to + * sleep state and the OS may abort the operation without notification to * the ACPI driver. This method cannot modify the configuration or power * state of any device in the system. */ diff --git a/src/mainboard/amd/south_station/acpi/sleep.asl b/src/mainboard/amd/south_station/acpi/sleep.asl index b3fd07e..d7cf365 100644 --- a/src/mainboard/amd/south_station/acpi/sleep.asl +++ b/src/mainboard/amd/south_station/acpi/sleep.asl @@ -26,9 +26,9 @@ Name(WKST,Package(){Zero, Zero}) * -none- * * The _PTS control method is executed at the beginning of the sleep process -* for S1-S5. The sleeping value is passed to the _PTS control method. This +* for S1-S5. The sleeping value is passed to the _PTS control method. This * control method may be executed a relatively long time before entering the -* sleep state and the OS may abort the operation without notification to +* sleep state and the OS may abort the operation without notification to * the ACPI driver. This method cannot modify the configuration or power * state of any device in the system. */ diff --git a/src/mainboard/amd/thatcher/acpi/sleep.asl b/src/mainboard/amd/thatcher/acpi/sleep.asl index 1e8b9ae..1dc590f 100644 --- a/src/mainboard/amd/thatcher/acpi/sleep.asl +++ b/src/mainboard/amd/thatcher/acpi/sleep.asl @@ -26,9 +26,9 @@ Name(WKST,Package(){Zero, Zero}) * -none- * * The _PTS control method is executed at the beginning of the sleep process -* for S1-S5. The sleeping value is passed to the _PTS control method. This +* for S1-S5. The sleeping value is passed to the _PTS control method. This * control method may be executed a relatively long time before entering the -* sleep state and the OS may abort the operation without notification to +* sleep state and the OS may abort the operation without notification to * the ACPI driver. This method cannot modify the configuration or power * state of any device in the system. */ diff --git a/src/mainboard/amd/tilapia_fam10/dsdt.asl b/src/mainboard/amd/tilapia_fam10/dsdt.asl index 01fc046..1d17d04 100644 --- a/src/mainboard/amd/tilapia_fam10/dsdt.asl +++ b/src/mainboard/amd/tilapia_fam10/dsdt.asl @@ -836,9 +836,9 @@ DefinitionBlock ( * -none- * * The _PTS control method is executed at the beginning of the sleep process - * for S1-S5. The sleeping value is passed to the _PTS control method. This + * for S1-S5. The sleeping value is passed to the _PTS control method. This * control method may be executed a relatively long time before entering the - * sleep state and the OS may abort the operation without notification to + * sleep state and the OS may abort the operation without notification to * the ACPI driver. This method cannot modify the configuration or power * state of any device in the system. */ diff --git a/src/mainboard/amd/torpedo/dsdt.asl b/src/mainboard/amd/torpedo/dsdt.asl index f257f23..cc830dc 100644 --- a/src/mainboard/amd/torpedo/dsdt.asl +++ b/src/mainboard/amd/torpedo/dsdt.asl @@ -674,9 +674,9 @@ DefinitionBlock ( * -none- * * The _PTS control method is executed at the beginning of the sleep process - * for S1-S5. The sleeping value is passed to the _PTS control method. This + * for S1-S5. The sleeping value is passed to the _PTS control method. This * control method may be executed a relatively long time before entering the - * sleep state and the OS may abort the operation without notification to + * sleep state and the OS may abort the operation without notification to * the ACPI driver. This method cannot modify the configuration or power * state of any device in the system. */ diff --git a/src/mainboard/amd/union_station/acpi/sleep.asl b/src/mainboard/amd/union_station/acpi/sleep.asl index b3fd07e..d7cf365 100644 --- a/src/mainboard/amd/union_station/acpi/sleep.asl +++ b/src/mainboard/amd/union_station/acpi/sleep.asl @@ -26,9 +26,9 @@ Name(WKST,Package(){Zero, Zero}) * -none- * * The _PTS control method is executed at the beginning of the sleep process -* for S1-S5. The sleeping value is passed to the _PTS control method. This +* for S1-S5. The sleeping value is passed to the _PTS control method. This * control method may be executed a relatively long time before entering the -* sleep state and the OS may abort the operation without notification to +* sleep state and the OS may abort the operation without notification to * the ACPI driver. This method cannot modify the configuration or power * state of any device in the system. */ diff --git a/src/mainboard/asrock/e350m1/acpi/sleep.asl b/src/mainboard/asrock/e350m1/acpi/sleep.asl index b3fd07e..d7cf365 100644 --- a/src/mainboard/asrock/e350m1/acpi/sleep.asl +++ b/src/mainboard/asrock/e350m1/acpi/sleep.asl @@ -26,9 +26,9 @@ Name(WKST,Package(){Zero, Zero}) * -none- * * The _PTS control method is executed at the beginning of the sleep process -* for S1-S5. The sleeping value is passed to the _PTS control method. This +* for S1-S5. The sleeping value is passed to the _PTS control method. This * control method may be executed a relatively long time before entering the -* sleep state and the OS may abort the operation without notification to +* sleep state and the OS may abort the operation without notification to * the ACPI driver. This method cannot modify the configuration or power * state of any device in the system. */ diff --git a/src/mainboard/asrock/imb-a180/acpi/sleep.asl b/src/mainboard/asrock/imb-a180/acpi/sleep.asl index dc3cc49..1225a62 100644 --- a/src/mainboard/asrock/imb-a180/acpi/sleep.asl +++ b/src/mainboard/asrock/imb-a180/acpi/sleep.asl @@ -26,9 +26,9 @@ Name(WKST,Package(){Zero, Zero}) * -none- * * The _PTS control method is executed at the beginning of the sleep process -* for S1-S5. The sleeping value is passed to the _PTS control method. This +* for S1-S5. The sleeping value is passed to the _PTS control method. This * control method may be executed a relatively long time before entering the -* sleep state and the OS may abort the operation without notification to +* sleep state and the OS may abort the operation without notification to * the ACPI driver. This method cannot modify the configuration or power * state of any device in the system. */ diff --git a/src/mainboard/asus/f2a85-m/acpi/sleep.asl b/src/mainboard/asus/f2a85-m/acpi/sleep.asl index 1d553bd..3250f5e 100644 --- a/src/mainboard/asus/f2a85-m/acpi/sleep.asl +++ b/src/mainboard/asus/f2a85-m/acpi/sleep.asl @@ -26,9 +26,9 @@ Name(WKST,Package(){Zero, Zero}) * -none- * * The _PTS control method is executed at the beginning of the sleep process -* for S1-S5. The sleeping value is passed to the _PTS control method. This +* for S1-S5. The sleeping value is passed to the _PTS control method. This * control method may be executed a relatively long time before entering the -* sleep state and the OS may abort the operation without notification to +* sleep state and the OS may abort the operation without notification to * the ACPI driver. This method cannot modify the configuration or power * state of any device in the system. */ diff --git a/src/mainboard/asus/kcma-d8/acpi/pm_ctrl.asl b/src/mainboard/asus/kcma-d8/acpi/pm_ctrl.asl index 658d877..c2757fa 100644 --- a/src/mainboard/asus/kcma-d8/acpi/pm_ctrl.asl +++ b/src/mainboard/asus/kcma-d8/acpi/pm_ctrl.asl @@ -276,7 +276,7 @@ Method(\_WAK, 1) { * -none- * * The _PTS control method is executed at the beginning of the sleep process - * for S1-S5. The sleeping value is passed to the _PTS control method. This + * for S1-S5. The sleeping value is passed to the _PTS control method. This * control method may be executed a relatively long time before entering the * sleep state and the OS may abort the operation without notification to * the ACPI driver. This method cannot modify the configuration or power diff --git a/src/mainboard/asus/kfsn4-dre/acpi/pm_ctrl.asl b/src/mainboard/asus/kfsn4-dre/acpi/pm_ctrl.asl index 4cf8503..0afb841 100644 --- a/src/mainboard/asus/kfsn4-dre/acpi/pm_ctrl.asl +++ b/src/mainboard/asus/kfsn4-dre/acpi/pm_ctrl.asl @@ -159,7 +159,7 @@ * -none- * * The _PTS control method is executed at the beginning of the sleep process - * for S1-S5. The sleeping value is passed to the _PTS control method. This + * for S1-S5. The sleeping value is passed to the _PTS control method. This * control method may be executed a relatively long time before entering the * sleep state and the OS may abort the operation without notification to * the ACPI driver. This method cannot modify the configuration or power diff --git a/src/mainboard/asus/kfsn4-dre_k8/acpi/pm_ctrl.asl b/src/mainboard/asus/kfsn4-dre_k8/acpi/pm_ctrl.asl index 4cf8503..0afb841 100644 --- a/src/mainboard/asus/kfsn4-dre_k8/acpi/pm_ctrl.asl +++ b/src/mainboard/asus/kfsn4-dre_k8/acpi/pm_ctrl.asl @@ -159,7 +159,7 @@ * -none- * * The _PTS control method is executed at the beginning of the sleep process - * for S1-S5. The sleeping value is passed to the _PTS control method. This + * for S1-S5. The sleeping value is passed to the _PTS control method. This * control method may be executed a relatively long time before entering the * sleep state and the OS may abort the operation without notification to * the ACPI driver. This method cannot modify the configuration or power diff --git a/src/mainboard/asus/kgpe-d16/acpi/pm_ctrl.asl b/src/mainboard/asus/kgpe-d16/acpi/pm_ctrl.asl index 658d877..c2757fa 100644 --- a/src/mainboard/asus/kgpe-d16/acpi/pm_ctrl.asl +++ b/src/mainboard/asus/kgpe-d16/acpi/pm_ctrl.asl @@ -276,7 +276,7 @@ Method(\_WAK, 1) { * -none- * * The _PTS control method is executed at the beginning of the sleep process - * for S1-S5. The sleeping value is passed to the _PTS control method. This + * for S1-S5. The sleeping value is passed to the _PTS control method. This * control method may be executed a relatively long time before entering the * sleep state and the OS may abort the operation without notification to * the ACPI driver. This method cannot modify the configuration or power diff --git a/src/mainboard/asus/m4a78-em/dsdt.asl b/src/mainboard/asus/m4a78-em/dsdt.asl index 1a88d5b..7b1eddb 100644 --- a/src/mainboard/asus/m4a78-em/dsdt.asl +++ b/src/mainboard/asus/m4a78-em/dsdt.asl @@ -836,9 +836,9 @@ DefinitionBlock ( * -none- * * The _PTS control method is executed at the beginning of the sleep process - * for S1-S5. The sleeping value is passed to the _PTS control method. This + * for S1-S5. The sleeping value is passed to the _PTS control method. This * control method may be executed a relatively long time before entering the - * sleep state and the OS may abort the operation without notification to + * sleep state and the OS may abort the operation without notification to * the ACPI driver. This method cannot modify the configuration or power * state of any device in the system. */ diff --git a/src/mainboard/asus/m4a785-m/dsdt.asl b/src/mainboard/asus/m4a785-m/dsdt.asl index 1a88d5b..7b1eddb 100644 --- a/src/mainboard/asus/m4a785-m/dsdt.asl +++ b/src/mainboard/asus/m4a785-m/dsdt.asl @@ -836,9 +836,9 @@ DefinitionBlock ( * -none- * * The _PTS control method is executed at the beginning of the sleep process - * for S1-S5. The sleeping value is passed to the _PTS control method. This + * for S1-S5. The sleeping value is passed to the _PTS control method. This * control method may be executed a relatively long time before entering the - * sleep state and the OS may abort the operation without notification to + * sleep state and the OS may abort the operation without notification to * the ACPI driver. This method cannot modify the configuration or power * state of any device in the system. */ diff --git a/src/mainboard/asus/m4a785t-m/dsdt.asl b/src/mainboard/asus/m4a785t-m/dsdt.asl index 6adb8ca..21ffca3 100644 --- a/src/mainboard/asus/m4a785t-m/dsdt.asl +++ b/src/mainboard/asus/m4a785t-m/dsdt.asl @@ -836,9 +836,9 @@ DefinitionBlock ( * -none- * * The _PTS control method is executed at the beginning of the sleep process - * for S1-S5. The sleeping value is passed to the _PTS control method. This + * for S1-S5. The sleeping value is passed to the _PTS control method. This * control method may be executed a relatively long time before entering the - * sleep state and the OS may abort the operation without notification to + * sleep state and the OS may abort the operation without notification to * the ACPI driver. This method cannot modify the configuration or power * state of any device in the system. */ diff --git a/src/mainboard/asus/m5a88-v/dsdt.asl b/src/mainboard/asus/m5a88-v/dsdt.asl index e1d517f..7e4dc5a 100644 --- a/src/mainboard/asus/m5a88-v/dsdt.asl +++ b/src/mainboard/asus/m5a88-v/dsdt.asl @@ -831,9 +831,9 @@ DefinitionBlock ( * -none- * * The _PTS control method is executed at the beginning of the sleep process - * for S1-S5. The sleeping value is passed to the _PTS control method. This + * for S1-S5. The sleeping value is passed to the _PTS control method. This * control method may be executed a relatively long time before entering the - * sleep state and the OS may abort the operation without notification to + * sleep state and the OS may abort the operation without notification to * the ACPI driver. This method cannot modify the configuration or power * state of any device in the system. */ diff --git a/src/mainboard/avalue/eax-785e/dsdt.asl b/src/mainboard/avalue/eax-785e/dsdt.asl index 81504ef..ce6f1c1 100644 --- a/src/mainboard/avalue/eax-785e/dsdt.asl +++ b/src/mainboard/avalue/eax-785e/dsdt.asl @@ -831,9 +831,9 @@ DefinitionBlock ( * -none- * * The _PTS control method is executed at the beginning of the sleep process - * for S1-S5. The sleeping value is passed to the _PTS control method. This + * for S1-S5. The sleeping value is passed to the _PTS control method. This * control method may be executed a relatively long time before entering the - * sleep state and the OS may abort the operation without notification to + * sleep state and the OS may abort the operation without notification to * the ACPI driver. This method cannot modify the configuration or power * state of any device in the system. */ diff --git a/src/mainboard/bap/ode_e20XX/acpi/sleep.asl b/src/mainboard/bap/ode_e20XX/acpi/sleep.asl index dc3cc49..1225a62 100644 --- a/src/mainboard/bap/ode_e20XX/acpi/sleep.asl +++ b/src/mainboard/bap/ode_e20XX/acpi/sleep.asl @@ -26,9 +26,9 @@ Name(WKST,Package(){Zero, Zero}) * -none- * * The _PTS control method is executed at the beginning of the sleep process -* for S1-S5. The sleeping value is passed to the _PTS control method. This +* for S1-S5. The sleeping value is passed to the _PTS control method. This * control method may be executed a relatively long time before entering the -* sleep state and the OS may abort the operation without notification to +* sleep state and the OS may abort the operation without notification to * the ACPI driver. This method cannot modify the configuration or power * state of any device in the system. */ diff --git a/src/mainboard/biostar/am1ml/acpi/sleep.asl b/src/mainboard/biostar/am1ml/acpi/sleep.asl index dc3cc49..1225a62 100644 --- a/src/mainboard/biostar/am1ml/acpi/sleep.asl +++ b/src/mainboard/biostar/am1ml/acpi/sleep.asl @@ -26,9 +26,9 @@ Name(WKST,Package(){Zero, Zero}) * -none- * * The _PTS control method is executed at the beginning of the sleep process -* for S1-S5. The sleeping value is passed to the _PTS control method. This +* for S1-S5. The sleeping value is passed to the _PTS control method. This * control method may be executed a relatively long time before entering the -* sleep state and the OS may abort the operation without notification to +* sleep state and the OS may abort the operation without notification to * the ACPI driver. This method cannot modify the configuration or power * state of any device in the system. */ diff --git a/src/mainboard/elmex/pcm205400/acpi/sleep.asl b/src/mainboard/elmex/pcm205400/acpi/sleep.asl index b3fd07e..d7cf365 100644 --- a/src/mainboard/elmex/pcm205400/acpi/sleep.asl +++ b/src/mainboard/elmex/pcm205400/acpi/sleep.asl @@ -26,9 +26,9 @@ Name(WKST,Package(){Zero, Zero}) * -none- * * The _PTS control method is executed at the beginning of the sleep process -* for S1-S5. The sleeping value is passed to the _PTS control method. This +* for S1-S5. The sleeping value is passed to the _PTS control method. This * control method may be executed a relatively long time before entering the -* sleep state and the OS may abort the operation without notification to +* sleep state and the OS may abort the operation without notification to * the ACPI driver. This method cannot modify the configuration or power * state of any device in the system. */ diff --git a/src/mainboard/gigabyte/ma785gm/dsdt.asl b/src/mainboard/gigabyte/ma785gm/dsdt.asl index 3c53579..950eeea 100644 --- a/src/mainboard/gigabyte/ma785gm/dsdt.asl +++ b/src/mainboard/gigabyte/ma785gm/dsdt.asl @@ -836,9 +836,9 @@ DefinitionBlock ( * -none- * * The _PTS control method is executed at the beginning of the sleep process - * for S1-S5. The sleeping value is passed to the _PTS control method. This + * for S1-S5. The sleeping value is passed to the _PTS control method. This * control method may be executed a relatively long time before entering the - * sleep state and the OS may abort the operation without notification to + * sleep state and the OS may abort the operation without notification to * the ACPI driver. This method cannot modify the configuration or power * state of any device in the system. */ diff --git a/src/mainboard/gigabyte/ma785gmt/dsdt.asl b/src/mainboard/gigabyte/ma785gmt/dsdt.asl index 3c53579..950eeea 100644 --- a/src/mainboard/gigabyte/ma785gmt/dsdt.asl +++ b/src/mainboard/gigabyte/ma785gmt/dsdt.asl @@ -836,9 +836,9 @@ DefinitionBlock ( * -none- * * The _PTS control method is executed at the beginning of the sleep process - * for S1-S5. The sleeping value is passed to the _PTS control method. This + * for S1-S5. The sleeping value is passed to the _PTS control method. This * control method may be executed a relatively long time before entering the - * sleep state and the OS may abort the operation without notification to + * sleep state and the OS may abort the operation without notification to * the ACPI driver. This method cannot modify the configuration or power * state of any device in the system. */ diff --git a/src/mainboard/gigabyte/ma78gm/dsdt.asl b/src/mainboard/gigabyte/ma78gm/dsdt.asl index 3c53579..950eeea 100644 --- a/src/mainboard/gigabyte/ma78gm/dsdt.asl +++ b/src/mainboard/gigabyte/ma78gm/dsdt.asl @@ -836,9 +836,9 @@ DefinitionBlock ( * -none- * * The _PTS control method is executed at the beginning of the sleep process - * for S1-S5. The sleeping value is passed to the _PTS control method. This + * for S1-S5. The sleeping value is passed to the _PTS control method. This * control method may be executed a relatively long time before entering the - * sleep state and the OS may abort the operation without notification to + * sleep state and the OS may abort the operation without notification to * the ACPI driver. This method cannot modify the configuration or power * state of any device in the system. */ diff --git a/src/mainboard/gizmosphere/gizmo/acpi/sleep.asl b/src/mainboard/gizmosphere/gizmo/acpi/sleep.asl index bb68f7a..edfb4f3 100644 --- a/src/mainboard/gizmosphere/gizmo/acpi/sleep.asl +++ b/src/mainboard/gizmosphere/gizmo/acpi/sleep.asl @@ -27,9 +27,9 @@ Name(WKST,Package(){Zero, Zero}) * -none- * * The _PTS control method is executed at the beginning of the sleep process -* for S1-S5. The sleeping value is passed to the _PTS control method. This +* for S1-S5. The sleeping value is passed to the _PTS control method. This * control method may be executed a relatively long time before entering the -* sleep state and the OS may abort the operation without notification to +* sleep state and the OS may abort the operation without notification to * the ACPI driver. This method cannot modify the configuration or power * state of any device in the system. */ diff --git a/src/mainboard/gizmosphere/gizmo2/acpi/sleep.asl b/src/mainboard/gizmosphere/gizmo2/acpi/sleep.asl index dc3cc49..1225a62 100644 --- a/src/mainboard/gizmosphere/gizmo2/acpi/sleep.asl +++ b/src/mainboard/gizmosphere/gizmo2/acpi/sleep.asl @@ -26,9 +26,9 @@ Name(WKST,Package(){Zero, Zero}) * -none- * * The _PTS control method is executed at the beginning of the sleep process -* for S1-S5. The sleeping value is passed to the _PTS control method. This +* for S1-S5. The sleeping value is passed to the _PTS control method. This * control method may be executed a relatively long time before entering the -* sleep state and the OS may abort the operation without notification to +* sleep state and the OS may abort the operation without notification to * the ACPI driver. This method cannot modify the configuration or power * state of any device in the system. */ diff --git a/src/mainboard/hp/abm/acpi/sleep.asl b/src/mainboard/hp/abm/acpi/sleep.asl index dc3cc49..1225a62 100644 --- a/src/mainboard/hp/abm/acpi/sleep.asl +++ b/src/mainboard/hp/abm/acpi/sleep.asl @@ -26,9 +26,9 @@ Name(WKST,Package(){Zero, Zero}) * -none- * * The _PTS control method is executed at the beginning of the sleep process -* for S1-S5. The sleeping value is passed to the _PTS control method. This +* for S1-S5. The sleeping value is passed to the _PTS control method. This * control method may be executed a relatively long time before entering the -* sleep state and the OS may abort the operation without notification to +* sleep state and the OS may abort the operation without notification to * the ACPI driver. This method cannot modify the configuration or power * state of any device in the system. */ diff --git a/src/mainboard/hp/pavilion_m6_1035dx/acpi/sleep.asl b/src/mainboard/hp/pavilion_m6_1035dx/acpi/sleep.asl index d3a2ce2..947a2f2 100644 --- a/src/mainboard/hp/pavilion_m6_1035dx/acpi/sleep.asl +++ b/src/mainboard/hp/pavilion_m6_1035dx/acpi/sleep.asl @@ -26,9 +26,9 @@ Name(WKST,Package(){Zero, Zero}) * -none- * * The _PTS control method is executed at the beginning of the sleep process -* for S1-S5. The sleeping value is passed to the _PTS control method. This +* for S1-S5. The sleeping value is passed to the _PTS control method. This * control method may be executed a relatively long time before entering the -* sleep state and the OS may abort the operation without notification to +* sleep state and the OS may abort the operation without notification to * the ACPI driver. This method cannot modify the configuration or power * state of any device in the system. */ diff --git a/src/mainboard/iei/kino-780am2-fam10/dsdt.asl b/src/mainboard/iei/kino-780am2-fam10/dsdt.asl index a8bb5da..360ebb3 100644 --- a/src/mainboard/iei/kino-780am2-fam10/dsdt.asl +++ b/src/mainboard/iei/kino-780am2-fam10/dsdt.asl @@ -836,9 +836,9 @@ DefinitionBlock ( * -none- * * The _PTS control method is executed at the beginning of the sleep process - * for S1-S5. The sleeping value is passed to the _PTS control method. This + * for S1-S5. The sleeping value is passed to the _PTS control method. This * control method may be executed a relatively long time before entering the - * sleep state and the OS may abort the operation without notification to + * sleep state and the OS may abort the operation without notification to * the ACPI driver. This method cannot modify the configuration or power * state of any device in the system. */ diff --git a/src/mainboard/jetway/nf81-t56n-lf/acpi/sleep.asl b/src/mainboard/jetway/nf81-t56n-lf/acpi/sleep.asl index b3fd07e..d7cf365 100644 --- a/src/mainboard/jetway/nf81-t56n-lf/acpi/sleep.asl +++ b/src/mainboard/jetway/nf81-t56n-lf/acpi/sleep.asl @@ -26,9 +26,9 @@ Name(WKST,Package(){Zero, Zero}) * -none- * * The _PTS control method is executed at the beginning of the sleep process -* for S1-S5. The sleeping value is passed to the _PTS control method. This +* for S1-S5. The sleeping value is passed to the _PTS control method. This * control method may be executed a relatively long time before entering the -* sleep state and the OS may abort the operation without notification to +* sleep state and the OS may abort the operation without notification to * the ACPI driver. This method cannot modify the configuration or power * state of any device in the system. */ diff --git a/src/mainboard/jetway/pa78vm5/dsdt.asl b/src/mainboard/jetway/pa78vm5/dsdt.asl index dc401bb..fa952ec 100644 --- a/src/mainboard/jetway/pa78vm5/dsdt.asl +++ b/src/mainboard/jetway/pa78vm5/dsdt.asl @@ -836,9 +836,9 @@ DefinitionBlock ( * -none- * * The _PTS control method is executed at the beginning of the sleep process - * for S1-S5. The sleeping value is passed to the _PTS control method. This + * for S1-S5. The sleeping value is passed to the _PTS control method. This * control method may be executed a relatively long time before entering the - * sleep state and the OS may abort the operation without notification to + * sleep state and the OS may abort the operation without notification to * the ACPI driver. This method cannot modify the configuration or power * state of any device in the system. */ diff --git a/src/mainboard/kontron/kt690/dsdt.asl b/src/mainboard/kontron/kt690/dsdt.asl index 05b6855..910be7a 100644 --- a/src/mainboard/kontron/kt690/dsdt.asl +++ b/src/mainboard/kontron/kt690/dsdt.asl @@ -798,9 +798,9 @@ DefinitionBlock ( * -none- * * The _PTS control method is executed at the beginning of the sleep process - * for S1-S5. The sleeping value is passed to the _PTS control method. This + * for S1-S5. The sleeping value is passed to the _PTS control method. This * control method may be executed a relatively long time before entering the - * sleep state and the OS may abort the operation without notification to + * sleep state and the OS may abort the operation without notification to * the ACPI driver. This method cannot modify the configuration or power * state of any device in the system. */ diff --git a/src/mainboard/lenovo/g505s/acpi/sleep.asl b/src/mainboard/lenovo/g505s/acpi/sleep.asl index d3a2ce2..947a2f2 100644 --- a/src/mainboard/lenovo/g505s/acpi/sleep.asl +++ b/src/mainboard/lenovo/g505s/acpi/sleep.asl @@ -26,9 +26,9 @@ Name(WKST,Package(){Zero, Zero}) * -none- * * The _PTS control method is executed at the beginning of the sleep process -* for S1-S5. The sleeping value is passed to the _PTS control method. This +* for S1-S5. The sleeping value is passed to the _PTS control method. This * control method may be executed a relatively long time before entering the -* sleep state and the OS may abort the operation without notification to +* sleep state and the OS may abort the operation without notification to * the ACPI driver. This method cannot modify the configuration or power * state of any device in the system. */ diff --git a/src/mainboard/lippert/frontrunner-af/dsdt.asl b/src/mainboard/lippert/frontrunner-af/dsdt.asl index 1106988..94612e6 100644 --- a/src/mainboard/lippert/frontrunner-af/dsdt.asl +++ b/src/mainboard/lippert/frontrunner-af/dsdt.asl @@ -825,9 +825,9 @@ DefinitionBlock ( * -none- * * The _PTS control method is executed at the beginning of the sleep process - * for S1-S5. The sleeping value is passed to the _PTS control method. This + * for S1-S5. The sleeping value is passed to the _PTS control method. This * control method may be executed a relatively long time before entering the - * sleep state and the OS may abort the operation without notification to + * sleep state and the OS may abort the operation without notification to * the ACPI driver. This method cannot modify the configuration or power * state of any device in the system. */ diff --git a/src/mainboard/lippert/toucan-af/dsdt.asl b/src/mainboard/lippert/toucan-af/dsdt.asl index 72cb821..338ba52 100644 --- a/src/mainboard/lippert/toucan-af/dsdt.asl +++ b/src/mainboard/lippert/toucan-af/dsdt.asl @@ -825,9 +825,9 @@ DefinitionBlock ( * -none- * * The _PTS control method is executed at the beginning of the sleep process - * for S1-S5. The sleeping value is passed to the _PTS control method. This + * for S1-S5. The sleeping value is passed to the _PTS control method. This * control method may be executed a relatively long time before entering the - * sleep state and the OS may abort the operation without notification to + * sleep state and the OS may abort the operation without notification to * the ACPI driver. This method cannot modify the configuration or power * state of any device in the system. */ diff --git a/src/mainboard/msi/ms7721/acpi/sleep.asl b/src/mainboard/msi/ms7721/acpi/sleep.asl index 1d553bd..3250f5e 100644 --- a/src/mainboard/msi/ms7721/acpi/sleep.asl +++ b/src/mainboard/msi/ms7721/acpi/sleep.asl @@ -26,9 +26,9 @@ Name(WKST,Package(){Zero, Zero}) * -none- * * The _PTS control method is executed at the beginning of the sleep process -* for S1-S5. The sleeping value is passed to the _PTS control method. This +* for S1-S5. The sleeping value is passed to the _PTS control method. This * control method may be executed a relatively long time before entering the -* sleep state and the OS may abort the operation without notification to +* sleep state and the OS may abort the operation without notification to * the ACPI driver. This method cannot modify the configuration or power * state of any device in the system. */ diff --git a/src/mainboard/pcengines/apu1/acpi/sleep.asl b/src/mainboard/pcengines/apu1/acpi/sleep.asl index b3fd07e..d7cf365 100644 --- a/src/mainboard/pcengines/apu1/acpi/sleep.asl +++ b/src/mainboard/pcengines/apu1/acpi/sleep.asl @@ -26,9 +26,9 @@ Name(WKST,Package(){Zero, Zero}) * -none- * * The _PTS control method is executed at the beginning of the sleep process -* for S1-S5. The sleeping value is passed to the _PTS control method. This +* for S1-S5. The sleeping value is passed to the _PTS control method. This * control method may be executed a relatively long time before entering the -* sleep state and the OS may abort the operation without notification to +* sleep state and the OS may abort the operation without notification to * the ACPI driver. This method cannot modify the configuration or power * state of any device in the system. */ diff --git a/src/mainboard/siemens/sitemp_g1p1/acpi/event.asl b/src/mainboard/siemens/sitemp_g1p1/acpi/event.asl index c2ac98c..b659c6c 100644 --- a/src/mainboard/siemens/sitemp_g1p1/acpi/event.asl +++ b/src/mainboard/siemens/sitemp_g1p1/acpi/event.asl @@ -39,9 +39,9 @@ Name(WKST,Package(){Zero, Zero}) * -none- * * The _PTS control method is executed at the beginning of the sleep process -* for S1-S5. The sleeping value is passed to the _PTS control method. This +* for S1-S5. The sleeping value is passed to the _PTS control method. This * control method may be executed a relatively long time before entering the -* sleep state and the OS may abort the operation without notification to +* sleep state and the OS may abort the operation without notification to * the ACPI driver. This method cannot modify the configuration or power * state of any device in the system. */ diff --git a/src/mainboard/supermicro/h8qgi/dsdt.asl b/src/mainboard/supermicro/h8qgi/dsdt.asl index 9106b83..3b0e326 100644 --- a/src/mainboard/supermicro/h8qgi/dsdt.asl +++ b/src/mainboard/supermicro/h8qgi/dsdt.asl @@ -869,9 +869,9 @@ DefinitionBlock ( * -none- * * The _PTS control method is executed at the beginning of the sleep process - * for S1-S5. The sleeping value is passed to the _PTS control method. This + * for S1-S5. The sleeping value is passed to the _PTS control method. This * control method may be executed a relatively long time before entering the - * sleep state and the OS may abort the operation without notification to + * sleep state and the OS may abort the operation without notification to * the ACPI driver. This method cannot modify the configuration or power * state of any device in the system. */ diff --git a/src/mainboard/supermicro/h8scm/dsdt.asl b/src/mainboard/supermicro/h8scm/dsdt.asl index 0a8cbdd..d1a9268 100644 --- a/src/mainboard/supermicro/h8scm/dsdt.asl +++ b/src/mainboard/supermicro/h8scm/dsdt.asl @@ -869,9 +869,9 @@ DefinitionBlock ( * -none- * * The _PTS control method is executed at the beginning of the sleep process - * for S1-S5. The sleeping value is passed to the _PTS control method. This + * for S1-S5. The sleeping value is passed to the _PTS control method. This * control method may be executed a relatively long time before entering the - * sleep state and the OS may abort the operation without notification to + * sleep state and the OS may abort the operation without notification to * the ACPI driver. This method cannot modify the configuration or power * state of any device in the system. */ diff --git a/src/mainboard/supermicro/h8scm_fam10/dsdt.asl b/src/mainboard/supermicro/h8scm_fam10/dsdt.asl index 5268be7..3dfb2dd 100644 --- a/src/mainboard/supermicro/h8scm_fam10/dsdt.asl +++ b/src/mainboard/supermicro/h8scm_fam10/dsdt.asl @@ -854,9 +854,9 @@ DefinitionBlock ( * -none- * * The _PTS control method is executed at the beginning of the sleep process - * for S1-S5. The sleeping value is passed to the _PTS control method. This + * for S1-S5. The sleeping value is passed to the _PTS control method. This * control method may be executed a relatively long time before entering the - * sleep state and the OS may abort the operation without notification to + * sleep state and the OS may abort the operation without notification to * the ACPI driver. This method cannot modify the configuration or power * state of any device in the system. */ diff --git a/src/mainboard/technexion/tim5690/dsdt.asl b/src/mainboard/technexion/tim5690/dsdt.asl index 14d0bfa..2819db3 100644 --- a/src/mainboard/technexion/tim5690/dsdt.asl +++ b/src/mainboard/technexion/tim5690/dsdt.asl @@ -798,9 +798,9 @@ DefinitionBlock ( * -none- * * The _PTS control method is executed at the beginning of the sleep process - * for S1-S5. The sleeping value is passed to the _PTS control method. This + * for S1-S5. The sleeping value is passed to the _PTS control method. This * control method may be executed a relatively long time before entering the - * sleep state and the OS may abort the operation without notification to + * sleep state and the OS may abort the operation without notification to * the ACPI driver. This method cannot modify the configuration or power * state of any device in the system. */ diff --git a/src/mainboard/technexion/tim8690/dsdt.asl b/src/mainboard/technexion/tim8690/dsdt.asl index e831750..af5c9a6 100644 --- a/src/mainboard/technexion/tim8690/dsdt.asl +++ b/src/mainboard/technexion/tim8690/dsdt.asl @@ -798,9 +798,9 @@ DefinitionBlock ( * -none- * * The _PTS control method is executed at the beginning of the sleep process - * for S1-S5. The sleeping value is passed to the _PTS control method. This + * for S1-S5. The sleeping value is passed to the _PTS control method. This * control method may be executed a relatively long time before entering the - * sleep state and the OS may abort the operation without notification to + * sleep state and the OS may abort the operation without notification to * the ACPI driver. This method cannot modify the configuration or power * state of any device in the system. */ diff --git a/src/mainboard/tyan/s8226/dsdt.asl b/src/mainboard/tyan/s8226/dsdt.asl index 56471e3..6c26ab6 100644 --- a/src/mainboard/tyan/s8226/dsdt.asl +++ b/src/mainboard/tyan/s8226/dsdt.asl @@ -869,9 +869,9 @@ DefinitionBlock ( * -none- * * The _PTS control method is executed at the beginning of the sleep process - * for S1-S5. The sleeping value is passed to the _PTS control method. This + * for S1-S5. The sleeping value is passed to the _PTS control method. This * control method may be executed a relatively long time before entering the - * sleep state and the OS may abort the operation without notification to + * sleep state and the OS may abort the operation without notification to * the ACPI driver. This method cannot modify the configuration or power * state of any device in the system. */

1 0

New patch to review for coreboot: amd-based mainboards: Fix devicetree hudson comments
by Marshall Dawson 16 Dec '16

16 Dec '16

Marshall Dawson (marshalldawson3rd(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/17904 -gerrit commit 23581f806664e80321ae13889d4cf7f54a3c3560 Author: Marshall Dawson <marshalldawson3rd(a)gmail.com> Date: Fri Dec 16 12:53:53 2016 -0500 amd-based mainboards: Fix devicetree hudson comments Make the ending comment associated with "chip ...hudson" match the appropriate directory name. Change-Id: I5e0d6d41a2e3f963760aad08ed6108acac5b66b3 Signed-off-by: Marshall Dawson <marshalldawson3rd(a)gmail.com> --- src/mainboard/amd/bettong/devicetree.cb | 2 +- src/mainboard/amd/gardenia/devicetree.cb | 2 +- src/mainboard/amd/olivehill/devicetree.cb | 2 +- src/mainboard/amd/parmer/devicetree.cb | 2 +- src/mainboard/amd/thatcher/devicetree.cb | 2 +- src/mainboard/asrock/imb-a180/devicetree.cb | 2 +- src/mainboard/asus/f2a85-m/devicetree.cb | 2 +- src/mainboard/asus/f2a85-m_le/devicetree.cb | 2 +- src/mainboard/bap/ode_e20XX/devicetree.cb | 2 +- src/mainboard/biostar/am1ml/devicetree.cb | 2 +- src/mainboard/gizmosphere/gizmo2/devicetree.cb | 2 +- src/mainboard/hp/abm/devicetree.cb | 2 +- src/mainboard/hp/pavilion_m6_1035dx/devicetree.cb | 2 +- src/mainboard/lenovo/g505s/devicetree.cb | 2 +- src/mainboard/msi/ms7721/devicetree.cb | 2 +- 15 files changed, 15 insertions(+), 15 deletions(-) diff --git a/src/mainboard/amd/bettong/devicetree.cb b/src/mainboard/amd/bettong/devicetree.cb index e490423..a259e92 100644 --- a/src/mainboard/amd/bettong/devicetree.cb +++ b/src/mainboard/amd/bettong/devicetree.cb @@ -54,7 +54,7 @@ chip northbridge/amd/pi/00660F01/root_complex #device pci 14.2 on end # HDA 0x4383 device pci 14.3 on end # LPC 0x439d device pci 14.7 on end # SD - end #chip southbridge/amd/hudson + end #chip southbridge/amd/pi/hudson device pci 18.0 on end device pci 18.1 on end diff --git a/src/mainboard/amd/gardenia/devicetree.cb b/src/mainboard/amd/gardenia/devicetree.cb index a7573b1..be070d0 100644 --- a/src/mainboard/amd/gardenia/devicetree.cb +++ b/src/mainboard/amd/gardenia/devicetree.cb @@ -48,7 +48,7 @@ chip northbridge/amd/pi/00670F00/root_complex end # SM device pci 14.3 on end # LPC 0x790e device pci 14.7 on end # SD - end #chip southbridge/amd/hudson + end #chip southbridge/amd/pi/hudson device pci 18.0 on end device pci 18.1 on end diff --git a/src/mainboard/amd/olivehill/devicetree.cb b/src/mainboard/amd/olivehill/devicetree.cb index 5f0d09a..a027db9 100644 --- a/src/mainboard/amd/olivehill/devicetree.cb +++ b/src/mainboard/amd/olivehill/devicetree.cb @@ -53,7 +53,7 @@ chip northbridge/amd/agesa/family16kb/root_complex device pci 14.2 on end # HDA 0x4383 device pci 14.3 on end # LPC 0x439d device pci 14.7 on end # SD - end #chip southbridge/amd/hudson + end #chip southbridge/amd/agesa/hudson device pci 18.0 on end device pci 18.1 on end diff --git a/src/mainboard/amd/parmer/devicetree.cb b/src/mainboard/amd/parmer/devicetree.cb index 29d0a53..da0028c 100644 --- a/src/mainboard/amd/parmer/devicetree.cb +++ b/src/mainboard/amd/parmer/devicetree.cb @@ -64,7 +64,7 @@ chip northbridge/amd/agesa/family15tn/root_complex device pci 15.1 off end # PCIe 1 device pci 15.2 off end # PCIe 2 device pci 15.3 off end # PCIe 3 - end #chip southbridge/amd/hudson + end #chip southbridge/amd/agesa/hudson device pci 18.0 on end device pci 18.1 on end diff --git a/src/mainboard/amd/thatcher/devicetree.cb b/src/mainboard/amd/thatcher/devicetree.cb index e7715fa..cee1608 100644 --- a/src/mainboard/amd/thatcher/devicetree.cb +++ b/src/mainboard/amd/thatcher/devicetree.cb @@ -79,7 +79,7 @@ chip northbridge/amd/agesa/family15tn/root_complex device pci 15.1 off end # PCIe 1 device pci 15.2 off end # PCIe 2 device pci 15.3 off end # PCIe 3 - end #chip southbridge/amd/hudson + end #chip southbridge/amd/agesa/hudson device pci 18.0 on end device pci 18.1 on end diff --git a/src/mainboard/asrock/imb-a180/devicetree.cb b/src/mainboard/asrock/imb-a180/devicetree.cb index e769420..238326d 100644 --- a/src/mainboard/asrock/imb-a180/devicetree.cb +++ b/src/mainboard/asrock/imb-a180/devicetree.cb @@ -94,7 +94,7 @@ chip northbridge/amd/agesa/family16kb/root_complex end # w83627uhg end # LPC 0x439d device pci 14.7 on end # SD - end #chip southbridge/amd/hudson + end #chip southbridge/amd/agesa/hudson device pci 18.0 on end device pci 18.1 on end diff --git a/src/mainboard/asus/f2a85-m/devicetree.cb b/src/mainboard/asus/f2a85-m/devicetree.cb index 6b728d5..d942445 100644 --- a/src/mainboard/asus/f2a85-m/devicetree.cb +++ b/src/mainboard/asus/f2a85-m/devicetree.cb @@ -113,7 +113,7 @@ chip northbridge/amd/agesa/family15tn/root_complex device pci 15.2 off end # unused device pci 15.3 off end # unused - end #chip southbridge/amd/hudson + end #chip southbridge/amd/agesa/hudson device pci 18.0 on end device pci 18.1 on end diff --git a/src/mainboard/asus/f2a85-m_le/devicetree.cb b/src/mainboard/asus/f2a85-m_le/devicetree.cb index c209942..b9873d0 100644 --- a/src/mainboard/asus/f2a85-m_le/devicetree.cb +++ b/src/mainboard/asus/f2a85-m_le/devicetree.cb @@ -111,7 +111,7 @@ chip northbridge/amd/agesa/family15tn/root_complex device pci 15.1 on end # PCIe 1 onboard gigabit device pci 15.2 off end # unused device pci 15.3 off end # unused - end #chip southbridge/amd/hudson + end #chip southbridge/amd/agesa/hudson device pci 18.0 on end device pci 18.1 on end diff --git a/src/mainboard/bap/ode_e20XX/devicetree.cb b/src/mainboard/bap/ode_e20XX/devicetree.cb index 32ca9cf..959912e 100644 --- a/src/mainboard/bap/ode_e20XX/devicetree.cb +++ b/src/mainboard/bap/ode_e20XX/devicetree.cb @@ -102,7 +102,7 @@ chip northbridge/amd/agesa/family16kb/root_complex end # f81866d end #LPC device pci 14.7 on end # SD - end #chip southbridge/amd/hudson + end #chip southbridge/amd/agesa/hudson device pci 18.0 on end device pci 18.1 on end diff --git a/src/mainboard/biostar/am1ml/devicetree.cb b/src/mainboard/biostar/am1ml/devicetree.cb index 9b31bc6..59fb593 100644 --- a/src/mainboard/biostar/am1ml/devicetree.cb +++ b/src/mainboard/biostar/am1ml/devicetree.cb @@ -97,7 +97,7 @@ chip northbridge/amd/agesa/family16kb/root_complex end #superio/ite/it8728f end #device pci 14.3 # LPC device pci 14.7 off end # SD - end #chip southbridge/amd/hudson + end #chip southbridge/amd/agesa/hudson device pci 18.0 on end device pci 18.1 on end diff --git a/src/mainboard/gizmosphere/gizmo2/devicetree.cb b/src/mainboard/gizmosphere/gizmo2/devicetree.cb index 625e033..896c03d 100644 --- a/src/mainboard/gizmosphere/gizmo2/devicetree.cb +++ b/src/mainboard/gizmosphere/gizmo2/devicetree.cb @@ -46,7 +46,7 @@ chip northbridge/amd/agesa/family16kb/root_complex device pci 14.2 on end # HDA 0x4383 device pci 14.3 on end # LPC 0x439d device pci 14.7 on end # SD - end #chip southbridge/amd/hudson + end #chip southbridge/amd/agesa/hudson device pci 18.0 on end device pci 18.1 on end diff --git a/src/mainboard/hp/abm/devicetree.cb b/src/mainboard/hp/abm/devicetree.cb index 5ff52aa..c9ca1d8 100644 --- a/src/mainboard/hp/abm/devicetree.cb +++ b/src/mainboard/hp/abm/devicetree.cb @@ -74,7 +74,7 @@ chip northbridge/amd/agesa/family16kb/root_complex device pci 14.7 off end # SD device pci 16.0 on end # USB device pci 16.2 on end # USB - end #chip southbridge/amd/hudson + end #chip southbridge/amd/agesa/hudson device pci 18.0 on end device pci 18.1 on end diff --git a/src/mainboard/hp/pavilion_m6_1035dx/devicetree.cb b/src/mainboard/hp/pavilion_m6_1035dx/devicetree.cb index a27b551..75d45d3 100644 --- a/src/mainboard/hp/pavilion_m6_1035dx/devicetree.cb +++ b/src/mainboard/hp/pavilion_m6_1035dx/devicetree.cb @@ -65,7 +65,7 @@ chip northbridge/amd/agesa/family15tn/root_complex device pci 15.1 off end # PCIe 1 device pci 15.2 off end # PCIe 2 device pci 15.3 off end # PCIe 3 - end #chip southbridge/amd/hudson + end #chip southbridge/amd/agesa/hudson device pci 18.0 on end device pci 18.1 on end diff --git a/src/mainboard/lenovo/g505s/devicetree.cb b/src/mainboard/lenovo/g505s/devicetree.cb index 1a9da04..a1cf338 100644 --- a/src/mainboard/lenovo/g505s/devicetree.cb +++ b/src/mainboard/lenovo/g505s/devicetree.cb @@ -69,7 +69,7 @@ chip northbridge/amd/agesa/family15rl/root_complex device pci 15.1 off end # PCIe 1 device pci 15.2 off end # PCIe 2 device pci 15.3 off end # PCIe 3 - end #chip southbridge/amd/hudson + end #chip southbridge/amd/agesa/hudson device pci 18.0 on end device pci 18.1 on end diff --git a/src/mainboard/msi/ms7721/devicetree.cb b/src/mainboard/msi/ms7721/devicetree.cb index ced99f8..d46eb84 100644 --- a/src/mainboard/msi/ms7721/devicetree.cb +++ b/src/mainboard/msi/ms7721/devicetree.cb @@ -155,7 +155,7 @@ chip northbridge/amd/agesa/family15tn/root_complex device pci 15.2 off end # unused device pci 15.3 off end # unused - end #chip southbridge/amd/hudson + end #chip southbridge/amd/agesa/hudson device pci 18.0 on end device pci 18.1 on end

1 0

New patch to review for coreboot: amd/mainboard: Clean up bettong, gardenia USB todos
by Marshall Dawson 16 Dec '16

16 Dec '16

Marshall Dawson (marshalldawson3rd(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/17903 -gerrit commit 1b9b05d516e2f80cf756eb23adfe459a782d2858 Author: Marshall Dawson <marshalldawson3rd(a)gmail.com> Date: Fri Dec 16 12:44:13 2016 -0500 amd/mainboard: Clean up bettong, gardenia USB todos An incorrect board name was propagated over various generations of mainboards. Correct the comments for these. Addressing the todo items will come in a later patch. Change-Id: I4abd028fee5087955a7b6ba8d38f99c8207d24b4 Signed-off-by: Marshall Dawson <marshalldawson3rd(a)gmail.com> --- src/mainboard/amd/bettong/acpi/usb_oc.asl | 2 +- src/mainboard/amd/gardenia/acpi/usb_oc.asl | 91 +----------------------------- 2 files changed, 2 insertions(+), 91 deletions(-) diff --git a/src/mainboard/amd/bettong/acpi/usb_oc.asl b/src/mainboard/amd/bettong/acpi/usb_oc.asl index f7b8cfc..9dae253 100644 --- a/src/mainboard/amd/bettong/acpi/usb_oc.asl +++ b/src/mainboard/amd/bettong/acpi/usb_oc.asl @@ -37,7 +37,7 @@ Name(UOM9, 6) /* USB Overcurrent GPEs */ -#if 0 /* TODO: Update for Olivehill */ +#if 0 /* TODO: Update for Bettong */ Method(UCOC, 0) { Sleep(20) Store(0x13,CMTI) diff --git a/src/mainboard/amd/gardenia/acpi/usb_oc.asl b/src/mainboard/amd/gardenia/acpi/usb_oc.asl index f7b8cfc..9566bc4 100644 --- a/src/mainboard/amd/gardenia/acpi/usb_oc.asl +++ b/src/mainboard/amd/gardenia/acpi/usb_oc.asl @@ -36,93 +36,4 @@ Name(UOM8, 6) Name(UOM9, 6) /* USB Overcurrent GPEs */ - -#if 0 /* TODO: Update for Olivehill */ -Method(UCOC, 0) { - Sleep(20) - Store(0x13,CMTI) - Store(0,GPSL) -} - -/* USB Port 0 overcurrent uses Gpm 0 */ -If(LLessEqual(UOM0,9)) { - Scope (\_GPE) { - Method (_L13) { - } - } -} - -/* USB Port 1 overcurrent uses Gpm 1 */ -If (LLessEqual(UOM1,9)) { - Scope (\_GPE) { - Method (_L14) { - } - } -} - -/* USB Port 2 overcurrent uses Gpm 2 */ -If (LLessEqual(UOM2,9)) { - Scope (\_GPE) { - Method (_L15) { - } - } -} - -/* USB Port 3 overcurrent uses Gpm 3 */ -If (LLessEqual(UOM3,9)) { - Scope (\_GPE) { - Method (_L16) { - } - } -} - -/* USB Port 4 overcurrent uses Gpm 4 */ -If (LLessEqual(UOM4,9)) { - Scope (\_GPE) { - Method (_L19) { - } - } -} - -/* USB Port 5 overcurrent uses Gpm 5 */ -If (LLessEqual(UOM5,9)) { - Scope (\_GPE) { - Method (_L1A) { - } - } -} - -/* USB Port 6 overcurrent uses Gpm 6 */ -If (LLessEqual(UOM6,9)) { - Scope (\_GPE) { - /* Method (_L1C) { */ - Method (_L06) { - } - } -} - -/* USB Port 7 overcurrent uses Gpm 7 */ -If (LLessEqual(UOM7,9)) { - Scope (\_GPE) { - /* Method (_L1D) { */ - Method (_L07) { - } - } -} - -/* USB Port 8 overcurrent uses Gpm 8 */ -If (LLessEqual(UOM8,9)) { - Scope (\_GPE) { - Method (_L17) { - } - } -} - -/* USB Port 9 overcurrent uses Gpm 9 */ -If (LLessEqual(UOM9,9)) { - Scope (\_GPE) { - Method (_L0E) { - } - } -} -#endif +/* TODO: Update for Gardenia */

1 0

New patch to review for coreboot: motherboard/amd: Clean up bettong, gardenia makefiles
by Marshall Dawson 16 Dec '16

16 Dec '16

Marshall Dawson (marshalldawson3rd(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/17902 -gerrit commit 8a8d53b31677f6a16c6a11077301b287712e8a3a Author: Marshall Dawson <marshalldawson3rd(a)gmail.com> Date: Fri Dec 16 12:01:24 2016 -0500 motherboard/amd: Clean up bettong, gardenia makefiles Declutter the conditional building of fchec.c. Use the CONFIG setting directly instead of ifeq (). Change-Id: I6d3721764e66e5615a639c1979d60ff1291b5d33 Signed-off-by: Marshall Dawson <marshalldawson3rd(a)gmail.com> --- src/mainboard/amd/bettong/Makefile.inc | 4 +--- src/mainboard/amd/gardenia/Makefile.inc | 4 +--- 2 files changed, 2 insertions(+), 6 deletions(-) diff --git a/src/mainboard/amd/bettong/Makefile.inc b/src/mainboard/amd/bettong/Makefile.inc index 99159e8..cfcc9c0 100644 --- a/src/mainboard/amd/bettong/Makefile.inc +++ b/src/mainboard/amd/bettong/Makefile.inc @@ -19,7 +19,5 @@ romstage-y += boardid.c ramstage-y += BiosCallOuts.c ramstage-y += OemCustomize.c -ifeq ($(CONFIG_HUDSON_IMC_FWM), y) -ramstage-y += fchec.c -endif +ramstage-$(CONFIG_HUDSON_IMC_FWM) += fchec.c ramstage-y += boardid.c diff --git a/src/mainboard/amd/gardenia/Makefile.inc b/src/mainboard/amd/gardenia/Makefile.inc index 0994a70..72cd042 100644 --- a/src/mainboard/amd/gardenia/Makefile.inc +++ b/src/mainboard/amd/gardenia/Makefile.inc @@ -18,6 +18,4 @@ romstage-y += OemCustomize.c ramstage-y += BiosCallOuts.c ramstage-y += OemCustomize.c -ifeq ($(CONFIG_HUDSON_IMC_FWM), y) -ramstage-y += fchec.c -endif +ramstage-$(CONFIG_HUDSON_IMC_FWM) += fchec.c

1 0

Patch set updated for coreboot: amd/gardenia: Update ACPI routing
by Marshall Dawson 16 Dec '16

16 Dec '16

Marshall Dawson (marshalldawson3rd(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/17849 -gerrit commit ecd27d5ecff56bee2fd54055a3d600c37f7814e1 Author: Marshall Dawson <marshalldawson3rd(a)gmail.com> Date: Sun Oct 16 16:14:57 2016 -0400 amd/gardenia: Update ACPI routing Reduce the Bettong devices and match up the comments to the northbridge. Original-Signed-off-by: Marshall Dawson <marshalldawson3rd(a)gmail.com> Original-Reviewed-by: Marc Jones <marcj303(a)gmail.com> (cherry picked from e7c38571be6406453640d671210b2074a91f162e) Change-Id: I53adff741f5cf2bd75c37421949bd30f214f5692 Signed-off-by: Marshall Dawson <marshalldawson3rd(a)gmail.com> --- src/mainboard/amd/gardenia/acpi/routing.asl | 109 ++++------------------------ 1 file changed, 14 insertions(+), 95 deletions(-) diff --git a/src/mainboard/amd/gardenia/acpi/routing.asl b/src/mainboard/amd/gardenia/acpi/routing.asl index bcf0e90..51cb612 100644 --- a/src/mainboard/amd/gardenia/acpi/routing.asl +++ b/src/mainboard/amd/gardenia/acpi/routing.asl @@ -1,7 +1,7 @@ /* * This file is part of the coreboot project. * - * Copyright (C) 2015 Advanced Micro Devices, Inc. + * Copyright (C) 2015, 2016 Advanced Micro Devices, Inc. * Copyright (C) 2013 Sage Electronic Engineering, LLC * * This program is free software; you can redistribute it and/or modify @@ -25,9 +25,9 @@ DefinitionBlock ("DSDT.AML","DSDT",0x01,"XXXXXX","XXXXXXXX",0x00010001 /* Routing is in System Bus scope */ Name(PR0, Package(){ /* NB devices */ - /* Bus 0, Dev 0 - F16 Host Controller */ + /* Bus 0, Dev 0 - F15 Host Controller */ - /* Bus 0, Dev 1 - PCI Bridge for Internal Graphics(IGP) */ + /* Bus 0, Dev 1, Func 0 - PCI Bridge for Internal Graphics(IGP) */ /* Bus 0, Dev 1, Func 1 - HDMI Audio Controller */ Package(){0x0001FFFF, 0, INTB, 0 }, Package(){0x0001FFFF, 1, INTC, 0 }, @@ -40,24 +40,17 @@ Name(PR0, Package(){ Package(){0x0002FFFF, 3, INTB, 0 }, /* FCH devices */ - /* Bus 0, Dev 20 - F0:SMBus/ACPI,F2:HDAudio;F3:LPC;F7:SD */ + /* Bus 0, Dev 20 - F0:SMBus/ACPI;F3:LPC;F7:SD */ Package(){0x0014FFFF, 0, INTA, 0 }, Package(){0x0014FFFF, 1, INTB, 0 }, Package(){0x0014FFFF, 2, INTC, 0 }, Package(){0x0014FFFF, 3, INTD, 0 }, - /* Bus 0, Dev 18, 19, 22 Func 0 - USB: OHCI */ - /* Bus 0, Dev 18, 19, 22 Func 1 - USB: EHCI */ + /* Bus 0, Dev 18 Func 0 - USB: EHCI */ Package(){0x0012FFFF, 0, INTC, 0 }, Package(){0x0012FFFF, 1, INTB, 0 }, - Package(){0x0013FFFF, 0, INTC, 0 }, - Package(){0x0013FFFF, 1, INTB, 0 }, - - Package(){0x0016FFFF, 0, INTC, 0 }, - Package(){0x0016FFFF, 1, INTB, 0 }, - - /* Bus 0, Dev 10 - USB: XHCI func 0, 1 */ + /* Bus 0, Dev 10 Func 0 - USB: xHCI */ Package(){0x0010FFFF, 0, INTC, 0 }, Package(){0x0010FFFF, 1, INTB, 0 }, @@ -80,59 +73,27 @@ Name(APR0, Package(){ Package(){0x0002FFFF, 2, 0, 46 }, Package(){0x0002FFFF, 3, 0, 47 }, - Package(){0x0003FFFF, 0, 0, 49 }, - Package(){0x0003FFFF, 1, 0, 50 }, - Package(){0x0003FFFF, 2, 0, 51 }, - Package(){0x0003FFFF, 3, 0, 52 }, - - Package(){0x0008FFFF, 0, 0, 35 }, - Package(){0x0008FFFF, 1, 0, 32 }, - Package(){0x0008FFFF, 2, 0, 33 }, - Package(){0x0008FFFF, 3, 0, 34 }, - /* SB devices in APIC mode */ - /* Bus 0, Dev 20 - F0:SMBus/ACPI,F2:HDAudio;F3:LPC;F7:SD */ + /* Bus 0, Dev 20 - F0:SMBus/ACPI;F3:LPC;F7:SD */ Package(){0x0014FFFF, 0, 0, 16 }, Package(){0x0014FFFF, 1, 0, 17 }, Package(){0x0014FFFF, 2, 0, 18 }, Package(){0x0014FFFF, 3, 0, 19 }, - /* Bus 0, Dev 18, 19, 22 Func 0 - USB: OHCI */ - /* Bus 0, Dev 18, 19, 22 Func 1 - USB: EHCI */ + /* Bus 0, Dev 18 Func 0 - USB: EHCI */ Package(){0x0012FFFF, 0, 0, 18 }, Package(){0x0012FFFF, 1, 0, 17 }, - Package(){0x0013FFFF, 0, 0, 18 }, - Package(){0x0013FFFF, 1, 0, 17 }, - - /* Bus 0, Dev 10 - USB: XHCI func 0, 1 */ + /* Bus 0, Dev 10 Func 0 - USB: xHCI */ Package(){0x0010FFFF, 0, 0, 18}, Package(){0x0010FFFF, 1, 0, 17}, /* Bus 0, Dev 17 - SATA controller */ Package(){0x0011FFFF, 0, 0, 19 }, - - /* Bus 0, Dev 9, Func 2 - HDAudio */ - Package(){0x0009FFFF, 0, 0, 39 }, - Package(){0x0009FFFF, 1, 0, 36 }, - Package(){0x0009FFFF, 2, 0, 37 }, - Package(){0x0009FFFF, 3, 0, 38 }, }) -Name(PS2, Package(){ - Package(){0x0000FFFF, 0, INTC, 0 }, - Package(){0x0000FFFF, 1, INTD, 0 }, - Package(){0x0000FFFF, 2, INTA, 0 }, - Package(){0x0000FFFF, 3, INTB, 0 }, -}) -Name(APS2, Package(){ - Package(){0x0000FFFF, 0, 0, 18 }, - Package(){0x0000FFFF, 1, 0, 19 }, - Package(){0x0000FFFF, 2, 0, 16 }, - Package(){0x0000FFFF, 3, 0, 17 }, -}) -/* GFX */ +/* GPP 0 */ Name(PS4, Package(){ Package(){0x0000FFFF, 0, INTA, 0 }, Package(){0x0000FFFF, 1, INTB, 0 }, @@ -147,7 +108,7 @@ Name(APS4, Package(){ Package(){0x0000FFFF, 3, 0, 27 }, }) -/* GPP 0 */ +/* GPP 1 */ Name(PS5, Package(){ Package(){0x0000FFFF, 0, INTB, 0 }, Package(){0x0000FFFF, 1, INTC, 0 }, @@ -161,7 +122,7 @@ Name(APS5, Package(){ Package(){0x0000FFFF, 3, 0, 31 }, }) -/* GPP 1 */ +/* GPP 2 */ Name(PS6, Package(){ Package(){0x0000FFFF, 0, INTC, 0 }, Package(){0x0000FFFF, 1, INTD, 0 }, @@ -175,7 +136,7 @@ Name(APS6, Package(){ Package(){0x0000FFFF, 3, 0, 35 }, }) -/* GPP 2 */ +/* GPP 3 */ Name(PS7, Package(){ Package(){0x0000FFFF, 0, INTD, 0 }, Package(){0x0000FFFF, 1, INTA, 0 }, @@ -189,7 +150,7 @@ Name(APS7, Package(){ Package(){0x0000FFFF, 3, 0, 39 }, }) -/* GPP 3 */ +/* GPP 4 */ Name(PS8, Package(){ Package(){0x0000FFFF, 0, INTA, 0 }, Package(){0x0000FFFF, 1, INTB, 0 }, @@ -202,45 +163,3 @@ Name(APS8, Package(){ Package(){0x0000FFFF, 2, 0, 42 }, Package(){0x0000FFFF, 3, 0, 43 }, }) - -/* GFX 2 */ -Name(PSA, Package(){ - Package(){0x0000FFFF, 0, INTA, 0 }, - Package(){0x0000FFFF, 1, INTB, 0 }, - Package(){0x0000FFFF, 2, INTC, 0 }, - Package(){0x0000FFFF, 3, INTD, 0 }, -}) -Name(APSA, Package(){ - Package(){0x0000FFFF, 0, 0, 52 }, - Package(){0x0000FFFF, 1, 0, 53 }, - Package(){0x0000FFFF, 2, 0, 54 }, - Package(){0x0000FFFF, 3, 0, 55 }, -}) - -/* GFX 3 */ -Name(PSB, Package(){ - Package(){0x0000FFFF, 0, INTA, 0 }, - Package(){0x0000FFFF, 1, INTB, 0 }, - Package(){0x0000FFFF, 2, INTC, 0 }, - Package(){0x0000FFFF, 3, INTD, 0 }, -}) -Name(APSB, Package(){ - Package(){0x0000FFFF, 0, 0, 27 }, - Package(){0x0000FFFF, 1, 0, 24 }, - Package(){0x0000FFFF, 2, 0, 25 }, - Package(){0x0000FFFF, 3, 0, 26 }, -}) - -/* GFX 4 */ -Name(PSC, Package(){ - Package(){0x0000FFFF, 0, INTA, 0 }, - Package(){0x0000FFFF, 1, INTB, 0 }, - Package(){0x0000FFFF, 2, INTC, 0 }, - Package(){0x0000FFFF, 3, INTD, 0 }, -}) -Name(APSC, Package(){ - Package(){0x0000FFFF, 0, 0, 31 }, - Package(){0x0000FFFF, 1, 0, 28 }, - Package(){0x0000FFFF, 2, 0, 29 }, - Package(){0x0000FFFF, 3, 0, 30 }, -})

1 0

Patch set updated for coreboot: amd/gardenia: Add AHB bridge registers in ACPI
by Marshall Dawson 16 Dec '16

16 Dec '16

Marshall Dawson (marshalldawson3rd(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/17848 -gerrit commit c1cf651f49e13e8a8c05d8ccf8598411c51c0f0c Author: Marshall Dawson <marshalldawson3rd(a)gmail.com> Date: Wed Oct 19 19:28:15 2016 -0400 amd/gardenia: Add AHB bridge registers in ACPI Add the region used by the A-Link to AHB configuration registers. Original-Signed-off-by: Marshall Dawson <marshalldawson3rd(a)gmail.com> Original-Reviewed-by: Marc Jones <marcj303(a)gmail.com> (squashed from 2c8dafdf44cf1a84cbc25e8aa381c04c160ee705 and 3c755f70ffa36c0fc92a1da0e3f5f877c8dc9e8b) Change-Id: I7398452c6e70b4545e16398f3fec157f2f30293a Signed-off-by: Marshall Dawson <marshalldawson3rd(a)gmail.com> --- src/mainboard/amd/gardenia/acpi/carrizo_fch.asl | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/src/mainboard/amd/gardenia/acpi/carrizo_fch.asl b/src/mainboard/amd/gardenia/acpi/carrizo_fch.asl index 2b9df3b..954ab43 100644 --- a/src/mainboard/amd/gardenia/acpi/carrizo_fch.asl +++ b/src/mainboard/amd/gardenia/acpi/carrizo_fch.asl @@ -13,6 +13,20 @@ * GNU General Public License for more details. */ +Device(AAHB) { + Name(_HID,"AAHB0000") + Name(_UID,0x0) + Name(_CRS, ResourceTemplate() + { + IRQ(Edge, ActiveHigh, Exclusive) {7} + Memory32Fixed(ReadWrite, 0xFEDC0000, 0x2000) + }) + + Method (_STA, 0x0, NotSerialized) { + Return (0x0F) + } +} + Device(GPIO) { Name (_HID, "AMD0030") Name (_CID, "AMD0030")

1 0

Patch set updated for coreboot: amd/gardenia: Add I2C devices to ACPI
by Marshall Dawson 16 Dec '16

16 Dec '16

Marshall Dawson (marshalldawson3rd(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/17847 -gerrit commit 2c864212b406f1bedc5f3f854f6119475b7c4606 Author: Marshall Dawson <marshalldawson3rd(a)gmail.com> Date: Wed Oct 19 18:32:27 2016 -0400 amd/gardenia: Add I2C devices to ACPI Add the missing two I2C controllers. Original-Signed-off-by: Marshall Dawson <marshalldawson3rd(a)gmail.com> Original-Reviewed-by: Marc Jones <marcj303(a)gmail.com> (cherry picked from 0be00a96b9eb40c959a422a5ca4773d2353d244d) Change-Id: I3ea74a6c0472711102b19a7ca0209aaeeeb2d601 Signed-off-by: Marshall Dawson <marshalldawson3rd(a)gmail.com> --- src/mainboard/amd/gardenia/acpi/carrizo_fch.asl | 26 +++++++++++++++++++++++++ 1 file changed, 26 insertions(+) diff --git a/src/mainboard/amd/gardenia/acpi/carrizo_fch.asl b/src/mainboard/amd/gardenia/acpi/carrizo_fch.asl index a177306..2b9df3b 100644 --- a/src/mainboard/amd/gardenia/acpi/carrizo_fch.asl +++ b/src/mainboard/amd/gardenia/acpi/carrizo_fch.asl @@ -77,3 +77,29 @@ Device(I2CB) Return (0x0F) } } + +Device(I2CC) { + Name(_HID,"AMD0010") + Name(_UID,0x0) + Name(_CRS, ResourceTemplate() { + IRQ(Edge, ActiveHigh, Exclusive) {6} + Memory32Fixed(ReadWrite, 0xFEDC4000, 0x1000) + }) + + Method (_STA, 0x0, NotSerialized) { + Return (0x0F) + } +} + +Device(I2CD) +{ + Name(_HID,"AMD0010") + Name(_UID,0x1) + Name(_CRS, ResourceTemplate() { + IRQ(Edge, ActiveHigh, Exclusive) {14} + Memory32Fixed(ReadWrite, 0xFEDC5000, 0x1000) + }) + Method (_STA, 0x0, NotSerialized) { + Return (0x0F) + } +}

1 0

Patch set updated for coreboot: amd/gardenia: Clean up GPIO ASL
by Marshall Dawson 16 Dec '16

16 Dec '16

Marshall Dawson (marshalldawson3rd(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/17846 -gerrit commit f5d7e94c1bb85cf6a574b6a6a9a40582080c7483 Author: Marshall Dawson <marshalldawson3rd(a)gmail.com> Date: Thu Oct 20 12:43:15 2016 -0400 amd/gardenia: Clean up GPIO ASL Remove the unused Name field. Its previous design generates an FWTS error and a recommendation for changing it to Serialized. Original-Signed-off-by: Marshall Dawson <marshalldawson3rd(a)gmail.com> Original-Reviewed-by: Marc Jones <marcj303(a)gmail.com> (cherry picked from commit 1d970f1aa16c647e56a08c83f5719041882a2fc0) Change-Id: I27748a4f84286e80043f516564ef64350ef3fef9 Signed-off-by: Marshall Dawson <marshalldawson3rd(a)gmail.com> --- src/mainboard/amd/gardenia/acpi/carrizo_fch.asl | 30 +++++-------------------- 1 file changed, 6 insertions(+), 24 deletions(-) diff --git a/src/mainboard/amd/gardenia/acpi/carrizo_fch.asl b/src/mainboard/amd/gardenia/acpi/carrizo_fch.asl index 79f5420..a177306 100644 --- a/src/mainboard/amd/gardenia/acpi/carrizo_fch.asl +++ b/src/mainboard/amd/gardenia/acpi/carrizo_fch.asl @@ -1,7 +1,7 @@ /* * This file is part of the coreboot project. * - * Copyright (C) 2015 Advanced Micro Devices, Inc. + * Copyright (C) 2015-2016 Advanced Micro Devices, Inc. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -18,31 +18,13 @@ Device(GPIO) { Name (_CID, "AMD0030") Name(_UID, 0) - Method (_CRS, 0x0, NotSerialized) { - Name (RBUF, ResourceTemplate () { - // - // Interrupt resource. In this example, banks 0 & 1 share the same - // interrupt to the parent controller and similarly banks 2 & 3. - // - // N.B. The definition below is chosen for an arbitrary - // test platform. It needs to be changed to reflect the hardware - // configuration of the actual platform - // - Interrupt(ResourceConsumer, Level, ActiveLow, Shared, , , ) {7} - - // - // Memory resource. The definition below is chosen for an arbitrary - // test platform. It needs to be changed to reflect the hardware - // configuration of the actual platform. - // - Memory32Fixed(ReadWrite, 0xFED81500, 0x300) - }) - - Return (RBUF) - } + Name(_CRS, ResourceTemplate() { + Interrupt(ResourceConsumer, Level, ActiveLow, Shared, , , ) {7} + Memory32Fixed(ReadWrite, 0xFED81500, 0x300) + }) Method (_STA, 0x0, NotSerialized) { - Return (0x0F) + Return (0x0F) } }

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Patch set updated for coreboot: amd/gardenia: Enable LPC decodes
by Marshall Dawson 16 Dec '16

16 Dec '16

Marshall Dawson (marshalldawson3rd(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/17227 -gerrit commit 6a9108dc5a1bc157a86356ae3a4aecb385bfc10b Author: Marshall Dawson <marshalldawson3rd(a)gmail.com> Date: Tue Oct 11 14:19:07 2016 -0400 amd/gardenia: Enable LPC decodes Turn on LPC decoding in romstage. Original-Signed-off-by: Marshall Dawson <marshalldawson3rd(a)gmail.com> Original-Reviewed-by: Marc Jones <marcj303(a)gmail.com> (cherry picked from commit 5d9dae5a1fdab1bf6c418dc7e6de28069bd342dc) Change-Id: I937eb5c5b6c6a9f7a13ebd0bec7fcc8d789427ce Signed-off-by: Marc Jones <marcj303(a)gmail.com> --- src/mainboard/amd/gardenia/romstage.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/mainboard/amd/gardenia/romstage.c b/src/mainboard/amd/gardenia/romstage.c index c3e2aa4..eca9d3b 100644 --- a/src/mainboard/amd/gardenia/romstage.c +++ b/src/mainboard/amd/gardenia/romstage.c @@ -1,7 +1,7 @@ /* * This file is part of the coreboot project. * - * Copyright (C) 2015 Advanced Micro Devices, Inc. + * Copyright (C) 2015-2016 Advanced Micro Devices, Inc. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -33,8 +33,8 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) #endif amd_initmmio(); - hudson_lpc_port80(); + hudson_lpc_decode(); if (!cpu_init_detectedx && boot_cpu()) { post_code(0x30);

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coreboot-gerrit December 2016