the following patch was just integrated into master:
commit 634899ca498fd91d4e0a742d5ff3c6c4864542d1
Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com>
Date: Mon Mar 23 14:22:22 2015 +0200
resource: Adjust memory resources high earlier
Do this to avoid reporting incorrect resource window in the logs.
Change-Id: Icb7978deeb54f0ec6c29473ce9034fe44b6d7602
Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com>
Reviewed-on: http://review.coreboot.org/8890
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin(a)chromium.org>
See http://review.coreboot.org/8890 for details.
-gerrit
the following patch was just integrated into master:
commit e6a9290fa2991d001a59fb1f4bc29cf8b94734f0
Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com>
Date: Mon Mar 23 19:37:38 2015 +0200
resource: Enhance resource reporting
Remove some redundancy in both source code and console output.
Change-Id: I32350966de7af30b3ca4ac747fe3bf623ea9484b
Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com>
Reviewed-on: http://review.coreboot.org/8889
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin(a)chromium.org>
See http://review.coreboot.org/8889 for details.
-gerrit
the following patch was just integrated into master:
commit 134b6162673733bb457adf3350148646c3821be1
Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com>
Date: Mon Mar 23 19:58:23 2015 +0200
resource: Report correct secondary resource window
Once a bridge window resource is allocated, it becomes the base and limit
for any resource on the secondary bus. Upper limit was incorrectly
reported in the log while assigning secondary resources.
Change-Id: I69f0a02aae6d13f77aaa2dace924b8970b23edad
Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com>
Reviewed-on: http://review.coreboot.org/8888
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin(a)chromium.org>
See http://review.coreboot.org/8888 for details.
-gerrit
the following patch was just integrated into master:
commit ade2c5e8b78f2a9948f5ca93bc795dc8bac41afa
Author: Jonathan A. Kollasch <jakllsch(a)kollasch.net>
Date: Sat Jan 31 14:18:55 2015 -0600
winent/mb6047: symbolic arguments for acpi_create_madt_lapic_nmis()
Change-Id: I19af5f36a55d6c2906d603e940b3aadd2ca97140
Signed-off-by: Jonathan A. Kollasch <jakllsch(a)kollasch.net>
Reviewed-on: http://review.coreboot.org/8317
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi(a)google.com>
See http://review.coreboot.org/8317 for details.
-gerrit
the following patch was just integrated into master:
commit fd1f514fe4aa8d7c82b618c44555dbfb23180752
Author: David Imhoff <dimhoff_devel(a)xs4all.nl>
Date: Sun May 3 16:57:38 2015 +0200
drivers/spi/stmicro: Rename N25Q256A to N25Q256
The 'A' indicates the production process(64 nm). All other chips from
the same family leave this out.
TEST=Build and booted on Minnowboard Max
Change-Id: I21e6c01de5d547bbc2252e679a001948e7ab752c
Signed-off-by: David Imhoff <dimhoff_devel(a)xs4all.nl>
Reviewed-on: http://review.coreboot.org/10078
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi(a)google.com>
Reviewed-by: Paul Menzel <paulepanter(a)users.sourceforge.net>
See http://review.coreboot.org/10078 for details.
-gerrit
the following patch was just integrated into master:
commit a42edc30e95dad8bbdd289b3c60e2cc6909db315
Author: David Imhoff <dimhoff_devel(a)xs4all.nl>
Date: Sun May 3 16:05:41 2015 +0200
drivers/spi/stmicro: Add '.op_erase' for N25Q256
'.op_erase' was not specified for this chip. Set it to sub sector
erase(CMD_M25PXX_SSE). Adjust page/sector size for sub sector erase
to work.
TEST=Untested, due to lack of hardware.
Change-Id: Icc2748fbd3afeb56693e1c17d97eb490fba67064
Signed-off-by: David Imhoff <dimhoff_devel(a)xs4all.nl>
Reviewed-on: http://review.coreboot.org/10077
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi(a)google.com>
See http://review.coreboot.org/10077 for details.
-gerrit
the following patch was just integrated into master:
commit 61295b52903e832face3a3bfa39ab39d79b70ef1
Author: David Imhoff <dimhoff_devel(a)xs4all.nl>
Date: Sun May 3 16:02:56 2015 +0200
drivers/spi/stmicro: Add N25Q064 support
N25Q064 is similar to N25Q128.
TEST=Build and booted twice on Minnowboard Max
Change-Id: Iec105f8b81f619846cf40b40042cc59150b81149
Signed-off-by: David Imhoff <dimhoff_devel(a)xs4all.nl>
Reviewed-on: http://review.coreboot.org/10076
Reviewed-by: Paul Menzel <paulepanter(a)users.sourceforge.net>
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi(a)google.com>
See http://review.coreboot.org/10076 for details.
-gerrit
the following patch was just integrated into master:
commit 52148b77851d5a3f310149dc182ae1e170ca3eee
Author: David Imhoff <dimhoff_devel(a)xs4all.nl>
Date: Sun May 3 15:56:33 2015 +0200
intel/fsp_baytrail: Fix SPI debugging
Fix compiler error's due to type mismatch. This is broken since commit
bde6d309 (x86: Change MMIO addr in readN(addr)/writeN(addr, val) to
pointer).
TEST=Build with CONFIG_DEBUG_SPI_FLASH=y and booted on Minnowboard Max
Change-Id: Id3d448e219716135897f381a73d416ff34036118
Signed-off-by: David Imhoff <dimhoff_devel(a)xs4all.nl>
Reviewed-on: http://review.coreboot.org/10075
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi(a)google.com>
Reviewed-by: Paul Menzel <paulepanter(a)users.sourceforge.net>
See http://review.coreboot.org/10075 for details.
-gerrit