Patrick Georgi (pgeorgi(a)google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/9548
-gerrit
commit accc398c76526743db1c5e5ed71d2a5c884cdb75
Author: David Hendricks <dhendrix(a)chromium.org>
Date: Fri Nov 7 13:48:49 2014 -0800
veyron*: use gpio_base2_value() in board_id()
This makes board_id() use the generic gpio_base2_value() function
to obtain the value of the board ID straps.
BUG=none
BRANCH=none
TEST=tested on pinky
Change-Id: I15c1310889b989c34638fd342011aef5fe7bcec1
Signed-off-by: Patrick Georgi <pgeorgi(a)chromium.org>
Original-Commit-Id: fcbb8a6998a66531326afe16b232395d49fee64d
Original-Signed-off-by: David Hendricks <dhendrix(a)chromium.org>
Original-Change-Id: I5847bf1c5b26bcaf7d36103f31bb255b31ff8185
Original-Reviewed-on: https://chromium-review.googlesource.com/228370
Original-Reviewed-by: Julius Werner <jwerner(a)chromium.org>
---
src/mainboard/google/veyron_jerry/boardid.c | 10 ++--------
src/mainboard/google/veyron_pinky/boardid.c | 10 ++--------
2 files changed, 4 insertions(+), 16 deletions(-)
diff --git a/src/mainboard/google/veyron_jerry/boardid.c b/src/mainboard/google/veyron_jerry/boardid.c
index 8d3e183..66de276 100644
--- a/src/mainboard/google/veyron_jerry/boardid.c
+++ b/src/mainboard/google/veyron_jerry/boardid.c
@@ -25,17 +25,11 @@
uint8_t board_id(void)
{
static int id = -1;
- static const gpio_t pins[] = {[3] = GPIO(2, A, 7), [2] = GPIO(2, A, 2),
+ static gpio_t pins[] = {[3] = GPIO(2, A, 7), [2] = GPIO(2, A, 2),
[1] = GPIO(2, A, 1), [0] = GPIO(2, A, 0)}; /* GPIO2_A0 is LSB */
if (id < 0) {
- int i;
-
- id = 0;
- for (i = 0; i < ARRAY_SIZE(pins); i++) {
- gpio_input(pins[i]);
- id |= gpio_get(pins[i]) << i;
- }
+ id = gpio_base2_value(pins, ARRAY_SIZE(pins));
printk(BIOS_SPEW, "Board ID: %d.\n", id);
}
diff --git a/src/mainboard/google/veyron_pinky/boardid.c b/src/mainboard/google/veyron_pinky/boardid.c
index 8d3e183..66de276 100644
--- a/src/mainboard/google/veyron_pinky/boardid.c
+++ b/src/mainboard/google/veyron_pinky/boardid.c
@@ -25,17 +25,11 @@
uint8_t board_id(void)
{
static int id = -1;
- static const gpio_t pins[] = {[3] = GPIO(2, A, 7), [2] = GPIO(2, A, 2),
+ static gpio_t pins[] = {[3] = GPIO(2, A, 7), [2] = GPIO(2, A, 2),
[1] = GPIO(2, A, 1), [0] = GPIO(2, A, 0)}; /* GPIO2_A0 is LSB */
if (id < 0) {
- int i;
-
- id = 0;
- for (i = 0; i < ARRAY_SIZE(pins); i++) {
- gpio_input(pins[i]);
- id |= gpio_get(pins[i]) << i;
- }
+ id = gpio_base2_value(pins, ARRAY_SIZE(pins));
printk(BIOS_SPEW, "Board ID: %d.\n", id);
}
Patrick Georgi (pgeorgi(a)google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/9552
-gerrit
commit 288a1327a5907619a95ec7f1d4b83ecaacfa43b6
Author: David Hendricks <dhendrix(a)chromium.org>
Date: Thu Nov 13 15:51:00 2014 -0800
veyron*: select VIRTUAL_DEV_SWITCH
Like most newer Chromebooks, Pinky and Jerry do not have physical
dev switches.
BUG=chrome-os-partner:33395
BRANCH=none
TEST=built and booted on Pinky, crossystem prints a valid value for
devsw_cur instead of an error.
Change-Id: If97ffa6f99eb31c05915f3ee82aaf6bd252d29e4
Signed-off-by: Patrick Georgi <pgeorgi(a)chromium.org>
Original-Commit-Id: db302d7286d3e7df9442928dac1d611a2c103163
Original-Change-Id: I186518a59699d293c7938221b3ae45b27361c255
Original-Signed-off-by: David Hendricks <dhendrix(a)chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/229680
Original-Reviewed-by: Julius Werner <jwerner(a)chromium.org>
---
src/mainboard/google/veyron_jerry/Kconfig | 1 +
src/mainboard/google/veyron_pinky/Kconfig | 1 +
2 files changed, 2 insertions(+)
diff --git a/src/mainboard/google/veyron_jerry/Kconfig b/src/mainboard/google/veyron_jerry/Kconfig
index d76e044..273b36e 100644
--- a/src/mainboard/google/veyron_jerry/Kconfig
+++ b/src/mainboard/google/veyron_jerry/Kconfig
@@ -33,6 +33,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy
select MAINBOARD_HAS_BOOTBLOCK_INIT
select HAVE_HARD_RESET
select RETURN_FROM_VERSTAGE
+ select VIRTUAL_DEV_SWITCH
config MAINBOARD_DIR
string
diff --git a/src/mainboard/google/veyron_pinky/Kconfig b/src/mainboard/google/veyron_pinky/Kconfig
index daef732..810eea3 100644
--- a/src/mainboard/google/veyron_pinky/Kconfig
+++ b/src/mainboard/google/veyron_pinky/Kconfig
@@ -33,6 +33,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy
select MAINBOARD_HAS_BOOTBLOCK_INIT
select HAVE_HARD_RESET
select RETURN_FROM_VERSTAGE
+ select VIRTUAL_DEV_SWITCH
config MAINBOARD_DIR
string
Patrick Georgi (pgeorgi(a)google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/9551
-gerrit
commit f382d734a171b09928923319ea0fa9ec6fadfb79
Author: Julius Werner <jwerner(a)chromium.org>
Date: Mon Nov 10 21:37:12 2014 -0800
veyron: Adapt to new board revisions
This patch adds support for Pinky rev3 (board ID 2) and Jerry rev2: the
power button GPIO changed polarity to low, the 5V_DRV pin for USB power
was moved to the AP again (welcome back!), and the EMMC_RST_L is now
finally on a port with the right IO voltage so we don't need any weird
pull-up tricks anymore. Since there are very few Jerry rev1s around,
we'll just move it over to the new code directly without introducing
board ID differences (also, because I have no idea how they stuffed it
this time... is this one actually called rev2?).
BRANCH=None
BUG=None
TEST=Still boots on my Pinky rev2, though that doesn't say much.
Change-Id: Id11044cedcaac5a4ae07e696893823925107a6db
Signed-off-by: Patrick Georgi <pgeorgi(a)chromium.org>
Original-Commit-Id: 55344a9518ff04edcef01bcd40817e9e4b613717
Original-Change-Id: Iddee360fbda357ecde4ae5fbb5c3a01fe0c22474
Original-Signed-off-by: Julius Werner <jwerner(a)chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/229010
Original-Reviewed-by: Lin Huang <hl(a)rock-chips.com>
Original-Reviewed-by: David Hendricks <dhendrix(a)chromium.org>
---
src/mainboard/google/veyron_jerry/chromeos.c | 2 +-
src/mainboard/google/veyron_jerry/mainboard.c | 8 ++------
src/mainboard/google/veyron_pinky/chromeos.c | 3 ++-
src/mainboard/google/veyron_pinky/mainboard.c | 15 +++++++++++++--
4 files changed, 18 insertions(+), 10 deletions(-)
diff --git a/src/mainboard/google/veyron_jerry/chromeos.c b/src/mainboard/google/veyron_jerry/chromeos.c
index 68f72a0..6e6a855 100644
--- a/src/mainboard/google/veyron_jerry/chromeos.c
+++ b/src/mainboard/google/veyron_jerry/chromeos.c
@@ -67,7 +67,7 @@ void fill_lb_gpios(struct lb_gpios *gpios)
/* Power:GPIO active high */
gpios->gpios[count].port = GPIO_POWER.raw;
- gpios->gpios[count].polarity = ACTIVE_HIGH;
+ gpios->gpios[count].polarity = ACTIVE_LOW;
gpios->gpios[count].value = gpio_get(GPIO_POWER);
strncpy((char *)gpios->gpios[count].name, "power",
GPIO_MAX_NAME_LENGTH);
diff --git a/src/mainboard/google/veyron_jerry/mainboard.c b/src/mainboard/google/veyron_jerry/mainboard.c
index e6a90b9..c15c765 100644
--- a/src/mainboard/google/veyron_jerry/mainboard.c
+++ b/src/mainboard/google/veyron_jerry/mainboard.c
@@ -42,6 +42,7 @@ static void configure_usb(void)
{
gpio_output(GPIO(0, B, 3), 1); /* HOST1_PWR_EN */
gpio_output(GPIO(0, B, 4), 1); /* USBOTG_PWREN_H */
+ gpio_output(GPIO(7, C, 5), 1); /* 5V_DRV */
}
static void configure_sdmmc(void)
@@ -63,12 +64,7 @@ static void configure_emmc(void)
writel(IOMUX_EMMCPWREN, &rk3288_grf->iomux_emmcpwren);
writel(IOMUX_EMMCCMD, &rk3288_grf->iomux_emmccmd);
- /*
- * Use a pullup instead of a drive since the output is 3.3V and
- * really should be 1.8V (oops). The external pulldown will help
- * bring the voltage down if we only drive with a pullup here.
- */
- gpio_input_pullup(GPIO(7, B, 4)); /* EMMC_RST_L */
+ gpio_output(GPIO(2, B, 1), 1); /* EMMC_RST_L */
}
static void configure_codec(void)
diff --git a/src/mainboard/google/veyron_pinky/chromeos.c b/src/mainboard/google/veyron_pinky/chromeos.c
index dc224a5..8cfad3e 100644
--- a/src/mainboard/google/veyron_pinky/chromeos.c
+++ b/src/mainboard/google/veyron_pinky/chromeos.c
@@ -69,7 +69,8 @@ void fill_lb_gpios(struct lb_gpios *gpios)
/* Power:GPIO active high */
gpios->gpios[count].port = GPIO_POWER.raw;
- gpios->gpios[count].polarity = ACTIVE_HIGH;
+ gpios->gpios[count].polarity = board_id() > 1 ? ACTIVE_LOW :
+ ACTIVE_HIGH;
gpios->gpios[count].value = gpio_get(GPIO_POWER);
strncpy((char *)gpios->gpios[count].name, "power",
GPIO_MAX_NAME_LENGTH);
diff --git a/src/mainboard/google/veyron_pinky/mainboard.c b/src/mainboard/google/veyron_pinky/mainboard.c
index f891e21..2a88749 100644
--- a/src/mainboard/google/veyron_pinky/mainboard.c
+++ b/src/mainboard/google/veyron_pinky/mainboard.c
@@ -47,8 +47,11 @@ static void configure_usb(void)
case 0:
gpio_output(GPIO(7, B, 3), 1); /* 5V_DRV */
break;
+ case 1:
+ break; /* 5V_DRV moved to EC in rev2 */
default:
- break; /* 5V_DRV moved to EC after rev1 */
+ gpio_output(GPIO(7, C, 5), 1); /* 5V_DRV, again */
+ break;
}
}
@@ -79,12 +82,20 @@ static void configure_emmc(void)
writel(IOMUX_EMMCPWREN, &rk3288_grf->iomux_emmcpwren);
writel(IOMUX_EMMCCMD, &rk3288_grf->iomux_emmccmd);
+ switch (board_id()) {
+ case 0:
+ case 1:
/*
* Use a pullup instead of a drive since the output is 3.3V and
* really should be 1.8V (oops). The external pulldown will help
* bring the voltage down if we only drive with a pullup here.
*/
- gpio_input_pullup(GPIO(7, B, 4)); /* EMMC_RST_L */
+ gpio_input_pullup(GPIO(7, B, 4)); /* EMMC_RST_L */
+ break;
+ default:
+ gpio_output(GPIO(2, B, 1), 1); /* EMMC_RST_L */
+ break;
+ }
}
static void configure_codec(void)
Patrick Georgi (pgeorgi(a)google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/9550
-gerrit
commit 29ba83b04af951b6c3f276156d07e14388d2f654
Author: Julius Werner <jwerner(a)chromium.org>
Date: Mon Nov 10 19:53:45 2014 -0800
veyron_jerry: Port CPU overshoot prevention
This patch ports commit 567f616f (rk3288: slowly raise to max cpu
voltage to prevent overshoot) to Veyron_Jerry. It also fixes include
ordering and some comment grammar in the affected code.
BRANCH=None
BUG=chrome-os-partner:32716
TEST=None
Change-Id: I4ac14a38e4b3acc4926d4f51f409ff12d9c841cf
Signed-off-by: Patrick Georgi <pgeorgi(a)chromium.org>
Original-Commit-Id: 679014bc843788e8d4d5f5c7470ae76f8be5e942
Original-Change-Id: I9c0aba40ddd8a0852391df184034baa740d063df
Original-Signed-off-by: Julius Werner <jwerner(a)chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/228938
Original-Reviewed-by: David Hendricks <dhendrix(a)chromium.org>
---
src/mainboard/google/veyron_jerry/bootblock.c | 10 ++++++++--
src/mainboard/google/veyron_pinky/bootblock.c | 7 ++-----
2 files changed, 10 insertions(+), 7 deletions(-)
diff --git a/src/mainboard/google/veyron_jerry/bootblock.c b/src/mainboard/google/veyron_jerry/bootblock.c
index b34199d..30b00e1 100644
--- a/src/mainboard/google/veyron_jerry/bootblock.c
+++ b/src/mainboard/google/veyron_jerry/bootblock.c
@@ -20,6 +20,7 @@
#include <arch/io.h>
#include <bootblock_common.h>
+#include <delay.h>
#include <soc/clock.h>
#include <soc/i2c.h>
#include <soc/grf.h>
@@ -32,11 +33,16 @@
void bootblock_mainboard_init(void)
{
- /* cpu frequency will up to 1.8GHz, so the buck1 must up to 1.3v */
+ /* Up VDD_CPU (BUCK1) to 1.4V to support max CPU frequency (1.8GHz). */
setbits_le32(&rk3288_pmu->iomux_i2c0scl, IOMUX_I2C0SCL);
setbits_le32(&rk3288_pmu->iomux_i2c0sda, IOMUX_I2C0SDA);
i2c_init(PMIC_BUS, 400*KHz);
- rk808_configure_buck(PMIC_BUS, 1, 1300);
+
+ /* Slowly raise to max CPU voltage to prevent overshoot */
+ rk808_configure_buck(PMIC_BUS, 1, 1200);
+ udelay(175);/* Must wait for voltage to stabilize,2mV/us */
+ rk808_configure_buck(PMIC_BUS, 1, 1400);
+ udelay(100);/* Must wait for voltage to stabilize,2mV/us */
rkclk_configure_cpu();
/* i2c1 for tpm */
diff --git a/src/mainboard/google/veyron_pinky/bootblock.c b/src/mainboard/google/veyron_pinky/bootblock.c
index 99719c4..30b00e1 100644
--- a/src/mainboard/google/veyron_pinky/bootblock.c
+++ b/src/mainboard/google/veyron_pinky/bootblock.c
@@ -20,6 +20,7 @@
#include <arch/io.h>
#include <bootblock_common.h>
+#include <delay.h>
#include <soc/clock.h>
#include <soc/i2c.h>
#include <soc/grf.h>
@@ -27,16 +28,12 @@
#include <soc/rk808.h>
#include <soc/spi.h>
#include <vendorcode/google/chromeos/chromeos.h>
-#include <delay.h>
#include "board.h"
void bootblock_mainboard_init(void)
{
- /* cpu frequency will up to 1.8GHz,
- * in our experience the buck1
- * must up to 1.4v
- */
+ /* Up VDD_CPU (BUCK1) to 1.4V to support max CPU frequency (1.8GHz). */
setbits_le32(&rk3288_pmu->iomux_i2c0scl, IOMUX_I2C0SCL);
setbits_le32(&rk3288_pmu->iomux_i2c0sda, IOMUX_I2C0SDA);
i2c_init(PMIC_BUS, 400*KHz);
Patrick Georgi (pgeorgi(a)google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/9548
-gerrit
commit fdf420b4713216b479b8415c25a07c3439cdb4e2
Author: David Hendricks <dhendrix(a)chromium.org>
Date: Fri Nov 7 13:48:49 2014 -0800
veyron*: use gpio_base2_value() in board_id()
This makes board_id() use the generic gpio_base2_value() function
to obtain the value of the board ID straps.
BUG=none
BRANCH=none
TEST=tested on pinky
Change-Id: I15c1310889b989c34638fd342011aef5fe7bcec1
Signed-off-by: Patrick Georgi <pgeorgi(a)chromium.org>
Original-Commit-Id: fcbb8a6998a66531326afe16b232395d49fee64d
Original-Signed-off-by: David Hendricks <dhendrix(a)chromium.org>
Original-Change-Id: I5847bf1c5b26bcaf7d36103f31bb255b31ff8185
Original-Reviewed-on: https://chromium-review.googlesource.com/228370
Original-Reviewed-by: Julius Werner <jwerner(a)chromium.org>
---
src/mainboard/google/veyron_jerry/boardid.c | 10 ++--------
src/mainboard/google/veyron_pinky/boardid.c | 10 ++--------
2 files changed, 4 insertions(+), 16 deletions(-)
diff --git a/src/mainboard/google/veyron_jerry/boardid.c b/src/mainboard/google/veyron_jerry/boardid.c
index 8d3e183..66de276 100644
--- a/src/mainboard/google/veyron_jerry/boardid.c
+++ b/src/mainboard/google/veyron_jerry/boardid.c
@@ -25,17 +25,11 @@
uint8_t board_id(void)
{
static int id = -1;
- static const gpio_t pins[] = {[3] = GPIO(2, A, 7), [2] = GPIO(2, A, 2),
+ static gpio_t pins[] = {[3] = GPIO(2, A, 7), [2] = GPIO(2, A, 2),
[1] = GPIO(2, A, 1), [0] = GPIO(2, A, 0)}; /* GPIO2_A0 is LSB */
if (id < 0) {
- int i;
-
- id = 0;
- for (i = 0; i < ARRAY_SIZE(pins); i++) {
- gpio_input(pins[i]);
- id |= gpio_get(pins[i]) << i;
- }
+ id = gpio_base2_value(pins, ARRAY_SIZE(pins));
printk(BIOS_SPEW, "Board ID: %d.\n", id);
}
diff --git a/src/mainboard/google/veyron_pinky/boardid.c b/src/mainboard/google/veyron_pinky/boardid.c
index 8d3e183..66de276 100644
--- a/src/mainboard/google/veyron_pinky/boardid.c
+++ b/src/mainboard/google/veyron_pinky/boardid.c
@@ -25,17 +25,11 @@
uint8_t board_id(void)
{
static int id = -1;
- static const gpio_t pins[] = {[3] = GPIO(2, A, 7), [2] = GPIO(2, A, 2),
+ static gpio_t pins[] = {[3] = GPIO(2, A, 7), [2] = GPIO(2, A, 2),
[1] = GPIO(2, A, 1), [0] = GPIO(2, A, 0)}; /* GPIO2_A0 is LSB */
if (id < 0) {
- int i;
-
- id = 0;
- for (i = 0; i < ARRAY_SIZE(pins); i++) {
- gpio_input(pins[i]);
- id |= gpio_get(pins[i]) << i;
- }
+ id = gpio_base2_value(pins, ARRAY_SIZE(pins));
printk(BIOS_SPEW, "Board ID: %d.\n", id);
}
Patrick Georgi (pgeorgi(a)google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/9547
-gerrit
commit cc6b72536667707c1466c4b684b03ed11faa590d
Author: Julius Werner <jwerner(a)chromium.org>
Date: Thu Nov 6 14:33:12 2014 -0800
veyron: Change VCC10_LCD_PWREN_H to allowed maximum of 2.5V
LDO7 (VCC10_LCD_PWREN_H) is essentially just a glorified GPIO that turns
the real VCC10 regulator on or off. We tried setting it to 3.3V since it
matches the VCC33_SYS voltage on the input of that regulator. However,
we didn't notice that the LDO only supports going up to 2.5V.
This patch changes the voltage to the allowed maximum, which should
still work fine as an enable line (and is the same value used by the
kernel). This removes an assertion error in the ramstage.
Also change the PMIC driver to assert maximum VSEL values based on the
LDO, because the lower-voltage ones support one more setting. (LDO3 is
actually listed to only go up to 0b1111 in the manual, and has a weird
jump from 0b1101 -> 2.2V (skipping over 0b1110) to 0b1111 -> 2.5V. I
don't know if that's a documentation error or what they were smoking
when they designed that, but we don't need to care for now.)
BRANCH=None
BUG=None
TEST=Booted on Pinky, no more ASSERTION FAILED.
Change-Id: I38bf99e38822fd0883fd4d0bd9a1b01143545a95
Signed-off-by: Patrick Georgi <pgeorgi(a)chromium.org>
Original-Commit-Id: 70f3149efbc3aa9a03ab3fd5be99d17d9c5e1c87
Original-Change-Id: I68a3bb882cf25d98aca8922ede2a17e1ef6524de
Original-Signed-off-by: Julius Werner <jwerner(a)chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/228292
Original-Commit-Queue: Lin Huang <hl(a)rock-chips.com>
Original-Tested-by: Lin Huang <hl(a)rock-chips.com>
Original-Reviewed-by: Jerry Parson <jwp(a)chromium.org>
---
src/mainboard/google/veyron_jerry/mainboard.c | 2 +-
src/mainboard/google/veyron_pinky/mainboard.c | 2 +-
src/soc/rockchip/rk3288/rk808.c | 3 ++-
3 files changed, 4 insertions(+), 3 deletions(-)
diff --git a/src/mainboard/google/veyron_jerry/mainboard.c b/src/mainboard/google/veyron_jerry/mainboard.c
index b641fad..e6a90b9 100644
--- a/src/mainboard/google/veyron_jerry/mainboard.c
+++ b/src/mainboard/google/veyron_jerry/mainboard.c
@@ -91,7 +91,7 @@ static void configure_lcd(void)
writel(IOMUX_LCDC, &rk3288_grf->iomux_lcdc);
rk808_configure_switch(PMIC_BUS, 2, 1); /* VCC18_LCD */
- rk808_configure_ldo(PMIC_BUS, 7, 3300); /* VCC10_LCD_PWREN_H */
+ rk808_configure_ldo(PMIC_BUS, 7, 2500); /* VCC10_LCD_PWREN_H */
rk808_configure_switch(PMIC_BUS, 1, 1); /* VCC33_LCD */
gpio_output(GPIO(7, A, 0), 0); /* LCDC_BL */
diff --git a/src/mainboard/google/veyron_pinky/mainboard.c b/src/mainboard/google/veyron_pinky/mainboard.c
index 0166796..f891e21 100644
--- a/src/mainboard/google/veyron_pinky/mainboard.c
+++ b/src/mainboard/google/veyron_pinky/mainboard.c
@@ -121,7 +121,7 @@ static void configure_lcd(void)
break;
default:
rk808_configure_switch(PMIC_BUS, 2, 1); /* VCC18_LCD */
- rk808_configure_ldo(PMIC_BUS, 7, 3300); /* VCC10_LCD_PWREN_H */
+ rk808_configure_ldo(PMIC_BUS, 7, 2500); /* VCC10_LCD_PWREN_H */
rk808_configure_switch(PMIC_BUS, 1, 1); /* VCC33_LCD */
break;
}
diff --git a/src/soc/rockchip/rk3288/rk808.c b/src/soc/rockchip/rk3288/rk808.c
index fea64e5..fffef89 100644
--- a/src/soc/rockchip/rk3288/rk808.c
+++ b/src/soc/rockchip/rk3288/rk808.c
@@ -60,16 +60,17 @@ void rk808_configure_ldo(uint8_t bus, int ldo, int millivolts)
case 5:
case 8:
vsel = div_round_up(millivolts, 100) - 18;
+ assert(vsel <= 0x10);
break;
case 3:
case 6:
case 7:
vsel = div_round_up(millivolts, 100) - 8;
+ assert(vsel <= 0x11);
break;
default:
die("Unknown LDO index!");
}
- assert(vsel <= 0x10);
rk808_clrsetbits(bus, LDO_ONSEL(ldo), 0x1f, vsel);
rk808_clrsetbits(bus, LDO_EN, 0, 1 << (ldo - 1));
Patrick Georgi (pgeorgi(a)google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/9545
-gerrit
commit 1c9fb53d5558dd121b1dcff95ebac4e91708c362
Author: Doug Anderson <dianders(a)chromium.org>
Date: Tue Oct 28 14:09:47 2014 -0700
veyron: Change eMMC enable pin to be pulled (not driven) high
The eMMC enable pin is in a 3.3V IO domain. Unfortunately the eMMC
expects this pin to be 1.8V. The way we were driving this pin would
cause the eMMC to pull power through this pin and that was causing
current leaks.
In future revisions of hardware we should move this pin somewhere more
legit. However, in the current hardware we can get things working
pretty well by using a pullup to "drive" this pin. This will work in
conjunction with the external 100K pullup to give a somewhat
reasonable voltage. The eMMC will also not be able to pull much
current through this pin, so it can't leak too badly.
BRANCH=none
BUG=chrome-os-partner:33319
TEST=Boot a kernel that doesn't touch the mux/pulls and see no leak:
dut-control --port=${SERVO} vcc_flash_ma -t 5
Change-Id: Ibc25cd090d826c8215be24a0b5c11d97b5281700
Signed-off-by: Patrick Georgi <pgeorgi(a)chromium.org>
Original-Commit-Id: 26e7a9d7e067ed4dd859387ee63bf654ab9dc529
Original-Change-Id: Iadfc1477cd478773cc9d159e3fbc22b66b8f0f78
Original-Signed-off-by: Doug Anderson <dianders(a)chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/226039
Original-Reviewed-by: Julius Werner <jwerner(a)chromium.org>
---
src/mainboard/google/veyron_jerry/mainboard.c | 7 ++++++-
src/mainboard/google/veyron_pinky/mainboard.c | 7 ++++++-
2 files changed, 12 insertions(+), 2 deletions(-)
diff --git a/src/mainboard/google/veyron_jerry/mainboard.c b/src/mainboard/google/veyron_jerry/mainboard.c
index 2442472..0166796 100644
--- a/src/mainboard/google/veyron_jerry/mainboard.c
+++ b/src/mainboard/google/veyron_jerry/mainboard.c
@@ -79,7 +79,12 @@ static void configure_emmc(void)
writel(IOMUX_EMMCPWREN, &rk3288_grf->iomux_emmcpwren);
writel(IOMUX_EMMCCMD, &rk3288_grf->iomux_emmccmd);
- gpio_output(GPIO(7, B, 4), 1); /* EMMC_RST_L */
+ /*
+ * Use a pullup instead of a drive since the output is 3.3V and
+ * really should be 1.8V (oops). The external pulldown will help
+ * bring the voltage down if we only drive with a pullup here.
+ */
+ gpio_input_pullup(GPIO(7, B, 4)); /* EMMC_RST_L */
}
static void configure_codec(void)
diff --git a/src/mainboard/google/veyron_pinky/mainboard.c b/src/mainboard/google/veyron_pinky/mainboard.c
index 2442472..0166796 100644
--- a/src/mainboard/google/veyron_pinky/mainboard.c
+++ b/src/mainboard/google/veyron_pinky/mainboard.c
@@ -79,7 +79,12 @@ static void configure_emmc(void)
writel(IOMUX_EMMCPWREN, &rk3288_grf->iomux_emmcpwren);
writel(IOMUX_EMMCCMD, &rk3288_grf->iomux_emmccmd);
- gpio_output(GPIO(7, B, 4), 1); /* EMMC_RST_L */
+ /*
+ * Use a pullup instead of a drive since the output is 3.3V and
+ * really should be 1.8V (oops). The external pulldown will help
+ * bring the voltage down if we only drive with a pullup here.
+ */
+ gpio_input_pullup(GPIO(7, B, 4)); /* EMMC_RST_L */
}
static void configure_codec(void)