the following patch was just integrated into master:
commit 1c07c2205e0513e0570597ae793425820ae0844a
Author: Edward O'Callaghan <eocallaghan(a)alterapraxis.com>
Date: Wed Jul 16 19:50:52 2014 +1000
mainboard/amd: De-ASCIIartify AGESA board headers
As was done for the reference boards in:
cd30951 mainboard/amd: De-ASCIIartify reference boards
Change-Id: Ie34aa5269388b771daa6934f8aff0314ac6778d5
Signed-off-by: Edward O'Callaghan <eocallaghan(a)alterapraxis.com>
Reviewed-on: http://review.coreboot.org/6290
Tested-by: build bot (Jenkins)
Reviewed-by: Dave Frodin <dave.frodin(a)se-eng.com>
See http://review.coreboot.org/6290 for details.
-gerrit
the following patch was just integrated into master:
commit 70d4b5261e0667640ed9e137791388aa5c732a8e
Author: Dave Frodin <dave.frodin(a)se-eng.com>
Date: Tue Aug 5 10:20:59 2014 -0600
gizmosphere/gizmo: Change the PCIe GPP to two x1 ports
Gizmo sends two southbridge GPP PCIe lanes to its high speed
edge connector. This change will allow developers to create
two x1 slots on an extender card.
Change-Id: Iba6c1a4caf7846d12e3960775d7bc906ca8ff385
Signed-off-by: Dave Frodin <dave.frodin(a)se-eng.com>
Reviewed-on: http://review.coreboot.org/6499
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan(a)alterapraxis.com>
Reviewed-by: Paul Menzel <paulepanter(a)users.sourceforge.net>
See http://review.coreboot.org/6499 for details.
-gerrit
David Hendricks (dhendrix(a)chromium.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/6497
-gerrit
commit 3d944c7c472da0c768af6292f63a3bdd0889b578
Author: David Hendricks <dhendrix(a)chromium.org>
Date: Mon Aug 4 18:01:00 2014 -0700
superio: Add Nuvoton NCT5577D initial support
This adds basic support for the Nuvoton NCTT5577D SuperIO chip which
is similar to the NCT5104D but with a few different logical devices
and only one UART.
Change-Id: I1cfc2cb3a4a029d2388308af4b0fbf268889bf09
Signed-off-by: David Hendricks <dhendrix(a)chromium.org>
---
src/superio/nuvoton/Makefile.inc | 1 +
src/superio/nuvoton/nct5577d/Makefile.inc | 22 ++++++
src/superio/nuvoton/nct5577d/chip.h | 29 ++++++++
src/superio/nuvoton/nct5577d/early_init.c | 65 ++++++++++++++++++
src/superio/nuvoton/nct5577d/nct5577d.h | 55 +++++++++++++++
src/superio/nuvoton/nct5577d/superio.c | 109 ++++++++++++++++++++++++++++++
6 files changed, 281 insertions(+)
diff --git a/src/superio/nuvoton/Makefile.inc b/src/superio/nuvoton/Makefile.inc
index 1ce6963..bd5b96f 100644
--- a/src/superio/nuvoton/Makefile.inc
+++ b/src/superio/nuvoton/Makefile.inc
@@ -22,3 +22,4 @@ romstage-$(CONFIG_SUPERIO_NUVOTON_COMMON_ROMSTAGE) += common/early_serial.c
subdirs-$(CONFIG_SUPERIO_NUVOTON_WPCM450) += wpcm450
subdirs-$(CONFIG_SUPERIO_NUVOTON_NCT5104D) += nct5104d
+subdirs-$(CONFIG_SUPERIO_NUVOTON_NCT5577D) += nct5577d
diff --git a/src/superio/nuvoton/nct5577d/Makefile.inc b/src/superio/nuvoton/nct5577d/Makefile.inc
new file mode 100644
index 0000000..b9fe0e7
--- /dev/null
+++ b/src/superio/nuvoton/nct5577d/Makefile.inc
@@ -0,0 +1,22 @@
+##
+## This file is part of the coreboot project.
+##
+## Copyright (C) 2014 Google Inc.
+##
+## This program is free software; you can redistribute it and/or modify
+## it under the terms of the GNU General Public License as published by
+## the Free Software Foundation; either version 2 of the License, or
+## (at your option) any later version.
+##
+## This program is distributed in the hope that it will be useful,
+## but WITHOUT ANY WARRANTY; without even the implied warranty of
+## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+## GNU General Public License for more details.
+##
+## You should have received a copy of the GNU General Public License
+## along with this program; if not, write to the Free Software
+## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+##
+
+romstage-$(CONFIG_SUPERIO_NUVOTON_NCT5577D) += early_init.c
+ramstage-$(CONFIG_SUPERIO_NUVOTON_NCT5577D) += superio.c
diff --git a/src/superio/nuvoton/nct5577d/chip.h b/src/superio/nuvoton/nct5577d/chip.h
new file mode 100644
index 0000000..ef0f0ca
--- /dev/null
+++ b/src/superio/nuvoton/nct5577d/chip.h
@@ -0,0 +1,29 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2014 Sage Electronic Engineering, LLC
+ * Copyright (C) 2014 Google Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+#ifndef SUPERIO_NUVOTON_NCT5577D_CHIP_H
+#define SUPERIO_NUVOTON_NCT5577D_CHIP_H
+
+struct superio_nuvoton_nct5577d_config {
+ u8 irq_trigger_type;
+};
+
+#endif
diff --git a/src/superio/nuvoton/nct5577d/early_init.c b/src/superio/nuvoton/nct5577d/early_init.c
new file mode 100644
index 0000000..35d0211
--- /dev/null
+++ b/src/superio/nuvoton/nct5577d/early_init.c
@@ -0,0 +1,65 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2011 Advanced Micro Devices, Inc.
+ * Copyright (C) 2014 Edward O'Callaghan <eocallaghan(a)alterapraxis.com>
+ * Copyright (C) 2014 Felix Held <felix-coreboot(a)felixheld.de>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+#include <arch/io.h>
+#include <device/pnp.h>
+#include <stdint.h>
+#include "nct5577d.h"
+
+#define NUVOTON_ENTRY_KEY 0x87
+#define NUVOTON_EXIT_KEY 0xAA
+
+/* Enable configuration: pass entry key '0x87' into index port dev
+ * two times. */
+static void pnp_enter_conf_state(device_t dev)
+{
+ u16 port = dev >> 8;
+ outb(NUVOTON_ENTRY_KEY, port);
+ outb(NUVOTON_ENTRY_KEY, port);
+}
+
+/* Disable configuration: pass exit key '0xAA' into index port dev. */
+static void pnp_exit_conf_state(device_t dev)
+{
+ u16 port = dev >> 8;
+ outb(NUVOTON_EXIT_KEY, port);
+}
+
+/* NCT5577D has only UART A */
+void nct5577d_enable_uarta(device_t dev, u16 iobase)
+{
+ u8 tmp;
+
+ pnp_enter_conf_state(dev);
+ pnp_set_enable(dev, 0);
+
+ /* Select COM A function for Pins 13-20 */
+ tmp = pnp_read_config(dev, GLOBAL_OPTION_CR28);
+ tmp &= ~CR28_PIN13_20_CFG;
+ pnp_write_config(dev, GLOBAL_OPTION_CR28, tmp);
+
+ pnp_set_logical_device(NCT5577D_SP1);
+ /* default iobase is 0x03f8 */
+ //pnp_set_iobase(dev, PNP_IDX_IO0, iobase);
+ pnp_set_enable(dev, 1);
+ pnp_exit_conf_state(dev);
+}
diff --git a/src/superio/nuvoton/nct5577d/nct5577d.h b/src/superio/nuvoton/nct5577d/nct5577d.h
new file mode 100644
index 0000000..9f53b08
--- /dev/null
+++ b/src/superio/nuvoton/nct5577d/nct5577d.h
@@ -0,0 +1,55 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2011 Advanced Micro Devices, Inc.
+ * Copyright (C) 2014 Sage Electronic Engineering, LLC
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+#ifndef SUPERIO_NUVOTON_NCT5577D_H
+#define SUPERIO_NUVOTON_NCT5577D_H
+
+#include <arch/io.h>
+
+/* SIO global configuration */
+#define IRQ_TYPE_SEL_CR10 0x10 /* UARTA, KBC, Mouse, CIR */
+#define IRQ_TYPE_SEL_CR11 0x11 /* HM, WDTO, SMI */
+
+#define GLOBAL_OPTION_CR26 0x26
+#define CR26_LOCK_REG (1 << 4) /* enable access CR10/CR11 */
+#define CR26_UARTA_LEGACY_IRQ (1 << 1) /* toggle UARTA legacy IRQ */
+
+#define GLOBAL_OPTION_CR28 0x28
+#define CR28_PIN13_20_CFG (1 << 7) /* 0=COM A, 1=GPIO8 (default) */
+
+/* Logical Device Numbers (LDN). */
+#define NCT5577D_SP1 0x02 /* UARTA */
+#define NCT5577D_IR 0x03 /* IR */
+#define NCT5577D_KBC 0x05 /* Keyboard Controller */
+#define NCT5577D_CIR 0x06 /* CIR */
+#define NCT5577D_GPIO7_8_9 0x07 /* GPIO7, 8, and 9 control */
+#define NCT5577D_WDT1_GPIOA 0x08 /* WDT1 and GPIOA control */
+#define NCT5577D_GPIO2_3_4_5_7 0x09 /* GPIO2, 3, 4, 5, and 7 control */
+#define NCT5577D_ACPI 0x0a /* ACPI */
+#define NCT5577D_HWM_FPLED 0x0b /* Hardware monitor, Front Panel LED */
+#define NCT5577D_CIR_WAKEUP 0x0e /* CIR wake-up */
+#define NCT5577D_GPIO_PP_OD 0x0f /* GPIO Push-Pull or Open-Drain */
+#define NCT5577D_DEEP_SLEEP 0x16 /* Deep sleep */
+#define NCT5577D_GPIOA 0x17 /* GPIOA config */
+
+void nct5577d_enable_uart(device_t dev);
+
+#endif /* SUPERIO_NUVOTON_NCT5577D_H */
diff --git a/src/superio/nuvoton/nct5577d/superio.c b/src/superio/nuvoton/nct5577d/superio.c
new file mode 100644
index 0000000..0d08056
--- /dev/null
+++ b/src/superio/nuvoton/nct5577d/superio.c
@@ -0,0 +1,109 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2011 Advanced Micro Devices, Inc.
+ * Copyright (C) 2014 Google Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+#include <arch/io.h>
+#include <device/pnp.h>
+#include <superio/conf_mode.h>
+#include <stdlib.h>
+#include "nct5577d.h"
+#include "chip.h"
+
+static void config_irq_trigger(device_t dev, u8 reg, u8 bit)
+{
+ struct superio_nuvoton_nct5577d_config *conf = dev->chip_info;
+ u8 val;
+
+ val = pnp_read_config(dev, reg);
+ /* 0 for edge-triggered, 1 for level-triggered */
+ if (conf->config_irq_trigger_type)
+ val |= (1 << bit);
+ else
+ val &= ~(1 << bit);
+ pnp_write_config(dev, reg, val);
+}
+
+static void nct5577d_init(device_t dev)
+{
+ u8 reg26;
+
+ if (!dev->enabled)
+ return;
+
+ pnp_enter_conf_mode(dev);
+
+ /* CR26 bit 4 must be set before accessing CR10, CR11, CR13, or CR14 */
+ reg26 = pnp_read_config(dev, GLOBAL_OPTION_CR26);
+ reg26 |= CR26_LOCK_REG;
+ pnp_write_config(dev, GLOBAL_OPTION_CR26, reg26);
+
+ switch(dev->path.pnp.device) {
+ /* SP1 (UARTA) IRQ type selection */
+ case NCT5577D_SP1:
+ config_irq_trigger(IRQ_TYPE_SEL_CR10, 5);
+ break;
+ case NCT5577D_KBC:
+ config_irq_trigger(IRQ_TYPE_SEL_CR10, 3);
+ break;
+ case NCT5577D_CIR:
+ config_irq_trigger(IRQ_TYPE_SEL_CR10, 1);
+ break;
+ case NCT5577D_HWM_FPLED:
+ config_irq_trigger(IRQ_TYPE_SEL_CR11, 7);
+ break;
+ case NCT5577D_CIR_WAKEUP:
+ config_irq_trigger(IRQ_TYPE_SEL_CR10, 0);
+ break;
+ default:
+ break;
+ }
+
+ /* Clear access control register */
+ reg26 = pnp_read_config(dev, GLOBAL_OPTION_CR26);
+ reg26 &= ~CR26_LOCK_REG;
+ pnp_write_config(dev, GLOBAL_OPTION_CR26, reg26);
+ pnp_exit_conf_mode(dev);
+}
+
+static struct device_operations ops = {
+ .read_resources = pnp_read_resources,
+ .set_resources = pnp_set_resources,
+ .enable_resources = pnp_enable_resources,
+ .enable = pnp_alt_enable,
+ .init = nct5577d_init,
+ .ops_pnp_mode = &pnp_conf_mode_8787_aa,
+};
+
+static struct pnp_info pnp_dev_info[] = {
+ { &ops, NCT5577D_SP1 },
+ { &ops, NCT5577D_KBC },
+ { &ops, NCT5577D_ACPI },
+ { &ops, NCT5577D_HWM_FPLED },
+};
+
+static void enable_dev(struct device *dev)
+{
+ pnp_enable_devices(dev, &ops, ARRAY_SIZE(pnp_dev_info), pnp_dev_info);
+}
+
+struct chip_operations superio_nuvoton_nct5577d_ops = {
+ CHIP_NAME("NUVOTON NCT5577D Super I/O")
+ .enable_dev = enable_dev,
+};