coreboot-gerrit August 2014

coreboot-gerrit@coreboot.org

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New patch to review for coreboot: 29f7cd2 nvramtool: plug some memory leaks
by Patrick Georgi 09 Aug '14

09 Aug '14

Patrick Georgi (patrick(a)georgi-clan.de) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/6561 -gerrit commit 29f7cd291d4e931d51af1efa103941c705e83cb9 Author: Patrick Georgi <patrick(a)georgi-clan.de> Date: Sat Aug 9 17:06:20 2014 +0200 nvramtool: plug some memory leaks Change-Id: I8f672b872862d3448ccd2cf28fd3c05b0108ff8b Found-by: Coverity Scan Signed-off-by: Patrick Georgi <patrick(a)georgi-clan.de> --- util/nvramtool/cmos_lowlevel.c | 1 + util/nvramtool/cmos_ops.c | 6 ++++-- 2 files changed, 5 insertions(+), 2 deletions(-) diff --git a/util/nvramtool/cmos_lowlevel.c b/util/nvramtool/cmos_lowlevel.c index ef0c383..bc237c1 100644 --- a/util/nvramtool/cmos_lowlevel.c +++ b/util/nvramtool/cmos_lowlevel.c @@ -142,6 +142,7 @@ unsigned long long cmos_read(const cmos_entry_t * e) usize]); result = (unsigned long)newstring; } + free(newstring); } else { for (next_bit = 0, bits_left = length; bits_left; next_bit += nr_bits, bits_left -= nr_bits) { diff --git a/util/nvramtool/cmos_ops.c b/util/nvramtool/cmos_ops.c index 91c9f45..cb6c379 100644 --- a/util/nvramtool/cmos_ops.c +++ b/util/nvramtool/cmos_ops.c @@ -95,7 +95,7 @@ int prepare_cmos_write(const cmos_entry_t * e, const char value_str[], const cmos_enum_t *q; unsigned long long out; const char *p; - char *memory; + char *memory = NULL; int negative, result, found_one; if ((result = prepare_cmos_op_common(e)) != OK) @@ -155,8 +155,10 @@ int prepare_cmos_write(const cmos_entry_t * e, const char value_str[], BUG(); } - if ((e->length < (8 * sizeof(*value))) && (out >= (1ull << e->length))) + if ((e->length < (8 * sizeof(*value))) && (out >= (1ull << e->length))) { + if (memory) free(memory); return CMOS_OP_VALUE_TOO_WIDE; + } *value = out; return OK;

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New patch to review for coreboot: 8820eb3 nvramtool: check for successful seek
by Patrick Georgi 09 Aug '14

09 Aug '14

Patrick Georgi (patrick(a)georgi-clan.de) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/6560 -gerrit commit 8820eb32dfa8d454ef4dd67127f22a05c4c9f446 Author: Patrick Georgi <patrick(a)georgi-clan.de> Date: Sat Aug 9 17:02:00 2014 +0200 nvramtool: check for successful seek Otherwise the following write might end up anywhere. Change-Id: Ie42d984824e9308bd58b8bb905b6ea823543adf0 Found-by: Coverity Scan Signed-off-by: Patrick Georgi <patrick(a)georgi-clan.de> --- util/nvramtool/cli/nvramtool.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/util/nvramtool/cli/nvramtool.c b/util/nvramtool/cli/nvramtool.c index d5acc58..bdfaaff 100644 --- a/util/nvramtool/cli/nvramtool.c +++ b/util/nvramtool/cli/nvramtool.c @@ -163,8 +163,8 @@ int main(int argc, char *argv[]) } if (fd_stat.st_size < CMOS_SIZE) { - lseek(fd, CMOS_SIZE - 1, SEEK_SET); - if (write(fd, "\0", 1) != 1) { + if ((lseek(fd, CMOS_SIZE - 1, SEEK_SET) == -1) || + (write(fd, "\0", 1) != 1)) { fprintf(stderr, "Unable to extended '%s' to its full size.\n", nvramtool_op_modifiers[NVRAMTOOL_MOD_USE_CMOS_FILE].param); exit(1);

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New patch to review for coreboot: fc63761 cbfstool: free stale memory
by Patrick Georgi 09 Aug '14

09 Aug '14

Patrick Georgi (patrick(a)georgi-clan.de) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/6559 -gerrit commit fc63761e7e73a8e411e0fe30da1f7d4147d8912a Author: Patrick Georgi <patrick(a)georgi-clan.de> Date: Sat Aug 9 16:58:00 2014 +0200 cbfstool: free stale memory The process probably terminates not much later, but in case anyone reuses the function in something with longer life-time, free unused resources. Change-Id: I10c471ee3d9dc9a3ebf08fe4605f223ea59b990e Found-by: Coverity Scan Signed-off-by: Patrick Georgi <patrick(a)georgi-clan.de> --- util/cbfstool/elfheaders.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/util/cbfstool/elfheaders.c b/util/cbfstool/elfheaders.c index 5b5cf94..71d34a9 100644 --- a/util/cbfstool/elfheaders.c +++ b/util/cbfstool/elfheaders.c @@ -281,8 +281,10 @@ phdr_read(const struct buffer *in, struct parsed_elf *pelf, /* Ensure the contents are valid within the elf file. */ if (check_size(in, phdr[i].p_offset, phdr[i].p_filesz, - "segment contents")) + "segment contents")) { + free(phdr); return -1; + } } pelf->phdr = phdr; @@ -422,6 +424,7 @@ static int strtab_read(const struct buffer *in, struct parsed_elf *pelf) buffer_splice(b, in, shdr->sh_offset, shdr->sh_size); if (check_size(in, shdr->sh_offset, buffer_size(b), "strtab")) { ERROR("STRTAB section not within bounds: %d\n", i); + free(b); return -1; } pelf->strtabs[i] = b;

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Patch set updated for coreboot: eddfefb southbridge/amd/cs5536/early_setup.c: Add missing includes
by Edward O'Callaghan 09 Aug '14

09 Aug '14

Edward O'Callaghan (eocallaghan(a)alterapraxis.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/6558 -gerrit commit eddfefb0ecff7e30bbe5d8463a2ce2ee6237a576 Author: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> Date: Sat Aug 9 21:35:39 2014 +1000 southbridge/amd/cs5536/early_setup.c: Add missing includes Change-Id: Ida73108316f81a6bfabcee7b9ba5637490d0a5a3 Signed-off-by: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> --- src/southbridge/amd/cs5536/early_setup.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/src/southbridge/amd/cs5536/early_setup.c b/src/southbridge/amd/cs5536/early_setup.c index e6ef8ad..cff6512 100644 --- a/src/southbridge/amd/cs5536/early_setup.c +++ b/src/southbridge/amd/cs5536/early_setup.c @@ -22,6 +22,12 @@ * This file implements the initialization sequence documented in section 4.2 of * AMD Geode GX Processor CS5536 Companion Device GeodeROM Porting Guide. */ +#include <arch/io.h> +#include <cpu/amd/lxdef.h> +#include <cpu/x86/msr.h> +#include <stdint.h> + +#include "cs5536.h" /** * @brief Setup PCI IDSEL for CS5536

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Patch set updated for coreboot: ee2e102 southbridge/amd/cs5536: Make cs5536_enable_smbus() a weak symbol
by Edward O'Callaghan 09 Aug '14

09 Aug '14

Edward O'Callaghan (eocallaghan(a)alterapraxis.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/6554 -gerrit commit ee2e102d94dcfe994a76512bc579a21e1212a193 Author: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> Date: Sun Aug 10 00:12:30 2014 +1000 southbridge/amd/cs5536: Make cs5536_enable_smbus() a weak symbol On some boards the SMBus is hardwired and so we need to override cs5536_enable_smbus() with a dummy function in the board support. Thus we make cs5536_enable_smbus() a weak symbol. Fix boards to match by removing the .c include. Change-Id: Iada97edf0591556b64eb8b63752379fdf0366ece Signed-off-by: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> --- src/mainboard/aaeon/pfm-540i_revb/romstage.c | 2 +- src/mainboard/amd/db800/romstage.c | 2 +- src/mainboard/amd/norwich/romstage.c | 2 +- src/mainboard/amd/rumba/romstage.c | 2 +- src/mainboard/artecgroup/dbe61/romstage.c | 2 +- src/mainboard/bachmann/ot200/romstage.c | 2 +- src/mainboard/digitallogic/msm800sev/romstage.c | 2 +- src/mainboard/iei/pcisa-lx-800-r10/romstage.c | 2 +- src/mainboard/iei/pm-lx-800-r11/romstage.c | 2 +- src/mainboard/iei/pm-lx2-800-r10/romstage.c | 2 +- src/mainboard/lippert/hurricane-lx/romstage.c | 2 +- src/mainboard/lippert/literunner-lx/romstage.c | 2 +- src/mainboard/lippert/roadrunner-lx/romstage.c | 2 +- src/mainboard/lippert/spacerunner-lx/romstage.c | 2 +- src/mainboard/pcengines/alix1c/romstage.c | 2 +- src/mainboard/pcengines/alix2d/romstage.c | 2 +- src/mainboard/traverse/geos/romstage.c | 2 +- src/mainboard/winent/pl6064/romstage.c | 2 +- src/mainboard/wyse/s50/romstage.c | 2 +- src/southbridge/amd/cs5536/cs5536.h | 8 +++++ src/southbridge/amd/cs5536/early_setup.c | 10 +++++++ src/southbridge/amd/cs5536/early_smbus.c | 39 ------------------------- src/southbridge/amd/cs5536/smbus.h | 6 ++++ 23 files changed, 43 insertions(+), 58 deletions(-) diff --git a/src/mainboard/aaeon/pfm-540i_revb/romstage.c b/src/mainboard/aaeon/pfm-540i_revb/romstage.c index f80ef95..47c411a 100644 --- a/src/mainboard/aaeon/pfm-540i_revb/romstage.c +++ b/src/mainboard/aaeon/pfm-540i_revb/romstage.c @@ -33,7 +33,7 @@ #include <cpu/amd/lxdef.h> #include "southbridge/amd/cs5536/cs5536.h" #include <spd.h> -#include "southbridge/amd/cs5536/early_smbus.c" +#include <southbridge/amd/cs5536/smbus.h> #include "southbridge/amd/cs5536/early_setup.c" #include <superio/smsc/smscsuperio/smscsuperio.h> #include "northbridge/amd/lx/raminit.h" diff --git a/src/mainboard/amd/db800/romstage.c b/src/mainboard/amd/db800/romstage.c index 564380e..5db1d98 100644 --- a/src/mainboard/amd/db800/romstage.c +++ b/src/mainboard/amd/db800/romstage.c @@ -30,7 +30,7 @@ #include <cpu/amd/lxdef.h> #include "southbridge/amd/cs5536/cs5536.h" #include <spd.h> -#include "southbridge/amd/cs5536/early_smbus.c" +#include <southbridge/amd/cs5536/smbus.h> #include "southbridge/amd/cs5536/early_setup.c" #include <superio/winbond/common/winbond.h> #include <superio/winbond/w83627hf/w83627hf.h> diff --git a/src/mainboard/amd/norwich/romstage.c b/src/mainboard/amd/norwich/romstage.c index 9322508..4f82db5 100644 --- a/src/mainboard/amd/norwich/romstage.c +++ b/src/mainboard/amd/norwich/romstage.c @@ -30,7 +30,7 @@ #include <cpu/amd/lxdef.h> #include "southbridge/amd/cs5536/cs5536.h" #include <spd.h> -#include "southbridge/amd/cs5536/early_smbus.c" +#include <southbridge/amd/cs5536/smbus.h> #include "southbridge/amd/cs5536/early_setup.c" #include "northbridge/amd/lx/raminit.h" diff --git a/src/mainboard/amd/rumba/romstage.c b/src/mainboard/amd/rumba/romstage.c index c5a3fc3..5a0f8a4 100644 --- a/src/mainboard/amd/rumba/romstage.c +++ b/src/mainboard/amd/rumba/romstage.c @@ -10,7 +10,7 @@ #include "cpu/x86/msr.h" #include <cpu/amd/gx2def.h> #include <spd.h> -#include "southbridge/amd/cs5536/early_smbus.c" +#include <southbridge/amd/cs5536/smbus.h> #include "southbridge/amd/cs5536/early_setup.c" #define SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP1) diff --git a/src/mainboard/artecgroup/dbe61/romstage.c b/src/mainboard/artecgroup/dbe61/romstage.c index 7276b30..4631027 100644 --- a/src/mainboard/artecgroup/dbe61/romstage.c +++ b/src/mainboard/artecgroup/dbe61/romstage.c @@ -31,7 +31,7 @@ #include "southbridge/amd/cs5536/cs5536.h" #include "spd_table.h" #include <spd.h> -#include "southbridge/amd/cs5536/early_smbus.c" +#include <southbridge/amd/cs5536/smbus.h> #include "southbridge/amd/cs5536/early_setup.c" #include "northbridge/amd/lx/raminit.h" diff --git a/src/mainboard/bachmann/ot200/romstage.c b/src/mainboard/bachmann/ot200/romstage.c index 39385c7..684e0f9 100644 --- a/src/mainboard/bachmann/ot200/romstage.c +++ b/src/mainboard/bachmann/ot200/romstage.c @@ -31,7 +31,7 @@ #include "cpu/x86/msr.h" #include <cpu/amd/lxdef.h> #include "southbridge/amd/cs5536/cs5536.h" -#include "southbridge/amd/cs5536/early_smbus.c" +#include <southbridge/amd/cs5536/smbus.h> #include "southbridge/amd/cs5536/early_setup.c" #include "northbridge/amd/lx/raminit.h" diff --git a/src/mainboard/digitallogic/msm800sev/romstage.c b/src/mainboard/digitallogic/msm800sev/romstage.c index 986e918..932e0aa 100644 --- a/src/mainboard/digitallogic/msm800sev/romstage.c +++ b/src/mainboard/digitallogic/msm800sev/romstage.c @@ -11,7 +11,7 @@ #include <cpu/amd/car.h> #include "southbridge/amd/cs5536/cs5536.h" #include <spd.h> -#include "southbridge/amd/cs5536/early_smbus.c" +#include <southbridge/amd/cs5536/smbus.h> #include "southbridge/amd/cs5536/early_setup.c" #include <superio/winbond/common/winbond.h> #include <superio/winbond/w83627hf/w83627hf.h> diff --git a/src/mainboard/iei/pcisa-lx-800-r10/romstage.c b/src/mainboard/iei/pcisa-lx-800-r10/romstage.c index a75691c..7de802c 100644 --- a/src/mainboard/iei/pcisa-lx-800-r10/romstage.c +++ b/src/mainboard/iei/pcisa-lx-800-r10/romstage.c @@ -30,7 +30,7 @@ #include <cpu/amd/lxdef.h> #include "southbridge/amd/cs5536/cs5536.h" #include <spd.h> -#include "southbridge/amd/cs5536/early_smbus.c" +#include <southbridge/amd/cs5536/smbus.h> #include "southbridge/amd/cs5536/early_setup.c" #include <superio/winbond/common/winbond.h> #include <superio/winbond/w83627hf/w83627hf.h> diff --git a/src/mainboard/iei/pm-lx-800-r11/romstage.c b/src/mainboard/iei/pm-lx-800-r11/romstage.c index bf34e9a..b591f0d 100644 --- a/src/mainboard/iei/pm-lx-800-r11/romstage.c +++ b/src/mainboard/iei/pm-lx-800-r11/romstage.c @@ -30,7 +30,7 @@ #include <cpu/x86/msr.h> #include <cpu/amd/lxdef.h> #include <southbridge/amd/cs5536/cs5536.h> -#include <southbridge/amd/cs5536/early_smbus.c> +#include <southbridge/amd/cs5536/smbus.h> #include <southbridge/amd/cs5536/early_setup.c> #include <superio/winbond/common/winbond.h> #include <superio/winbond/w83627ehg/w83627ehg.h> diff --git a/src/mainboard/iei/pm-lx2-800-r10/romstage.c b/src/mainboard/iei/pm-lx2-800-r10/romstage.c index b34bce4..ef62ce9 100644 --- a/src/mainboard/iei/pm-lx2-800-r10/romstage.c +++ b/src/mainboard/iei/pm-lx2-800-r10/romstage.c @@ -31,7 +31,7 @@ #include <cpu/x86/msr.h> #include <cpu/amd/lxdef.h> #include <southbridge/amd/cs5536/cs5536.h> -#include <southbridge/amd/cs5536/early_smbus.c> +#include <southbridge/amd/cs5536/smbus.h> #include <southbridge/amd/cs5536/early_setup.c> #include <superio/smsc/smscsuperio/smscsuperio.h> #include <northbridge/amd/lx/raminit.h> diff --git a/src/mainboard/lippert/hurricane-lx/romstage.c b/src/mainboard/lippert/hurricane-lx/romstage.c index 063721b..71da941 100644 --- a/src/mainboard/lippert/hurricane-lx/romstage.c +++ b/src/mainboard/lippert/hurricane-lx/romstage.c @@ -33,7 +33,7 @@ #include <cpu/amd/lxdef.h> #include "southbridge/amd/cs5536/cs5536.h" #include <spd.h> -#include "southbridge/amd/cs5536/early_smbus.c" +#include <southbridge/amd/cs5536/smbus.h> #include "southbridge/amd/cs5536/early_setup.c" #include <superio/ite/common/ite.h> #include <superio/ite/it8712f/it8712f.h> diff --git a/src/mainboard/lippert/literunner-lx/romstage.c b/src/mainboard/lippert/literunner-lx/romstage.c index 174620a..dc90053 100644 --- a/src/mainboard/lippert/literunner-lx/romstage.c +++ b/src/mainboard/lippert/literunner-lx/romstage.c @@ -33,7 +33,7 @@ #include "cpu/x86/msr.h" #include <cpu/amd/lxdef.h> #include "southbridge/amd/cs5536/cs5536.h" -#include "southbridge/amd/cs5536/early_smbus.c" +#include <southbridge/amd/cs5536/smbus.h> #include "southbridge/amd/cs5536/early_setup.c" #include <superio/ite/common/ite.h> #include <superio/ite/it8712f/it8712f.h> diff --git a/src/mainboard/lippert/roadrunner-lx/romstage.c b/src/mainboard/lippert/roadrunner-lx/romstage.c index 2642373..9d970b7 100644 --- a/src/mainboard/lippert/roadrunner-lx/romstage.c +++ b/src/mainboard/lippert/roadrunner-lx/romstage.c @@ -33,7 +33,7 @@ #include <cpu/amd/lxdef.h> #include "southbridge/amd/cs5536/cs5536.h" #include <spd.h> -#include "southbridge/amd/cs5536/early_smbus.c" +#include <southbridge/amd/cs5536/smbus.h> #include "southbridge/amd/cs5536/early_setup.c" #include <superio/ite/common/ite.h> #include <superio/ite/it8712f/it8712f.h> diff --git a/src/mainboard/lippert/spacerunner-lx/romstage.c b/src/mainboard/lippert/spacerunner-lx/romstage.c index 9d5539e..5964388 100644 --- a/src/mainboard/lippert/spacerunner-lx/romstage.c +++ b/src/mainboard/lippert/spacerunner-lx/romstage.c @@ -33,7 +33,7 @@ #include "cpu/x86/msr.h" #include <cpu/amd/lxdef.h> #include "southbridge/amd/cs5536/cs5536.h" -#include "southbridge/amd/cs5536/early_smbus.c" +#include <southbridge/amd/cs5536/smbus.h> #include "southbridge/amd/cs5536/early_setup.c" #include <superio/ite/common/ite.h> #include <superio/ite/it8712f/it8712f.h> diff --git a/src/mainboard/pcengines/alix1c/romstage.c b/src/mainboard/pcengines/alix1c/romstage.c index 204f0bd..080553b 100644 --- a/src/mainboard/pcengines/alix1c/romstage.c +++ b/src/mainboard/pcengines/alix1c/romstage.c @@ -36,7 +36,7 @@ #define SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP1) /* The ALIX1.C has no SMBus; the setup is hard-wired. */ -static void cs5536_enable_smbus(void) { } +void cs5536_enable_smbus(void) { } #include "southbridge/amd/cs5536/early_setup.c" #include <superio/winbond/common/winbond.h> diff --git a/src/mainboard/pcengines/alix2d/romstage.c b/src/mainboard/pcengines/alix2d/romstage.c index 18453ac..07bf77e 100644 --- a/src/mainboard/pcengines/alix2d/romstage.c +++ b/src/mainboard/pcengines/alix2d/romstage.c @@ -36,7 +36,7 @@ #define SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP1) /* The ALIX.2D has no SMBus; the setup is hard-wired. */ -static void cs5536_enable_smbus(void) { } +void cs5536_enable_smbus(void) { } #include "southbridge/amd/cs5536/early_setup.c" diff --git a/src/mainboard/traverse/geos/romstage.c b/src/mainboard/traverse/geos/romstage.c index 36d55a7..95ceffa 100644 --- a/src/mainboard/traverse/geos/romstage.c +++ b/src/mainboard/traverse/geos/romstage.c @@ -31,7 +31,7 @@ #include <cpu/amd/lxdef.h> #include "southbridge/amd/cs5536/cs5536.h" #include <spd.h> -#include "southbridge/amd/cs5536/early_smbus.c" +#include <southbridge/amd/cs5536/smbus.h> #include "southbridge/amd/cs5536/early_setup.c" #include "northbridge/amd/lx/raminit.h" diff --git a/src/mainboard/winent/pl6064/romstage.c b/src/mainboard/winent/pl6064/romstage.c index 6a38355..9d1f631 100644 --- a/src/mainboard/winent/pl6064/romstage.c +++ b/src/mainboard/winent/pl6064/romstage.c @@ -32,7 +32,7 @@ #include <cpu/amd/lxdef.h> #include "southbridge/amd/cs5536/cs5536.h" #include <spd.h> -#include "southbridge/amd/cs5536/early_smbus.c" +#include <southbridge/amd/cs5536/smbus.h> #include "southbridge/amd/cs5536/early_setup.c" #include <superio/winbond/common/winbond.h> #include <superio/winbond/w83627hf/w83627hf.h> diff --git a/src/mainboard/wyse/s50/romstage.c b/src/mainboard/wyse/s50/romstage.c index 9e5dd53..deeeaf5 100644 --- a/src/mainboard/wyse/s50/romstage.c +++ b/src/mainboard/wyse/s50/romstage.c @@ -30,7 +30,7 @@ #include "cpu/x86/msr.h" #include <cpu/amd/gx2def.h> #include <spd.h> -#include "southbridge/amd/cs5536/early_smbus.c" +#include <southbridge/amd/cs5536/smbus.h> #include "southbridge/amd/cs5536/early_setup.c" static inline int spd_read_byte(unsigned int device, unsigned int address) diff --git a/src/southbridge/amd/cs5536/cs5536.h b/src/southbridge/amd/cs5536/cs5536.h index b722560..a76355f 100644 --- a/src/southbridge/amd/cs5536/cs5536.h +++ b/src/southbridge/amd/cs5536/cs5536.h @@ -451,4 +451,12 @@ void chipsetinit(void); #endif #endif +/** + * Note: Some boards do not have SMBus and are hard-wired, so we leave this + * symbol weak as to be able to override it in 'romstage.c' of board support. + */ +void cs5536_enable_smbus(void) __attribute__((weak)); + +#include "smbus.h" + #endif /* _CS5536_H */ diff --git a/src/southbridge/amd/cs5536/early_setup.c b/src/southbridge/amd/cs5536/early_setup.c index cff6512..02af392 100644 --- a/src/southbridge/amd/cs5536/early_setup.c +++ b/src/southbridge/amd/cs5536/early_setup.c @@ -249,6 +249,16 @@ void cs5536_setup_onchipuart(int uart) } } +/* Initialization for SMBus Controller */ +void cs5536_enable_smbus(void) +{ + /* Set SCL freq and enable SMB controller */ + /*outb((0x20 << 1) | SMB_CTRL2_ENABLE, smbus_io_base + SMB_CTRL2); */ + outb((0x7F << 1) | SMB_CTRL2_ENABLE, SMBUS_IO_BASE + SMB_CTRL2); + + /* Setup SMBus host controller address to 0xEF */ + outb((0xEF | SMB_ADD_SAEN), SMBUS_IO_BASE + SMB_ADD); +} /* note: you can't do prints in here in most cases, * and we don't want to hang on serial, so they are diff --git a/src/southbridge/amd/cs5536/early_smbus.c b/src/southbridge/amd/cs5536/early_smbus.c deleted file mode 100644 index d1483b1..0000000 --- a/src/southbridge/amd/cs5536/early_smbus.c +++ /dev/null @@ -1,39 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2007 Advanced Micro Devices, Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -#include "cs5536.h" -#include "smbus.h" - -/* initialization for SMBus Controller */ -static void cs5536_enable_smbus(void) -{ - - /* Set SCL freq and enable SMB controller */ - /*outb((0x20 << 1) | SMB_CTRL2_ENABLE, smbus_io_base + SMB_CTRL2); */ - outb((0x7F << 1) | SMB_CTRL2_ENABLE, SMBUS_IO_BASE + SMB_CTRL2); - - /* Setup SMBus host controller address to 0xEF */ - outb((0xEF | SMB_ADD_SAEN), SMBUS_IO_BASE + SMB_ADD); - -} - -static inline int smbus_read_byte(unsigned device, unsigned address) -{ - return do_smbus_read_byte(SMBUS_IO_BASE, device, address); -} diff --git a/src/southbridge/amd/cs5536/smbus.h b/src/southbridge/amd/cs5536/smbus.h index 3e72dad..9cc3e6d 100644 --- a/src/southbridge/amd/cs5536/smbus.h +++ b/src/southbridge/amd/cs5536/smbus.h @@ -21,6 +21,7 @@ #define _CS5536_SMBUS_H #include <device/smbus_def.h> +#include "cs5536.h" int smbus_start_condition(unsigned smbus_io_base); int smbus_stop_condition(unsigned smbus_io_base); @@ -33,4 +34,9 @@ unsigned char do_smbus_read_byte(unsigned smbus_io_base, unsigned char device, unsigned char address); +static inline int smbus_read_byte(unsigned device, unsigned address) +{ + return do_smbus_read_byte(SMBUS_IO_BASE, device, address); +} + #endif /* _CS5536_SMBUS_H */

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Patch set updated for coreboot: 99e76e3 southbridge/amd/cs5536: Use prototype for cs5536_early_setup()
by Edward O'Callaghan 09 Aug '14

09 Aug '14

Edward O'Callaghan (eocallaghan(a)alterapraxis.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/6555 -gerrit commit 99e76e36c5ce3056756eb9e7e930c7fcf713adf7 Author: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> Date: Sat Aug 9 21:03:38 2014 +1000 southbridge/amd/cs5536: Use prototype for cs5536_early_setup() Use a prototype for cs5536_early_setup() over using #include .c and fix mainboard's to match. Change-Id: I88d6d4abbd825d8d77dadf1755226f14f99a9b63 Signed-off-by: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> --- src/mainboard/aaeon/pfm-540i_revb/romstage.c | 3 +-- src/mainboard/amd/db800/romstage.c | 3 +-- src/mainboard/amd/norwich/romstage.c | 3 +-- src/mainboard/amd/rumba/romstage.c | 2 +- src/mainboard/artecgroup/dbe61/romstage.c | 3 +-- src/mainboard/bachmann/ot200/romstage.c | 3 +-- src/mainboard/digitallogic/msm800sev/romstage.c | 3 +-- src/mainboard/iei/pcisa-lx-800-r10/romstage.c | 3 +-- src/mainboard/iei/pm-lx-800-r11/romstage.c | 1 - src/mainboard/iei/pm-lx2-800-r10/romstage.c | 1 - src/mainboard/lippert/hurricane-lx/romstage.c | 3 +-- src/mainboard/lippert/literunner-lx/romstage.c | 3 +-- src/mainboard/lippert/roadrunner-lx/romstage.c | 3 +-- src/mainboard/lippert/spacerunner-lx/romstage.c | 3 +-- src/mainboard/pcengines/alix1c/romstage.c | 3 +-- src/mainboard/pcengines/alix2d/romstage.c | 3 +-- src/mainboard/traverse/geos/romstage.c | 3 +-- src/mainboard/winent/pl6064/romstage.c | 3 +-- src/mainboard/wyse/s50/romstage.c | 2 +- src/southbridge/amd/cs5536/Makefile.inc | 3 ++- src/southbridge/amd/cs5536/cs5536.h | 1 + src/southbridge/amd/cs5536/early_setup.c | 2 +- 22 files changed, 21 insertions(+), 36 deletions(-) diff --git a/src/mainboard/aaeon/pfm-540i_revb/romstage.c b/src/mainboard/aaeon/pfm-540i_revb/romstage.c index 47c411a..60d3421 100644 --- a/src/mainboard/aaeon/pfm-540i_revb/romstage.c +++ b/src/mainboard/aaeon/pfm-540i_revb/romstage.c @@ -31,10 +31,9 @@ #include "cpu/x86/bist.h" #include "cpu/x86/msr.h" #include <cpu/amd/lxdef.h> -#include "southbridge/amd/cs5536/cs5536.h" #include <spd.h> #include <southbridge/amd/cs5536/smbus.h> -#include "southbridge/amd/cs5536/early_setup.c" +#include <southbridge/amd/cs5536/cs5536.h> #include <superio/smsc/smscsuperio/smscsuperio.h> #include "northbridge/amd/lx/raminit.h" diff --git a/src/mainboard/amd/db800/romstage.c b/src/mainboard/amd/db800/romstage.c index 5db1d98..c864415 100644 --- a/src/mainboard/amd/db800/romstage.c +++ b/src/mainboard/amd/db800/romstage.c @@ -28,10 +28,9 @@ #include "cpu/x86/bist.h" #include "cpu/x86/msr.h" #include <cpu/amd/lxdef.h> -#include "southbridge/amd/cs5536/cs5536.h" #include <spd.h> #include <southbridge/amd/cs5536/smbus.h> -#include "southbridge/amd/cs5536/early_setup.c" +#include <southbridge/amd/cs5536/cs5536.h> #include <superio/winbond/common/winbond.h> #include <superio/winbond/w83627hf/w83627hf.h> #include "northbridge/amd/lx/raminit.h" diff --git a/src/mainboard/amd/norwich/romstage.c b/src/mainboard/amd/norwich/romstage.c index 4f82db5..0908c7b 100644 --- a/src/mainboard/amd/norwich/romstage.c +++ b/src/mainboard/amd/norwich/romstage.c @@ -28,10 +28,9 @@ #include "cpu/x86/bist.h" #include "cpu/x86/msr.h" #include <cpu/amd/lxdef.h> -#include "southbridge/amd/cs5536/cs5536.h" #include <spd.h> #include <southbridge/amd/cs5536/smbus.h> -#include "southbridge/amd/cs5536/early_setup.c" +#include <southbridge/amd/cs5536/cs5536.h> #include "northbridge/amd/lx/raminit.h" int spd_read_byte(unsigned int device, unsigned int address) diff --git a/src/mainboard/amd/rumba/romstage.c b/src/mainboard/amd/rumba/romstage.c index 5a0f8a4..839027f 100644 --- a/src/mainboard/amd/rumba/romstage.c +++ b/src/mainboard/amd/rumba/romstage.c @@ -11,7 +11,7 @@ #include <cpu/amd/gx2def.h> #include <spd.h> #include <southbridge/amd/cs5536/smbus.h> -#include "southbridge/amd/cs5536/early_setup.c" +#include <southbridge/amd/cs5536/cs5536.h> #define SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP1) diff --git a/src/mainboard/artecgroup/dbe61/romstage.c b/src/mainboard/artecgroup/dbe61/romstage.c index 4631027..9037daf 100644 --- a/src/mainboard/artecgroup/dbe61/romstage.c +++ b/src/mainboard/artecgroup/dbe61/romstage.c @@ -28,11 +28,10 @@ #include "cpu/x86/bist.h" #include "cpu/x86/msr.h" #include <cpu/amd/lxdef.h> -#include "southbridge/amd/cs5536/cs5536.h" #include "spd_table.h" #include <spd.h> #include <southbridge/amd/cs5536/smbus.h> -#include "southbridge/amd/cs5536/early_setup.c" +#include <southbridge/amd/cs5536/cs5536.h> #include "northbridge/amd/lx/raminit.h" int spd_read_byte(unsigned int device, unsigned int address) diff --git a/src/mainboard/bachmann/ot200/romstage.c b/src/mainboard/bachmann/ot200/romstage.c index 684e0f9..8be4c96 100644 --- a/src/mainboard/bachmann/ot200/romstage.c +++ b/src/mainboard/bachmann/ot200/romstage.c @@ -30,9 +30,8 @@ #include "cpu/x86/bist.h" #include "cpu/x86/msr.h" #include <cpu/amd/lxdef.h> -#include "southbridge/amd/cs5536/cs5536.h" #include <southbridge/amd/cs5536/smbus.h> -#include "southbridge/amd/cs5536/early_setup.c" +#include <southbridge/amd/cs5536/cs5536.h> #include "northbridge/amd/lx/raminit.h" int spd_read_byte(unsigned int device, unsigned int address) diff --git a/src/mainboard/digitallogic/msm800sev/romstage.c b/src/mainboard/digitallogic/msm800sev/romstage.c index 932e0aa..b77ea44 100644 --- a/src/mainboard/digitallogic/msm800sev/romstage.c +++ b/src/mainboard/digitallogic/msm800sev/romstage.c @@ -9,10 +9,9 @@ #include "cpu/x86/msr.h" #include <cpu/amd/lxdef.h> #include <cpu/amd/car.h> -#include "southbridge/amd/cs5536/cs5536.h" #include <spd.h> #include <southbridge/amd/cs5536/smbus.h> -#include "southbridge/amd/cs5536/early_setup.c" +#include <southbridge/amd/cs5536/cs5536.h> #include <superio/winbond/common/winbond.h> #include <superio/winbond/w83627hf/w83627hf.h> #include "northbridge/amd/lx/raminit.h" diff --git a/src/mainboard/iei/pcisa-lx-800-r10/romstage.c b/src/mainboard/iei/pcisa-lx-800-r10/romstage.c index 7de802c..cd12d9c 100644 --- a/src/mainboard/iei/pcisa-lx-800-r10/romstage.c +++ b/src/mainboard/iei/pcisa-lx-800-r10/romstage.c @@ -28,10 +28,9 @@ #include "cpu/x86/bist.h" #include "cpu/x86/msr.h" #include <cpu/amd/lxdef.h> -#include "southbridge/amd/cs5536/cs5536.h" #include <spd.h> #include <southbridge/amd/cs5536/smbus.h> -#include "southbridge/amd/cs5536/early_setup.c" +#include <southbridge/amd/cs5536/cs5536.h> #include <superio/winbond/common/winbond.h> #include <superio/winbond/w83627hf/w83627hf.h> #include "northbridge/amd/lx/raminit.h" diff --git a/src/mainboard/iei/pm-lx-800-r11/romstage.c b/src/mainboard/iei/pm-lx-800-r11/romstage.c index b591f0d..3b3d2f8 100644 --- a/src/mainboard/iei/pm-lx-800-r11/romstage.c +++ b/src/mainboard/iei/pm-lx-800-r11/romstage.c @@ -31,7 +31,6 @@ #include <cpu/amd/lxdef.h> #include <southbridge/amd/cs5536/cs5536.h> #include <southbridge/amd/cs5536/smbus.h> -#include <southbridge/amd/cs5536/early_setup.c> #include <superio/winbond/common/winbond.h> #include <superio/winbond/w83627ehg/w83627ehg.h> #include <northbridge/amd/lx/raminit.h> diff --git a/src/mainboard/iei/pm-lx2-800-r10/romstage.c b/src/mainboard/iei/pm-lx2-800-r10/romstage.c index ef62ce9..fa4612e 100644 --- a/src/mainboard/iei/pm-lx2-800-r10/romstage.c +++ b/src/mainboard/iei/pm-lx2-800-r10/romstage.c @@ -32,7 +32,6 @@ #include <cpu/amd/lxdef.h> #include <southbridge/amd/cs5536/cs5536.h> #include <southbridge/amd/cs5536/smbus.h> -#include <southbridge/amd/cs5536/early_setup.c> #include <superio/smsc/smscsuperio/smscsuperio.h> #include <northbridge/amd/lx/raminit.h> diff --git a/src/mainboard/lippert/hurricane-lx/romstage.c b/src/mainboard/lippert/hurricane-lx/romstage.c index 71da941..f8ce320 100644 --- a/src/mainboard/lippert/hurricane-lx/romstage.c +++ b/src/mainboard/lippert/hurricane-lx/romstage.c @@ -31,10 +31,9 @@ #include "cpu/x86/bist.h" #include "cpu/x86/msr.h" #include <cpu/amd/lxdef.h> -#include "southbridge/amd/cs5536/cs5536.h" #include <spd.h> #include <southbridge/amd/cs5536/smbus.h> -#include "southbridge/amd/cs5536/early_setup.c" +#include <southbridge/amd/cs5536/cs5536.h> #include <superio/ite/common/ite.h> #include <superio/ite/it8712f/it8712f.h> #include "northbridge/amd/lx/raminit.h" diff --git a/src/mainboard/lippert/literunner-lx/romstage.c b/src/mainboard/lippert/literunner-lx/romstage.c index dc90053..22a6ff1 100644 --- a/src/mainboard/lippert/literunner-lx/romstage.c +++ b/src/mainboard/lippert/literunner-lx/romstage.c @@ -32,9 +32,8 @@ #include "cpu/x86/bist.h" #include "cpu/x86/msr.h" #include <cpu/amd/lxdef.h> -#include "southbridge/amd/cs5536/cs5536.h" #include <southbridge/amd/cs5536/smbus.h> -#include "southbridge/amd/cs5536/early_setup.c" +#include <southbridge/amd/cs5536/cs5536.h> #include <superio/ite/common/ite.h> #include <superio/ite/it8712f/it8712f.h> #include "northbridge/amd/lx/raminit.h" diff --git a/src/mainboard/lippert/roadrunner-lx/romstage.c b/src/mainboard/lippert/roadrunner-lx/romstage.c index 9d970b7..44a7632 100644 --- a/src/mainboard/lippert/roadrunner-lx/romstage.c +++ b/src/mainboard/lippert/roadrunner-lx/romstage.c @@ -31,10 +31,9 @@ #include "cpu/x86/bist.h" #include "cpu/x86/msr.h" #include <cpu/amd/lxdef.h> -#include "southbridge/amd/cs5536/cs5536.h" #include <spd.h> #include <southbridge/amd/cs5536/smbus.h> -#include "southbridge/amd/cs5536/early_setup.c" +#include <southbridge/amd/cs5536/cs5536.h> #include <superio/ite/common/ite.h> #include <superio/ite/it8712f/it8712f.h> #include "northbridge/amd/lx/raminit.h" diff --git a/src/mainboard/lippert/spacerunner-lx/romstage.c b/src/mainboard/lippert/spacerunner-lx/romstage.c index 5964388..a30bb15 100644 --- a/src/mainboard/lippert/spacerunner-lx/romstage.c +++ b/src/mainboard/lippert/spacerunner-lx/romstage.c @@ -32,9 +32,8 @@ #include "cpu/x86/bist.h" #include "cpu/x86/msr.h" #include <cpu/amd/lxdef.h> -#include "southbridge/amd/cs5536/cs5536.h" #include <southbridge/amd/cs5536/smbus.h> -#include "southbridge/amd/cs5536/early_setup.c" +#include <southbridge/amd/cs5536/cs5536.h> #include <superio/ite/common/ite.h> #include <superio/ite/it8712f/it8712f.h> #include "northbridge/amd/lx/raminit.h" diff --git a/src/mainboard/pcengines/alix1c/romstage.c b/src/mainboard/pcengines/alix1c/romstage.c index 080553b..c17b7d0 100644 --- a/src/mainboard/pcengines/alix1c/romstage.c +++ b/src/mainboard/pcengines/alix1c/romstage.c @@ -30,7 +30,6 @@ #include "cpu/x86/msr.h" #include <cpu/amd/lxdef.h> #include <cpu/amd/car.h> -#include "southbridge/amd/cs5536/cs5536.h" #include "northbridge/amd/lx/raminit.h" #define SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP1) @@ -38,7 +37,7 @@ /* The ALIX1.C has no SMBus; the setup is hard-wired. */ void cs5536_enable_smbus(void) { } -#include "southbridge/amd/cs5536/early_setup.c" +#include <southbridge/amd/cs5536/cs5536.h> #include <superio/winbond/common/winbond.h> #include <superio/winbond/w83627hf/w83627hf.h> diff --git a/src/mainboard/pcengines/alix2d/romstage.c b/src/mainboard/pcengines/alix2d/romstage.c index 07bf77e..01ee2c0 100644 --- a/src/mainboard/pcengines/alix2d/romstage.c +++ b/src/mainboard/pcengines/alix2d/romstage.c @@ -30,7 +30,6 @@ #include "cpu/x86/msr.h" #include <cpu/amd/lxdef.h> #include <cpu/amd/car.h> -#include "southbridge/amd/cs5536/cs5536.h" #include "northbridge/amd/lx/raminit.h" #define SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP1) @@ -38,7 +37,7 @@ /* The ALIX.2D has no SMBus; the setup is hard-wired. */ void cs5536_enable_smbus(void) { } -#include "southbridge/amd/cs5536/early_setup.c" +#include <southbridge/amd/cs5536/cs5536.h> /* The part is a Hynix hy5du121622ctp-d43. * diff --git a/src/mainboard/traverse/geos/romstage.c b/src/mainboard/traverse/geos/romstage.c index 95ceffa..dbca981 100644 --- a/src/mainboard/traverse/geos/romstage.c +++ b/src/mainboard/traverse/geos/romstage.c @@ -29,10 +29,9 @@ #include "cpu/x86/bist.h" #include "cpu/x86/msr.h" #include <cpu/amd/lxdef.h> -#include "southbridge/amd/cs5536/cs5536.h" #include <spd.h> #include <southbridge/amd/cs5536/smbus.h> -#include "southbridge/amd/cs5536/early_setup.c" +#include <southbridge/amd/cs5536/cs5536.h> #include "northbridge/amd/lx/raminit.h" int spd_read_byte(unsigned int device, unsigned int address) diff --git a/src/mainboard/winent/pl6064/romstage.c b/src/mainboard/winent/pl6064/romstage.c index 9d1f631..8bb77ee 100644 --- a/src/mainboard/winent/pl6064/romstage.c +++ b/src/mainboard/winent/pl6064/romstage.c @@ -30,10 +30,9 @@ #include "cpu/x86/bist.h" #include "cpu/x86/msr.h" #include <cpu/amd/lxdef.h> -#include "southbridge/amd/cs5536/cs5536.h" #include <spd.h> #include <southbridge/amd/cs5536/smbus.h> -#include "southbridge/amd/cs5536/early_setup.c" +#include <southbridge/amd/cs5536/cs5536.h> #include <superio/winbond/common/winbond.h> #include <superio/winbond/w83627hf/w83627hf.h> #include "northbridge/amd/lx/raminit.h" diff --git a/src/mainboard/wyse/s50/romstage.c b/src/mainboard/wyse/s50/romstage.c index deeeaf5..6efc721 100644 --- a/src/mainboard/wyse/s50/romstage.c +++ b/src/mainboard/wyse/s50/romstage.c @@ -31,7 +31,7 @@ #include <cpu/amd/gx2def.h> #include <spd.h> #include <southbridge/amd/cs5536/smbus.h> -#include "southbridge/amd/cs5536/early_setup.c" +#include <southbridge/amd/cs5536/cs5536.h> static inline int spd_read_byte(unsigned int device, unsigned int address) { diff --git a/src/southbridge/amd/cs5536/Makefile.inc b/src/southbridge/amd/cs5536/Makefile.inc index f36dcc5..ae530f9 100644 --- a/src/southbridge/amd/cs5536/Makefile.inc +++ b/src/southbridge/amd/cs5536/Makefile.inc @@ -21,4 +21,5 @@ ramstage-y += cs5536.c ramstage-y += ide.c ramstage-y += pirq.c ramstage-y += smbus.c -romstage-y += smbus.c \ No newline at end of file +romstage-y += smbus.c +romstage-y += early_setup.c diff --git a/src/southbridge/amd/cs5536/cs5536.h b/src/southbridge/amd/cs5536/cs5536.h index a76355f..2befaf0 100644 --- a/src/southbridge/amd/cs5536/cs5536.h +++ b/src/southbridge/amd/cs5536/cs5536.h @@ -446,6 +446,7 @@ #if defined(__PRE_RAM__) void cs5536_setup_onchipuart(int uart); void cs5536_disable_internal_uart(void); +void cs5536_early_setup(void); #else void chipsetinit(void); #endif diff --git a/src/southbridge/amd/cs5536/early_setup.c b/src/southbridge/amd/cs5536/early_setup.c index 02af392..c4ff235 100644 --- a/src/southbridge/amd/cs5536/early_setup.c +++ b/src/southbridge/amd/cs5536/early_setup.c @@ -264,7 +264,7 @@ void cs5536_enable_smbus(void) * and we don't want to hang on serial, so they are * commented out */ -static void cs5536_early_setup(void) +void cs5536_early_setup(void) { msr_t msr;

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Patch set updated for coreboot: f48f9da southbridge/amd/cs5536/early_setup.c: Add missing includes
by Edward O'Callaghan 09 Aug '14

09 Aug '14

Edward O'Callaghan (eocallaghan(a)alterapraxis.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/6558 -gerrit commit f48f9dae605e2f4c6c88635f82e44d45c81b319a Author: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> Date: Sat Aug 9 21:35:39 2014 +1000 southbridge/amd/cs5536/early_setup.c: Add missing includes Change-Id: Ida73108316f81a6bfabcee7b9ba5637490d0a5a3 Signed-off-by: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> --- src/southbridge/amd/cs5536/early_setup.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/src/southbridge/amd/cs5536/early_setup.c b/src/southbridge/amd/cs5536/early_setup.c index d9a042a..cff6512 100644 --- a/src/southbridge/amd/cs5536/early_setup.c +++ b/src/southbridge/amd/cs5536/early_setup.c @@ -22,6 +22,11 @@ * This file implements the initialization sequence documented in section 4.2 of * AMD Geode GX Processor CS5536 Companion Device GeodeROM Porting Guide. */ +#include <arch/io.h> +#include <cpu/amd/lxdef.h> +#include <cpu/x86/msr.h> +#include <stdint.h> + #include "cs5536.h" /**

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Patch set updated for coreboot: 32518e8 southbridge/amd/cs5536: Make cs5536_enable_smbus() a weak symbol
by Edward O'Callaghan 09 Aug '14

09 Aug '14

Edward O'Callaghan (eocallaghan(a)alterapraxis.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/6554 -gerrit commit 32518e825cfee458628409a14ce8c105251b330a Author: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> Date: Sat Aug 9 20:22:22 2014 +1000 southbridge/amd/cs5536: Make cs5536_enable_smbus() a weak symbol On some boards the SMBus is hardwired and so we need to override cs5536_enable_smbus() with a dummy function in the board support. Thus we make cs5536_enable_smbus() a weak symbol. Fix boards to match by removing the .c include. Change-Id: Iada97edf0591556b64eb8b63752379fdf0366ece Signed-off-by: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> --- src/mainboard/aaeon/pfm-540i_revb/romstage.c | 1 - src/mainboard/amd/db800/romstage.c | 1 - src/mainboard/amd/norwich/romstage.c | 1 - src/mainboard/amd/rumba/romstage.c | 1 - src/mainboard/artecgroup/dbe61/romstage.c | 1 - src/mainboard/bachmann/ot200/romstage.c | 1 - src/mainboard/digitallogic/msm800sev/romstage.c | 1 - src/mainboard/iei/pcisa-lx-800-r10/romstage.c | 1 - src/mainboard/iei/pm-lx-800-r11/romstage.c | 1 - src/mainboard/iei/pm-lx2-800-r10/romstage.c | 1 - src/mainboard/lippert/hurricane-lx/romstage.c | 1 - src/mainboard/lippert/literunner-lx/romstage.c | 1 - src/mainboard/lippert/roadrunner-lx/romstage.c | 1 - src/mainboard/lippert/spacerunner-lx/romstage.c | 1 - src/mainboard/pcengines/alix1c/romstage.c | 2 +- src/mainboard/pcengines/alix2d/romstage.c | 2 +- src/mainboard/traverse/geos/romstage.c | 1 - src/mainboard/winent/pl6064/romstage.c | 1 - src/mainboard/wyse/s50/romstage.c | 1 - src/southbridge/amd/cs5536/Makefile.inc | 3 ++- src/southbridge/amd/cs5536/cs5536.h | 6 ++++++ src/southbridge/amd/cs5536/early_setup.c | 1 + src/southbridge/amd/cs5536/early_smbus.c | 7 ++++--- 23 files changed, 15 insertions(+), 23 deletions(-) diff --git a/src/mainboard/aaeon/pfm-540i_revb/romstage.c b/src/mainboard/aaeon/pfm-540i_revb/romstage.c index f80ef95..6ab4662 100644 --- a/src/mainboard/aaeon/pfm-540i_revb/romstage.c +++ b/src/mainboard/aaeon/pfm-540i_revb/romstage.c @@ -33,7 +33,6 @@ #include <cpu/amd/lxdef.h> #include "southbridge/amd/cs5536/cs5536.h" #include <spd.h> -#include "southbridge/amd/cs5536/early_smbus.c" #include "southbridge/amd/cs5536/early_setup.c" #include <superio/smsc/smscsuperio/smscsuperio.h> #include "northbridge/amd/lx/raminit.h" diff --git a/src/mainboard/amd/db800/romstage.c b/src/mainboard/amd/db800/romstage.c index 564380e..7c73903 100644 --- a/src/mainboard/amd/db800/romstage.c +++ b/src/mainboard/amd/db800/romstage.c @@ -30,7 +30,6 @@ #include <cpu/amd/lxdef.h> #include "southbridge/amd/cs5536/cs5536.h" #include <spd.h> -#include "southbridge/amd/cs5536/early_smbus.c" #include "southbridge/amd/cs5536/early_setup.c" #include <superio/winbond/common/winbond.h> #include <superio/winbond/w83627hf/w83627hf.h> diff --git a/src/mainboard/amd/norwich/romstage.c b/src/mainboard/amd/norwich/romstage.c index 9322508..0180229 100644 --- a/src/mainboard/amd/norwich/romstage.c +++ b/src/mainboard/amd/norwich/romstage.c @@ -30,7 +30,6 @@ #include <cpu/amd/lxdef.h> #include "southbridge/amd/cs5536/cs5536.h" #include <spd.h> -#include "southbridge/amd/cs5536/early_smbus.c" #include "southbridge/amd/cs5536/early_setup.c" #include "northbridge/amd/lx/raminit.h" diff --git a/src/mainboard/amd/rumba/romstage.c b/src/mainboard/amd/rumba/romstage.c index c5a3fc3..557d394 100644 --- a/src/mainboard/amd/rumba/romstage.c +++ b/src/mainboard/amd/rumba/romstage.c @@ -10,7 +10,6 @@ #include "cpu/x86/msr.h" #include <cpu/amd/gx2def.h> #include <spd.h> -#include "southbridge/amd/cs5536/early_smbus.c" #include "southbridge/amd/cs5536/early_setup.c" #define SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP1) diff --git a/src/mainboard/artecgroup/dbe61/romstage.c b/src/mainboard/artecgroup/dbe61/romstage.c index 7276b30..fdbb700 100644 --- a/src/mainboard/artecgroup/dbe61/romstage.c +++ b/src/mainboard/artecgroup/dbe61/romstage.c @@ -31,7 +31,6 @@ #include "southbridge/amd/cs5536/cs5536.h" #include "spd_table.h" #include <spd.h> -#include "southbridge/amd/cs5536/early_smbus.c" #include "southbridge/amd/cs5536/early_setup.c" #include "northbridge/amd/lx/raminit.h" diff --git a/src/mainboard/bachmann/ot200/romstage.c b/src/mainboard/bachmann/ot200/romstage.c index 39385c7..16f4329 100644 --- a/src/mainboard/bachmann/ot200/romstage.c +++ b/src/mainboard/bachmann/ot200/romstage.c @@ -31,7 +31,6 @@ #include "cpu/x86/msr.h" #include <cpu/amd/lxdef.h> #include "southbridge/amd/cs5536/cs5536.h" -#include "southbridge/amd/cs5536/early_smbus.c" #include "southbridge/amd/cs5536/early_setup.c" #include "northbridge/amd/lx/raminit.h" diff --git a/src/mainboard/digitallogic/msm800sev/romstage.c b/src/mainboard/digitallogic/msm800sev/romstage.c index 986e918..2170677 100644 --- a/src/mainboard/digitallogic/msm800sev/romstage.c +++ b/src/mainboard/digitallogic/msm800sev/romstage.c @@ -11,7 +11,6 @@ #include <cpu/amd/car.h> #include "southbridge/amd/cs5536/cs5536.h" #include <spd.h> -#include "southbridge/amd/cs5536/early_smbus.c" #include "southbridge/amd/cs5536/early_setup.c" #include <superio/winbond/common/winbond.h> #include <superio/winbond/w83627hf/w83627hf.h> diff --git a/src/mainboard/iei/pcisa-lx-800-r10/romstage.c b/src/mainboard/iei/pcisa-lx-800-r10/romstage.c index a75691c..3e71432 100644 --- a/src/mainboard/iei/pcisa-lx-800-r10/romstage.c +++ b/src/mainboard/iei/pcisa-lx-800-r10/romstage.c @@ -30,7 +30,6 @@ #include <cpu/amd/lxdef.h> #include "southbridge/amd/cs5536/cs5536.h" #include <spd.h> -#include "southbridge/amd/cs5536/early_smbus.c" #include "southbridge/amd/cs5536/early_setup.c" #include <superio/winbond/common/winbond.h> #include <superio/winbond/w83627hf/w83627hf.h> diff --git a/src/mainboard/iei/pm-lx-800-r11/romstage.c b/src/mainboard/iei/pm-lx-800-r11/romstage.c index bf34e9a..855a55b 100644 --- a/src/mainboard/iei/pm-lx-800-r11/romstage.c +++ b/src/mainboard/iei/pm-lx-800-r11/romstage.c @@ -30,7 +30,6 @@ #include <cpu/x86/msr.h> #include <cpu/amd/lxdef.h> #include <southbridge/amd/cs5536/cs5536.h> -#include <southbridge/amd/cs5536/early_smbus.c> #include <southbridge/amd/cs5536/early_setup.c> #include <superio/winbond/common/winbond.h> #include <superio/winbond/w83627ehg/w83627ehg.h> diff --git a/src/mainboard/iei/pm-lx2-800-r10/romstage.c b/src/mainboard/iei/pm-lx2-800-r10/romstage.c index b34bce4..dafb2bd 100644 --- a/src/mainboard/iei/pm-lx2-800-r10/romstage.c +++ b/src/mainboard/iei/pm-lx2-800-r10/romstage.c @@ -31,7 +31,6 @@ #include <cpu/x86/msr.h> #include <cpu/amd/lxdef.h> #include <southbridge/amd/cs5536/cs5536.h> -#include <southbridge/amd/cs5536/early_smbus.c> #include <southbridge/amd/cs5536/early_setup.c> #include <superio/smsc/smscsuperio/smscsuperio.h> #include <northbridge/amd/lx/raminit.h> diff --git a/src/mainboard/lippert/hurricane-lx/romstage.c b/src/mainboard/lippert/hurricane-lx/romstage.c index 063721b..f9f7435 100644 --- a/src/mainboard/lippert/hurricane-lx/romstage.c +++ b/src/mainboard/lippert/hurricane-lx/romstage.c @@ -33,7 +33,6 @@ #include <cpu/amd/lxdef.h> #include "southbridge/amd/cs5536/cs5536.h" #include <spd.h> -#include "southbridge/amd/cs5536/early_smbus.c" #include "southbridge/amd/cs5536/early_setup.c" #include <superio/ite/common/ite.h> #include <superio/ite/it8712f/it8712f.h> diff --git a/src/mainboard/lippert/literunner-lx/romstage.c b/src/mainboard/lippert/literunner-lx/romstage.c index 174620a..3b6d496 100644 --- a/src/mainboard/lippert/literunner-lx/romstage.c +++ b/src/mainboard/lippert/literunner-lx/romstage.c @@ -33,7 +33,6 @@ #include "cpu/x86/msr.h" #include <cpu/amd/lxdef.h> #include "southbridge/amd/cs5536/cs5536.h" -#include "southbridge/amd/cs5536/early_smbus.c" #include "southbridge/amd/cs5536/early_setup.c" #include <superio/ite/common/ite.h> #include <superio/ite/it8712f/it8712f.h> diff --git a/src/mainboard/lippert/roadrunner-lx/romstage.c b/src/mainboard/lippert/roadrunner-lx/romstage.c index 2642373..15bfa07 100644 --- a/src/mainboard/lippert/roadrunner-lx/romstage.c +++ b/src/mainboard/lippert/roadrunner-lx/romstage.c @@ -33,7 +33,6 @@ #include <cpu/amd/lxdef.h> #include "southbridge/amd/cs5536/cs5536.h" #include <spd.h> -#include "southbridge/amd/cs5536/early_smbus.c" #include "southbridge/amd/cs5536/early_setup.c" #include <superio/ite/common/ite.h> #include <superio/ite/it8712f/it8712f.h> diff --git a/src/mainboard/lippert/spacerunner-lx/romstage.c b/src/mainboard/lippert/spacerunner-lx/romstage.c index 9d5539e..d24a067 100644 --- a/src/mainboard/lippert/spacerunner-lx/romstage.c +++ b/src/mainboard/lippert/spacerunner-lx/romstage.c @@ -33,7 +33,6 @@ #include "cpu/x86/msr.h" #include <cpu/amd/lxdef.h> #include "southbridge/amd/cs5536/cs5536.h" -#include "southbridge/amd/cs5536/early_smbus.c" #include "southbridge/amd/cs5536/early_setup.c" #include <superio/ite/common/ite.h> #include <superio/ite/it8712f/it8712f.h> diff --git a/src/mainboard/pcengines/alix1c/romstage.c b/src/mainboard/pcengines/alix1c/romstage.c index 204f0bd..080553b 100644 --- a/src/mainboard/pcengines/alix1c/romstage.c +++ b/src/mainboard/pcengines/alix1c/romstage.c @@ -36,7 +36,7 @@ #define SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP1) /* The ALIX1.C has no SMBus; the setup is hard-wired. */ -static void cs5536_enable_smbus(void) { } +void cs5536_enable_smbus(void) { } #include "southbridge/amd/cs5536/early_setup.c" #include <superio/winbond/common/winbond.h> diff --git a/src/mainboard/pcengines/alix2d/romstage.c b/src/mainboard/pcengines/alix2d/romstage.c index 18453ac..07bf77e 100644 --- a/src/mainboard/pcengines/alix2d/romstage.c +++ b/src/mainboard/pcengines/alix2d/romstage.c @@ -36,7 +36,7 @@ #define SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP1) /* The ALIX.2D has no SMBus; the setup is hard-wired. */ -static void cs5536_enable_smbus(void) { } +void cs5536_enable_smbus(void) { } #include "southbridge/amd/cs5536/early_setup.c" diff --git a/src/mainboard/traverse/geos/romstage.c b/src/mainboard/traverse/geos/romstage.c index 36d55a7..e7f782b 100644 --- a/src/mainboard/traverse/geos/romstage.c +++ b/src/mainboard/traverse/geos/romstage.c @@ -31,7 +31,6 @@ #include <cpu/amd/lxdef.h> #include "southbridge/amd/cs5536/cs5536.h" #include <spd.h> -#include "southbridge/amd/cs5536/early_smbus.c" #include "southbridge/amd/cs5536/early_setup.c" #include "northbridge/amd/lx/raminit.h" diff --git a/src/mainboard/winent/pl6064/romstage.c b/src/mainboard/winent/pl6064/romstage.c index 6a38355..4bf213d 100644 --- a/src/mainboard/winent/pl6064/romstage.c +++ b/src/mainboard/winent/pl6064/romstage.c @@ -32,7 +32,6 @@ #include <cpu/amd/lxdef.h> #include "southbridge/amd/cs5536/cs5536.h" #include <spd.h> -#include "southbridge/amd/cs5536/early_smbus.c" #include "southbridge/amd/cs5536/early_setup.c" #include <superio/winbond/common/winbond.h> #include <superio/winbond/w83627hf/w83627hf.h> diff --git a/src/mainboard/wyse/s50/romstage.c b/src/mainboard/wyse/s50/romstage.c index 9e5dd53..73a143e 100644 --- a/src/mainboard/wyse/s50/romstage.c +++ b/src/mainboard/wyse/s50/romstage.c @@ -30,7 +30,6 @@ #include "cpu/x86/msr.h" #include <cpu/amd/gx2def.h> #include <spd.h> -#include "southbridge/amd/cs5536/early_smbus.c" #include "southbridge/amd/cs5536/early_setup.c" static inline int spd_read_byte(unsigned int device, unsigned int address) diff --git a/src/southbridge/amd/cs5536/Makefile.inc b/src/southbridge/amd/cs5536/Makefile.inc index f36dcc5..9e159c5 100644 --- a/src/southbridge/amd/cs5536/Makefile.inc +++ b/src/southbridge/amd/cs5536/Makefile.inc @@ -21,4 +21,5 @@ ramstage-y += cs5536.c ramstage-y += ide.c ramstage-y += pirq.c ramstage-y += smbus.c -romstage-y += smbus.c \ No newline at end of file +romstage-y += smbus.c +romstage-y += early_smbus.c diff --git a/src/southbridge/amd/cs5536/cs5536.h b/src/southbridge/amd/cs5536/cs5536.h index b722560..530ab2e 100644 --- a/src/southbridge/amd/cs5536/cs5536.h +++ b/src/southbridge/amd/cs5536/cs5536.h @@ -451,4 +451,10 @@ void chipsetinit(void); #endif #endif +/** + * Note: Some boards do not have SMBus and are hard-wired, so we leave this + * symbol weak as to be able to override it in 'romstage.c' of board support. + */ +void cs5536_enable_smbus(void) __attribute__((weak)); + #endif /* _CS5536_H */ diff --git a/src/southbridge/amd/cs5536/early_setup.c b/src/southbridge/amd/cs5536/early_setup.c index e6ef8ad..d9a042a 100644 --- a/src/southbridge/amd/cs5536/early_setup.c +++ b/src/southbridge/amd/cs5536/early_setup.c @@ -22,6 +22,7 @@ * This file implements the initialization sequence documented in section 4.2 of * AMD Geode GX Processor CS5536 Companion Device GeodeROM Porting Guide. */ +#include "cs5536.h" /** * @brief Setup PCI IDSEL for CS5536 diff --git a/src/southbridge/amd/cs5536/early_smbus.c b/src/southbridge/amd/cs5536/early_smbus.c index d1483b1..e80cc0e 100644 --- a/src/southbridge/amd/cs5536/early_smbus.c +++ b/src/southbridge/amd/cs5536/early_smbus.c @@ -17,20 +17,21 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ +#include <arch/io.h> +#include <stdint.h> + #include "cs5536.h" #include "smbus.h" /* initialization for SMBus Controller */ -static void cs5536_enable_smbus(void) +void cs5536_enable_smbus(void) { - /* Set SCL freq and enable SMB controller */ /*outb((0x20 << 1) | SMB_CTRL2_ENABLE, smbus_io_base + SMB_CTRL2); */ outb((0x7F << 1) | SMB_CTRL2_ENABLE, SMBUS_IO_BASE + SMB_CTRL2); /* Setup SMBus host controller address to 0xEF */ outb((0xEF | SMB_ADD_SAEN), SMBUS_IO_BASE + SMB_ADD); - } static inline int smbus_read_byte(unsigned device, unsigned address)

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Patch set updated for coreboot: 8da911a southbridge/amd/cs5536: Use prototype for cs5536_early_setup()
by Edward O'Callaghan 09 Aug '14

09 Aug '14

Edward O'Callaghan (eocallaghan(a)alterapraxis.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/6555 -gerrit commit 8da911ad4e0aaef7f92a5e0d6a8c65bb89704e8d Author: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> Date: Sat Aug 9 21:03:38 2014 +1000 southbridge/amd/cs5536: Use prototype for cs5536_early_setup() Use a prototype for cs5536_early_setup() over using #include .c and fix mainboard's to match. Change-Id: I88d6d4abbd825d8d77dadf1755226f14f99a9b63 Signed-off-by: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> --- src/mainboard/aaeon/pfm-540i_revb/romstage.c | 3 +-- src/mainboard/amd/db800/romstage.c | 3 +-- src/mainboard/amd/norwich/romstage.c | 3 +-- src/mainboard/amd/rumba/romstage.c | 2 +- src/mainboard/artecgroup/dbe61/romstage.c | 3 +-- src/mainboard/bachmann/ot200/romstage.c | 3 +-- src/mainboard/digitallogic/msm800sev/romstage.c | 3 +-- src/mainboard/iei/pcisa-lx-800-r10/romstage.c | 3 +-- src/mainboard/iei/pm-lx-800-r11/romstage.c | 2 +- src/mainboard/iei/pm-lx2-800-r10/romstage.c | 1 - src/mainboard/lippert/hurricane-lx/romstage.c | 3 +-- src/mainboard/lippert/literunner-lx/romstage.c | 3 +-- src/mainboard/lippert/roadrunner-lx/romstage.c | 3 +-- src/mainboard/lippert/spacerunner-lx/romstage.c | 3 +-- src/mainboard/pcengines/alix1c/romstage.c | 3 +-- src/mainboard/pcengines/alix2d/romstage.c | 3 +-- src/mainboard/traverse/geos/romstage.c | 3 +-- src/mainboard/winent/pl6064/romstage.c | 3 +-- src/mainboard/wyse/s50/romstage.c | 2 +- src/southbridge/amd/cs5536/Makefile.inc | 1 + src/southbridge/amd/cs5536/cs5536.h | 1 + src/southbridge/amd/cs5536/early_setup.c | 2 +- 22 files changed, 21 insertions(+), 35 deletions(-) diff --git a/src/mainboard/aaeon/pfm-540i_revb/romstage.c b/src/mainboard/aaeon/pfm-540i_revb/romstage.c index 6ab4662..0b62cd9 100644 --- a/src/mainboard/aaeon/pfm-540i_revb/romstage.c +++ b/src/mainboard/aaeon/pfm-540i_revb/romstage.c @@ -31,9 +31,8 @@ #include "cpu/x86/bist.h" #include "cpu/x86/msr.h" #include <cpu/amd/lxdef.h> -#include "southbridge/amd/cs5536/cs5536.h" #include <spd.h> -#include "southbridge/amd/cs5536/early_setup.c" +#include <southbridge/amd/cs5536/cs5536.h> #include <superio/smsc/smscsuperio/smscsuperio.h> #include "northbridge/amd/lx/raminit.h" diff --git a/src/mainboard/amd/db800/romstage.c b/src/mainboard/amd/db800/romstage.c index 7c73903..504c54a 100644 --- a/src/mainboard/amd/db800/romstage.c +++ b/src/mainboard/amd/db800/romstage.c @@ -28,9 +28,8 @@ #include "cpu/x86/bist.h" #include "cpu/x86/msr.h" #include <cpu/amd/lxdef.h> -#include "southbridge/amd/cs5536/cs5536.h" #include <spd.h> -#include "southbridge/amd/cs5536/early_setup.c" +#include <southbridge/amd/cs5536/cs5536.h> #include <superio/winbond/common/winbond.h> #include <superio/winbond/w83627hf/w83627hf.h> #include "northbridge/amd/lx/raminit.h" diff --git a/src/mainboard/amd/norwich/romstage.c b/src/mainboard/amd/norwich/romstage.c index 0180229..c16922d 100644 --- a/src/mainboard/amd/norwich/romstage.c +++ b/src/mainboard/amd/norwich/romstage.c @@ -28,9 +28,8 @@ #include "cpu/x86/bist.h" #include "cpu/x86/msr.h" #include <cpu/amd/lxdef.h> -#include "southbridge/amd/cs5536/cs5536.h" #include <spd.h> -#include "southbridge/amd/cs5536/early_setup.c" +#include <southbridge/amd/cs5536/cs5536.h> #include "northbridge/amd/lx/raminit.h" int spd_read_byte(unsigned int device, unsigned int address) diff --git a/src/mainboard/amd/rumba/romstage.c b/src/mainboard/amd/rumba/romstage.c index 557d394..f6f0183 100644 --- a/src/mainboard/amd/rumba/romstage.c +++ b/src/mainboard/amd/rumba/romstage.c @@ -10,7 +10,7 @@ #include "cpu/x86/msr.h" #include <cpu/amd/gx2def.h> #include <spd.h> -#include "southbridge/amd/cs5536/early_setup.c" +#include <southbridge/amd/cs5536/cs5536.h> #define SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP1) diff --git a/src/mainboard/artecgroup/dbe61/romstage.c b/src/mainboard/artecgroup/dbe61/romstage.c index fdbb700..20291d8 100644 --- a/src/mainboard/artecgroup/dbe61/romstage.c +++ b/src/mainboard/artecgroup/dbe61/romstage.c @@ -28,10 +28,9 @@ #include "cpu/x86/bist.h" #include "cpu/x86/msr.h" #include <cpu/amd/lxdef.h> -#include "southbridge/amd/cs5536/cs5536.h" #include "spd_table.h" #include <spd.h> -#include "southbridge/amd/cs5536/early_setup.c" +#include <southbridge/amd/cs5536/cs5536.h> #include "northbridge/amd/lx/raminit.h" int spd_read_byte(unsigned int device, unsigned int address) diff --git a/src/mainboard/bachmann/ot200/romstage.c b/src/mainboard/bachmann/ot200/romstage.c index 16f4329..9fc1140 100644 --- a/src/mainboard/bachmann/ot200/romstage.c +++ b/src/mainboard/bachmann/ot200/romstage.c @@ -30,8 +30,7 @@ #include "cpu/x86/bist.h" #include "cpu/x86/msr.h" #include <cpu/amd/lxdef.h> -#include "southbridge/amd/cs5536/cs5536.h" -#include "southbridge/amd/cs5536/early_setup.c" +#include <southbridge/amd/cs5536/cs5536.h> #include "northbridge/amd/lx/raminit.h" int spd_read_byte(unsigned int device, unsigned int address) diff --git a/src/mainboard/digitallogic/msm800sev/romstage.c b/src/mainboard/digitallogic/msm800sev/romstage.c index 2170677..b10e11a 100644 --- a/src/mainboard/digitallogic/msm800sev/romstage.c +++ b/src/mainboard/digitallogic/msm800sev/romstage.c @@ -9,9 +9,8 @@ #include "cpu/x86/msr.h" #include <cpu/amd/lxdef.h> #include <cpu/amd/car.h> -#include "southbridge/amd/cs5536/cs5536.h" #include <spd.h> -#include "southbridge/amd/cs5536/early_setup.c" +#include <southbridge/amd/cs5536/cs5536.h> #include <superio/winbond/common/winbond.h> #include <superio/winbond/w83627hf/w83627hf.h> #include "northbridge/amd/lx/raminit.h" diff --git a/src/mainboard/iei/pcisa-lx-800-r10/romstage.c b/src/mainboard/iei/pcisa-lx-800-r10/romstage.c index 3e71432..bd72167 100644 --- a/src/mainboard/iei/pcisa-lx-800-r10/romstage.c +++ b/src/mainboard/iei/pcisa-lx-800-r10/romstage.c @@ -28,9 +28,8 @@ #include "cpu/x86/bist.h" #include "cpu/x86/msr.h" #include <cpu/amd/lxdef.h> -#include "southbridge/amd/cs5536/cs5536.h" #include <spd.h> -#include "southbridge/amd/cs5536/early_setup.c" +#include <southbridge/amd/cs5536/cs5536.h> #include <superio/winbond/common/winbond.h> #include <superio/winbond/w83627hf/w83627hf.h> #include "northbridge/amd/lx/raminit.h" diff --git a/src/mainboard/iei/pm-lx-800-r11/romstage.c b/src/mainboard/iei/pm-lx-800-r11/romstage.c index 855a55b..d622167 100644 --- a/src/mainboard/iei/pm-lx-800-r11/romstage.c +++ b/src/mainboard/iei/pm-lx-800-r11/romstage.c @@ -30,7 +30,7 @@ #include <cpu/x86/msr.h> #include <cpu/amd/lxdef.h> #include <southbridge/amd/cs5536/cs5536.h> -#include <southbridge/amd/cs5536/early_setup.c> +#include <southbridge/amd/cs5536/cs5536.h> #include <superio/winbond/common/winbond.h> #include <superio/winbond/w83627ehg/w83627ehg.h> #include <northbridge/amd/lx/raminit.h> diff --git a/src/mainboard/iei/pm-lx2-800-r10/romstage.c b/src/mainboard/iei/pm-lx2-800-r10/romstage.c index dafb2bd..86696e5 100644 --- a/src/mainboard/iei/pm-lx2-800-r10/romstage.c +++ b/src/mainboard/iei/pm-lx2-800-r10/romstage.c @@ -31,7 +31,6 @@ #include <cpu/x86/msr.h> #include <cpu/amd/lxdef.h> #include <southbridge/amd/cs5536/cs5536.h> -#include <southbridge/amd/cs5536/early_setup.c> #include <superio/smsc/smscsuperio/smscsuperio.h> #include <northbridge/amd/lx/raminit.h> diff --git a/src/mainboard/lippert/hurricane-lx/romstage.c b/src/mainboard/lippert/hurricane-lx/romstage.c index f9f7435..f587019 100644 --- a/src/mainboard/lippert/hurricane-lx/romstage.c +++ b/src/mainboard/lippert/hurricane-lx/romstage.c @@ -31,9 +31,8 @@ #include "cpu/x86/bist.h" #include "cpu/x86/msr.h" #include <cpu/amd/lxdef.h> -#include "southbridge/amd/cs5536/cs5536.h" #include <spd.h> -#include "southbridge/amd/cs5536/early_setup.c" +#include <southbridge/amd/cs5536/cs5536.h> #include <superio/ite/common/ite.h> #include <superio/ite/it8712f/it8712f.h> #include "northbridge/amd/lx/raminit.h" diff --git a/src/mainboard/lippert/literunner-lx/romstage.c b/src/mainboard/lippert/literunner-lx/romstage.c index 3b6d496..624c3fd 100644 --- a/src/mainboard/lippert/literunner-lx/romstage.c +++ b/src/mainboard/lippert/literunner-lx/romstage.c @@ -32,8 +32,7 @@ #include "cpu/x86/bist.h" #include "cpu/x86/msr.h" #include <cpu/amd/lxdef.h> -#include "southbridge/amd/cs5536/cs5536.h" -#include "southbridge/amd/cs5536/early_setup.c" +#include <southbridge/amd/cs5536/cs5536.h> #include <superio/ite/common/ite.h> #include <superio/ite/it8712f/it8712f.h> #include "northbridge/amd/lx/raminit.h" diff --git a/src/mainboard/lippert/roadrunner-lx/romstage.c b/src/mainboard/lippert/roadrunner-lx/romstage.c index 15bfa07..33a258a 100644 --- a/src/mainboard/lippert/roadrunner-lx/romstage.c +++ b/src/mainboard/lippert/roadrunner-lx/romstage.c @@ -31,9 +31,8 @@ #include "cpu/x86/bist.h" #include "cpu/x86/msr.h" #include <cpu/amd/lxdef.h> -#include "southbridge/amd/cs5536/cs5536.h" #include <spd.h> -#include "southbridge/amd/cs5536/early_setup.c" +#include <southbridge/amd/cs5536/cs5536.h> #include <superio/ite/common/ite.h> #include <superio/ite/it8712f/it8712f.h> #include "northbridge/amd/lx/raminit.h" diff --git a/src/mainboard/lippert/spacerunner-lx/romstage.c b/src/mainboard/lippert/spacerunner-lx/romstage.c index d24a067..68c3288 100644 --- a/src/mainboard/lippert/spacerunner-lx/romstage.c +++ b/src/mainboard/lippert/spacerunner-lx/romstage.c @@ -32,8 +32,7 @@ #include "cpu/x86/bist.h" #include "cpu/x86/msr.h" #include <cpu/amd/lxdef.h> -#include "southbridge/amd/cs5536/cs5536.h" -#include "southbridge/amd/cs5536/early_setup.c" +#include <southbridge/amd/cs5536/cs5536.h> #include <superio/ite/common/ite.h> #include <superio/ite/it8712f/it8712f.h> #include "northbridge/amd/lx/raminit.h" diff --git a/src/mainboard/pcengines/alix1c/romstage.c b/src/mainboard/pcengines/alix1c/romstage.c index 080553b..c17b7d0 100644 --- a/src/mainboard/pcengines/alix1c/romstage.c +++ b/src/mainboard/pcengines/alix1c/romstage.c @@ -30,7 +30,6 @@ #include "cpu/x86/msr.h" #include <cpu/amd/lxdef.h> #include <cpu/amd/car.h> -#include "southbridge/amd/cs5536/cs5536.h" #include "northbridge/amd/lx/raminit.h" #define SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP1) @@ -38,7 +37,7 @@ /* The ALIX1.C has no SMBus; the setup is hard-wired. */ void cs5536_enable_smbus(void) { } -#include "southbridge/amd/cs5536/early_setup.c" +#include <southbridge/amd/cs5536/cs5536.h> #include <superio/winbond/common/winbond.h> #include <superio/winbond/w83627hf/w83627hf.h> diff --git a/src/mainboard/pcengines/alix2d/romstage.c b/src/mainboard/pcengines/alix2d/romstage.c index 07bf77e..01ee2c0 100644 --- a/src/mainboard/pcengines/alix2d/romstage.c +++ b/src/mainboard/pcengines/alix2d/romstage.c @@ -30,7 +30,6 @@ #include "cpu/x86/msr.h" #include <cpu/amd/lxdef.h> #include <cpu/amd/car.h> -#include "southbridge/amd/cs5536/cs5536.h" #include "northbridge/amd/lx/raminit.h" #define SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP1) @@ -38,7 +37,7 @@ /* The ALIX.2D has no SMBus; the setup is hard-wired. */ void cs5536_enable_smbus(void) { } -#include "southbridge/amd/cs5536/early_setup.c" +#include <southbridge/amd/cs5536/cs5536.h> /* The part is a Hynix hy5du121622ctp-d43. * diff --git a/src/mainboard/traverse/geos/romstage.c b/src/mainboard/traverse/geos/romstage.c index e7f782b..c434437 100644 --- a/src/mainboard/traverse/geos/romstage.c +++ b/src/mainboard/traverse/geos/romstage.c @@ -29,9 +29,8 @@ #include "cpu/x86/bist.h" #include "cpu/x86/msr.h" #include <cpu/amd/lxdef.h> -#include "southbridge/amd/cs5536/cs5536.h" #include <spd.h> -#include "southbridge/amd/cs5536/early_setup.c" +#include <southbridge/amd/cs5536/cs5536.h> #include "northbridge/amd/lx/raminit.h" int spd_read_byte(unsigned int device, unsigned int address) diff --git a/src/mainboard/winent/pl6064/romstage.c b/src/mainboard/winent/pl6064/romstage.c index 4bf213d..b34cd9c 100644 --- a/src/mainboard/winent/pl6064/romstage.c +++ b/src/mainboard/winent/pl6064/romstage.c @@ -30,9 +30,8 @@ #include "cpu/x86/bist.h" #include "cpu/x86/msr.h" #include <cpu/amd/lxdef.h> -#include "southbridge/amd/cs5536/cs5536.h" #include <spd.h> -#include "southbridge/amd/cs5536/early_setup.c" +#include <southbridge/amd/cs5536/cs5536.h> #include <superio/winbond/common/winbond.h> #include <superio/winbond/w83627hf/w83627hf.h> #include "northbridge/amd/lx/raminit.h" diff --git a/src/mainboard/wyse/s50/romstage.c b/src/mainboard/wyse/s50/romstage.c index 73a143e..bb7c442 100644 --- a/src/mainboard/wyse/s50/romstage.c +++ b/src/mainboard/wyse/s50/romstage.c @@ -30,7 +30,7 @@ #include "cpu/x86/msr.h" #include <cpu/amd/gx2def.h> #include <spd.h> -#include "southbridge/amd/cs5536/early_setup.c" +#include <southbridge/amd/cs5536/cs5536.h> static inline int spd_read_byte(unsigned int device, unsigned int address) { diff --git a/src/southbridge/amd/cs5536/Makefile.inc b/src/southbridge/amd/cs5536/Makefile.inc index 9e159c5..b420f6a 100644 --- a/src/southbridge/amd/cs5536/Makefile.inc +++ b/src/southbridge/amd/cs5536/Makefile.inc @@ -23,3 +23,4 @@ ramstage-y += pirq.c ramstage-y += smbus.c romstage-y += smbus.c romstage-y += early_smbus.c +romstage-y += early_setup.c diff --git a/src/southbridge/amd/cs5536/cs5536.h b/src/southbridge/amd/cs5536/cs5536.h index 530ab2e..d4cf326 100644 --- a/src/southbridge/amd/cs5536/cs5536.h +++ b/src/southbridge/amd/cs5536/cs5536.h @@ -446,6 +446,7 @@ #if defined(__PRE_RAM__) void cs5536_setup_onchipuart(int uart); void cs5536_disable_internal_uart(void); +void cs5536_early_setup(void); #else void chipsetinit(void); #endif diff --git a/src/southbridge/amd/cs5536/early_setup.c b/src/southbridge/amd/cs5536/early_setup.c index cff6512..408ab0d 100644 --- a/src/southbridge/amd/cs5536/early_setup.c +++ b/src/southbridge/amd/cs5536/early_setup.c @@ -254,7 +254,7 @@ void cs5536_setup_onchipuart(int uart) * and we don't want to hang on serial, so they are * commented out */ -static void cs5536_early_setup(void) +void cs5536_early_setup(void) { msr_t msr;

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New patch to review for coreboot: 69c88c0 southbridge/amd/cs5536/early_setup.c: Add missing includes
by Edward O'Callaghan 09 Aug '14

09 Aug '14

Edward O'Callaghan (eocallaghan(a)alterapraxis.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/6558 -gerrit commit 69c88c06c91ef5baf6e0eeed2e92dffd33c510ef Author: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> Date: Sat Aug 9 21:35:39 2014 +1000 southbridge/amd/cs5536/early_setup.c: Add missing includes Change-Id: Ida73108316f81a6bfabcee7b9ba5637490d0a5a3 Signed-off-by: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> --- src/southbridge/amd/cs5536/early_setup.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/src/southbridge/amd/cs5536/early_setup.c b/src/southbridge/amd/cs5536/early_setup.c index d9a042a..df66bee 100644 --- a/src/southbridge/amd/cs5536/early_setup.c +++ b/src/southbridge/amd/cs5536/early_setup.c @@ -22,6 +22,10 @@ * This file implements the initialization sequence documented in section 4.2 of * AMD Geode GX Processor CS5536 Companion Device GeodeROM Porting Guide. */ +#include <arch/io.h> +#include <cpu/x86/msr.h> +#include <stdint.h> + #include "cs5536.h" /**

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coreboot-gerrit August 2014