Stefan Reinauer (stefan.reinauer(a)coreboot.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5450
-gerrit
commit 85e714612899b4ac16e53750e8299e7a99d8db38
Author: Felix Held <felix-coreboot(a)felixheld.de>
Date: Wed Jun 4 23:15:26 2014 +0200
superio/nuvoton: Add support for Nuvoton NCT6776
Add support for both NCT6776D and NCT6776F devices.
Change-Id: If6686ea0a1cd6be537e286699b4ee8f88ba8ad7c
Signed-off-by: Felix Held <felix-coreboot(a)felixheld.de>
---
src/superio/nuvoton/Kconfig | 4 ++
src/superio/nuvoton/Makefile.inc | 1 +
src/superio/nuvoton/nct6776/Makefile.inc | 22 +++++++++
src/superio/nuvoton/nct6776/nct6776.h | 62 ++++++++++++++++++++++++
src/superio/nuvoton/nct6776/superio.c | 82 ++++++++++++++++++++++++++++++++
5 files changed, 171 insertions(+)
diff --git a/src/superio/nuvoton/Kconfig b/src/superio/nuvoton/Kconfig
index 350c8dd..8c70520 100644
--- a/src/superio/nuvoton/Kconfig
+++ b/src/superio/nuvoton/Kconfig
@@ -28,3 +28,7 @@ config SUPERIO_NUVOTON_WPCM450
config SUPERIO_NUVOTON_NCT5104D
bool
select SUPERIO_NUVOTON_COMMON_ROMSTAGE
+
+config SUPERIO_NUVOTON_NCT6776
+ bool
+ select SUPERIO_NUVOTON_COMMON_ROMSTAGE
diff --git a/src/superio/nuvoton/Makefile.inc b/src/superio/nuvoton/Makefile.inc
index 1ce6963..57ce02f 100644
--- a/src/superio/nuvoton/Makefile.inc
+++ b/src/superio/nuvoton/Makefile.inc
@@ -22,3 +22,4 @@ romstage-$(CONFIG_SUPERIO_NUVOTON_COMMON_ROMSTAGE) += common/early_serial.c
subdirs-$(CONFIG_SUPERIO_NUVOTON_WPCM450) += wpcm450
subdirs-$(CONFIG_SUPERIO_NUVOTON_NCT5104D) += nct5104d
+subdirs-$(CONFIG_SUPERIO_NUVOTON_NCT6776) += nct6776
diff --git a/src/superio/nuvoton/nct6776/Makefile.inc b/src/superio/nuvoton/nct6776/Makefile.inc
new file mode 100755
index 0000000..45bd755
--- /dev/null
+++ b/src/superio/nuvoton/nct6776/Makefile.inc
@@ -0,0 +1,22 @@
+##
+## This file is part of the coreboot project.
+##
+## Copyright (C) 2011 - 2012 Advanced Micro Devices, Inc.
+## Copyright (C) 2014 Felix Held <felix-coreboot(a)felixheld.de>
+##
+## This program is free software; you can redistribute it and/or modify
+## it under the terms of the GNU General Public License as published by
+## the Free Software Foundation; either version 2 of the License, or
+## (at your option) any later version.
+##
+## This program is distributed in the hope that it will be useful,
+## but WITHOUT ANY WARRANTY; without even the implied warranty of
+## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+## GNU General Public License for more details.
+##
+## You should have received a copy of the GNU General Public License
+## along with this program; if not, write to the Free Software
+## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+##
+
+ramstage-$(CONFIG_SUPERIO_NUVOTON_NCT6776) += superio.c
diff --git a/src/superio/nuvoton/nct6776/nct6776.h b/src/superio/nuvoton/nct6776/nct6776.h
new file mode 100755
index 0000000..f6f31ef
--- /dev/null
+++ b/src/superio/nuvoton/nct6776/nct6776.h
@@ -0,0 +1,62 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2014 Felix Held <felix-coreboot(a)felixheld.de>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+/* Both NCT6776D and NCT6776F package variants are supported. */
+
+#ifndef SUPERIO_NUVOTON_NCT6776_H
+#define SUPERIO_NUVOTON_NCT6776_H
+
+/* Logical Device Numbers (LDN). */
+#define NCT6776_FDC 0x00 /* Floppy */
+#define NCT6776_PP 0x01 /* Parallel port */
+#define NCT6776_SP1 0x02 /* Com1 */
+#define NCT6776_SP2 0x03 /* Com2 & IR */
+#define NCT6776_KBC 0x05 /* PS/2 keyboard and mouse */
+#define NCT6776_CIR 0x06
+#define NCT6776_GPIO6789_V 0x07
+#define NCT6776_WDT1_GPIO01A_V 0x08
+#define NCT6776_GPIO1234567_V 0x09
+#define NCT6776_ACPI 0x0A
+#define NCT6776_HWM_FPLED 0x0B /* Hardware monitor & front LED */
+#define NCT6776_VID 0x0D
+#define NCT6776_CIRWKUP 0x0E /* CIR wakeup */
+#define NCT6776_GPIO_PP_OD 0x0F /* GPIO Push-Pull/Open drain select */
+#define NCT6776_SVID 0x14
+#define NCT6776_DSLP 0x16 /* Deep sleep */
+#define NCT6776_GPIOA_LDN 0x17
+
+/* virtual LDN for GPIO and WDT */
+#define NCT6776_WDT1 ((0 << 8) | NCT6776_WDT1_GPIO01A_V)
+
+#define NCT6776_GPIOBASE ((0 << 8) | NCT6776_WDT1_GPIO01A_V) //?
+
+#define NCT6776_GPIO0 ((1 << 8) | NCT6776_WDT1_GPIO01A_V)
+#define NCT6776_GPIO1 ((1 << 8) | NCT6776_GPIO1234567_V)
+#define NCT6776_GPIO2 ((2 << 8) | NCT6776_GPIO1234567_V)
+#define NCT6776_GPIO3 ((3 << 8) | NCT6776_GPIO1234567_V)
+#define NCT6776_GPIO4 ((4 << 8) | NCT6776_GPIO1234567_V)
+#define NCT6776_GPIO5 ((5 << 8) | NCT6776_GPIO1234567_V)
+#define NCT6776_GPIO6 ((6 << 8) | NCT6776_GPIO1234567_V)
+#define NCT6776_GPIO7 ((7 << 8) | NCT6776_GPIO1234567_V)
+#define NCT6776_GPIO8 ((0 << 8) | NCT6776_GPIO6789_V)
+#define NCT6776_GPIO9 ((1 << 8) | NCT6776_GPIO6789_V)
+#define NCT6776_GPIOA ((2 << 8) | NCT6776_WDT1_GPIO01A_V)
+
+#endif /* SUPERIO_NUVOTON_NCT6776_H */
diff --git a/src/superio/nuvoton/nct6776/superio.c b/src/superio/nuvoton/nct6776/superio.c
new file mode 100755
index 0000000..6712750
--- /dev/null
+++ b/src/superio/nuvoton/nct6776/superio.c
@@ -0,0 +1,82 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2011 Advanced Micro Devices, Inc.
+ * Copyright (C) 2014 Felix Held <felix-coreboot(a)felixheld.de>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+#include <arch/io.h>
+#include <device/pnp.h>
+#include <superio/conf_mode.h>
+#include <stdlib.h>
+#include "nct6776.h"
+
+/* Both NCT6776D and NCT6776F package variants are supported. */
+
+static void nct6776_init(device_t dev)
+{
+}
+
+static struct device_operations ops = {
+ .read_resources = pnp_read_resources,
+ .set_resources = pnp_set_resources,
+ .enable_resources = pnp_enable_resources,
+ .enable = pnp_alt_enable,
+ .init = nct6776_init,
+ .ops_pnp_mode = &pnp_conf_mode_8787_aa,
+};
+
+static struct pnp_info pnp_dev_info[] = {
+ //TODO: set field from struct io_info seems to be unused. why set this to 0 or 4?
+ { &ops, NCT6776_FDC, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, {0x0ff8, 0}, },
+ { &ops, NCT6776_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, {0x0ff8, 0}, },
+ { &ops, NCT6776_SP1, PNP_IO0 | PNP_IRQ0, {0x0ff8, 0}, },
+ { &ops, NCT6776_SP2, PNP_IO0 | PNP_IRQ0, {0x0ff8, 0}, },
+ { &ops, NCT6776_KBC, PNP_IO0 | PNP_IO1 | PNP_IRQ0 | PNP_IRQ1, {0x0fff, 0}, {0x0fff, 4}, },
+ { &ops, NCT6776_CIR, PNP_IO0 | PNP_IRQ0, {0x0ff8, 0}, },
+ { &ops, NCT6776_ACPI},
+ { &ops, NCT6776_HWM_FPLED, PNP_IO0 | PNP_IO1 | PNP_IRQ0, {0x0ffe, 0}, {0x0ffe, 4}, },
+ { &ops, NCT6776_VID},
+ { &ops, NCT6776_CIRWKUP, PNP_IO0 | PNP_IRQ0, {0x0ff8, 0}, },
+ { &ops, NCT6776_GPIO_PP_OD},
+ { &ops, NCT6776_SVID},
+ { &ops, NCT6776_DSLP},
+ { &ops, NCT6776_GPIOA_LDN},
+ { &ops, NCT6776_WDT1},
+ { &ops, NCT6776_GPIOBASE, PNP_IO0 | PNP_IRQ0, {0x0ff8, 0}, },
+ { &ops, NCT6776_GPIO0},
+ { &ops, NCT6776_GPIO1},
+ { &ops, NCT6776_GPIO2},
+ { &ops, NCT6776_GPIO3},
+ { &ops, NCT6776_GPIO4},
+ { &ops, NCT6776_GPIO5},
+ { &ops, NCT6776_GPIO6},
+ { &ops, NCT6776_GPIO7},
+ { &ops, NCT6776_GPIO8},
+ { &ops, NCT6776_GPIO9},
+ { &ops, NCT6776_GPIOA},
+};
+
+static void enable_dev(struct device *dev)
+{
+ pnp_enable_devices(dev, &ops, ARRAY_SIZE(pnp_dev_info), pnp_dev_info);
+}
+
+struct chip_operations superio_nuvoton_nct6776_ops = {
+ CHIP_NAME("NUVOTON NCT6776 Super I/O")
+ .enable_dev = enable_dev,
+};
Stefan Reinauer (stefan.reinauer(a)coreboot.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/6229
-gerrit
commit d45b15ef45425b0acb493eeffa4ce1a899ae0195
Author: Felix Held <felix-coreboot(a)felixheld.de>
Date: Sat Jul 19 00:24:06 2014 +0200
superio/nuvoton: Add support for Nuvoton NCT5572D
Change-Id: I3b720cf879bf5326be885d2d3a3f9cfba0a27c7e
Signed-off-by: Felix Held <felix-coreboot(a)felixheld.de>
---
src/superio/nuvoton/Kconfig | 4 ++
src/superio/nuvoton/Makefile.inc | 1 +
src/superio/nuvoton/nct5572d/Makefile.inc | 22 +++++++++
src/superio/nuvoton/nct5572d/nct5572d.h | 47 ++++++++++++++++++
src/superio/nuvoton/nct5572d/superio.c | 81 +++++++++++++++++++++++++++++++
5 files changed, 155 insertions(+)
diff --git a/src/superio/nuvoton/Kconfig b/src/superio/nuvoton/Kconfig
index 350c8dd..4bdcd1e 100644
--- a/src/superio/nuvoton/Kconfig
+++ b/src/superio/nuvoton/Kconfig
@@ -28,3 +28,7 @@ config SUPERIO_NUVOTON_WPCM450
config SUPERIO_NUVOTON_NCT5104D
bool
select SUPERIO_NUVOTON_COMMON_ROMSTAGE
+
+config SUPERIO_NUVOTON_NCT5572D
+ bool
+ select SUPERIO_NUVOTON_COMMON_ROMSTAGE
diff --git a/src/superio/nuvoton/Makefile.inc b/src/superio/nuvoton/Makefile.inc
index 1ce6963..9ce04d3 100644
--- a/src/superio/nuvoton/Makefile.inc
+++ b/src/superio/nuvoton/Makefile.inc
@@ -22,3 +22,4 @@ romstage-$(CONFIG_SUPERIO_NUVOTON_COMMON_ROMSTAGE) += common/early_serial.c
subdirs-$(CONFIG_SUPERIO_NUVOTON_WPCM450) += wpcm450
subdirs-$(CONFIG_SUPERIO_NUVOTON_NCT5104D) += nct5104d
+subdirs-$(CONFIG_SUPERIO_NUVOTON_NCT5572D) += nct5572d
diff --git a/src/superio/nuvoton/nct5572d/Makefile.inc b/src/superio/nuvoton/nct5572d/Makefile.inc
new file mode 100644
index 0000000..9a4eefd
--- /dev/null
+++ b/src/superio/nuvoton/nct5572d/Makefile.inc
@@ -0,0 +1,22 @@
+##
+## This file is part of the coreboot project.
+##
+## Copyright (C) 2011 - 2012 Advanced Micro Devices, Inc.
+## Copyright (C) 2014 Felix Held <felix-coreboot(a)felixheld.de>
+##
+## This program is free software; you can redistribute it and/or modify
+## it under the terms of the GNU General Public License as published by
+## the Free Software Foundation; either version 2 of the License, or
+## (at your option) any later version.
+##
+## This program is distributed in the hope that it will be useful,
+## but WITHOUT ANY WARRANTY; without even the implied warranty of
+## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+## GNU General Public License for more details.
+##
+## You should have received a copy of the GNU General Public License
+## along with this program; if not, write to the Free Software
+## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+##
+
+ramstage-$(CONFIG_SUPERIO_NUVOTON_NCT5572D) += superio.c
diff --git a/src/superio/nuvoton/nct5572d/nct5572d.h b/src/superio/nuvoton/nct5572d/nct5572d.h
new file mode 100644
index 0000000..7f4f9b8
--- /dev/null
+++ b/src/superio/nuvoton/nct5572d/nct5572d.h
@@ -0,0 +1,47 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2014 Felix Held <felix-coreboot(a)felixheld.de>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+#ifndef SUPERIO_NUVOTON_NCT5572D
+#define SUPERIO_NUVOTON_NCT5572D
+
+/* Logical Device Numbers (LDN). */
+#define NCT5572D_SP1 0x02 /* Com1 */
+#define NCT5572D_IR 0x03
+#define NCT5572D_KBC 0x05
+#define NCT5572D_CIR 0x06
+#define NCT5572D_GPIO689_V 0x07
+#define NCT5572D_WDT1 0x08
+#define NCT5572D_GPIO235_V 0x09
+#define NCT5572D_ACPI 0x0A
+#define NCT5572D_HWM_TSI_FPLED 0x0B /* HW monitor/SB-TSI/front LED/deep S5 */
+#define NCT5572D_PECI 0x0C
+#define NCT5572D_SUSLED 0x0D /* marked as reserved, but described */
+#define NCT5572D_CIRWKUP 0x0E /* CIR wakeup */
+#define NCT5572D_GPIO_PP_OD 0x0F /* GPIO Push-Pull/Open drain select */
+
+/* virtual LDN for GPIO */
+#define NCT5572D_GPIO2 ((0 << 8) | NCT5572D_GPIO235_V)
+#define NCT5572D_GPIO3 ((1 << 8) | NCT5572D_GPIO235_V)
+#define NCT5572D_GPIO5 ((3 << 8) | NCT5572D_GPIO235_V)
+#define NCT5572D_GPIO6 ((1 << 8) | NCT5572D_GPIO689_V)
+#define NCT5572D_GPIO8 ((3 << 8) | NCT5572D_GPIO689_V)
+#define NCT5572D_GPIO9 ((4 << 8) | NCT5572D_GPIO689_V)
+
+#endif /* SUPERIO_NUVOTON_NCT5572D */
diff --git a/src/superio/nuvoton/nct5572d/superio.c b/src/superio/nuvoton/nct5572d/superio.c
new file mode 100644
index 0000000..63a7f87
--- /dev/null
+++ b/src/superio/nuvoton/nct5572d/superio.c
@@ -0,0 +1,81 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2014 Felix Held <felix-coreboot(a)felixheld.de>
+ * Copyright (C) 2014 Edward O'Callaghan <eocallaghan(a)alterapraxis.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+#include <arch/io.h>
+#include <device/device.h>
+#include <device/pnp.h>
+#include <pc80/keyboard.h>
+#include <stdlib.h>
+#include <superio/conf_mode.h>
+
+#include "nct5572d.h"
+
+static void nct5572d_init(device_t dev)
+{
+ if (!dev->enabled)
+ return;
+
+ switch(dev->path.pnp.device) {
+ /* TODO: Might potentially need code for HWM or FDC etc. */
+ case NCT5572D_KBC:
+ pc_keyboard_init();
+ break;
+ }
+}
+
+static struct device_operations ops = {
+ .read_resources = pnp_read_resources,
+ .set_resources = pnp_set_resources,
+ .enable_resources = pnp_enable_resources,
+ .enable = pnp_alt_enable,
+ .init = nct5572d_init,
+ .ops_pnp_mode = &pnp_conf_mode_8787_aa,
+};
+
+static struct pnp_info pnp_dev_info[] = {
+ { &ops, NCT5572D_SP1, PNP_IO0 | PNP_IRQ0, {0x0FF8, 0}, },
+ { &ops, NCT5572D_IR, PNP_IO0 | PNP_IRQ0, {0x0FF8, 0}, },
+ { &ops, NCT5572D_KBC, PNP_IO0 | PNP_IO1 | PNP_IRQ0 | PNP_IRQ1, {0x0FFF, 0}, {0x0FFF, 4}, },
+ { &ops, NCT5572D_CIR, PNP_IO0 | PNP_IRQ0, {0x0FF8, 0}, },
+ { &ops, NCT5572D_WDT1},
+ { &ops, NCT5572D_ACPI},
+ { &ops, NCT5572D_HWM_TSI_FPLED, PNP_IO0 | PNP_IO1 | PNP_IRQ0, {0x0FFE, 0}, {0x0FFE, 4}, },
+ { &ops, NCT5572D_PECI},
+ { &ops, NCT5572D_SUSLED},
+ { &ops, NCT5572D_CIRWKUP, PNP_IO0 | PNP_IRQ0, {0x0FF8, 0}, },
+ { &ops, NCT5572D_GPIO_PP_OD},
+ { &ops, NCT5572D_GPIO2},
+ { &ops, NCT5572D_GPIO3},
+ { &ops, NCT5572D_GPIO5},
+ { &ops, NCT5572D_GPIO6},
+ { &ops, NCT5572D_GPIO8},
+ { &ops, NCT5572D_GPIO9},
+};
+
+static void enable_dev(struct device *dev)
+{
+ pnp_enable_devices(dev, &ops, ARRAY_SIZE(pnp_dev_info), pnp_dev_info);
+}
+
+struct chip_operations superio_nuvoton_nct5104d_ops = {
+ CHIP_NAME("NUVOTON NCT5572D Super I/O")
+ .enable_dev = enable_dev,
+};
the following patch was just integrated into master:
commit 06667a52474bae9f9c88ed5efa9df44cb20c9dd3
Author: Vladimir Serbinenko <phcoder(a)gmail.com>
Date: Tue Aug 12 09:07:13 2014 +0200
gm45: Move S3 detection to enable stage.
Also move it to NB to be in line with other.
Change-Id: Ibd961d60dcd686899f34f6a494c14ff9d65e618b
Signed-off-by: Vladimir Serbinenko <phcoder(a)gmail.com>
Reviewed-on: http://review.coreboot.org/6625
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick(a)georgi-clan.de>
See http://review.coreboot.org/6625 for details.
-gerrit
the following patch was just integrated into master:
commit b1f34ab8d53e74c178492d9b001d1f5ef696e884
Author: Vladimir Serbinenko <phcoder(a)gmail.com>
Date: Tue Aug 12 21:40:32 2014 +0200
i82801ix: Make RP04 optionally hotpluggable.
Change-Id: I34a1ae4bff22db6ee55fa511de39bdfd5dd92c7e
Signed-off-by: Vladimir Serbinenko <phcoder(a)gmail.com>
Reviewed-on: http://review.coreboot.org/6627
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick(a)georgi-clan.de>
See http://review.coreboot.org/6627 for details.
-gerrit
Isaac Christensen (isaac.christensen(a)se-eng.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/6629
-gerrit
commit 70c1c255403589f99c01bcf96829b462eb568496
Author: Stefan Reinauer <reinauer(a)chromium.org>
Date: Wed Aug 28 16:29:40 2013 -0700
exynos5420: Enable relocatable module support
Since we're now supporting ARMv7 relocations, we can enable
rmodule support on Exynos 5420. This does not automatically
enable relocatable ramstage.
Signed-off-by: Stefan Reinauer <reinauer(a)google.com>
Change-Id: Ic3af1eabb3b816944587a46409224f778d941b8a
Reviewed-on: https://chromium-review.googlesource.com/167403
Reviewed-by: Aaron Durbin <adurbin(a)chromium.org>
Tested-by: Stefan Reinauer <reinauer(a)google.com>
Commit-Queue: Stefan Reinauer <reinauer(a)google.com>
(cherry picked from commit 7b5afef4ee87fc3245ec887dfda873c529d8d04d)
Signed-off-by: Isaac Christensen <isaac.christensen(a)se-eng.com>
---
src/cpu/samsung/exynos5420/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/src/cpu/samsung/exynos5420/Kconfig b/src/cpu/samsung/exynos5420/Kconfig
index fe475ab..1379de1 100644
--- a/src/cpu/samsung/exynos5420/Kconfig
+++ b/src/cpu/samsung/exynos5420/Kconfig
@@ -4,6 +4,7 @@ config CPU_SAMSUNG_EXYNOS5420
select ARCH_RAMSTAGE_ARMV7
select HAVE_MONOTONIC_TIMER
select HAVE_UART_SPECIAL
+ select RELOCATABLE_MODULES
select DYNAMIC_CBMEM
bool
default n
the following patch was just integrated into master:
commit 9907be4bbd7f40f5d7466969c8c735b9a84807aa
Author: Vladimir Serbinenko <phcoder(a)gmail.com>
Date: Tue Aug 12 21:51:28 2014 +0200
gm45: Reserve RAM for ME if it's active.
Change-Id: Icd2b075cec9461f9d6028a8c845f6900b6fe04c8
Signed-off-by: Vladimir Serbinenko <phcoder(a)gmail.com>
Reviewed-on: http://review.coreboot.org/6628
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick(a)georgi-clan.de>
See http://review.coreboot.org/6628 for details.
-gerrit