the following patch was just integrated into master:
commit 61ffb4ca2e53004d3a282bfc2c97e58131cc9ef3
Author: Vladimir Serbinenko <phcoder(a)gmail.com>
Date: Tue Aug 12 22:51:53 2014 +0200
lenovo/x200: New mainboard.
Change-Id: I64e59648064d5875907b5057e2f9f72f2c5997b1
Signed-off-by: Vladimir Serbinenko <phcoder(a)gmail.com>
Reviewed-on: http://review.coreboot.org/6631
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan(a)alterapraxis.com>
See http://review.coreboot.org/6631 for details.
-gerrit
the following patch was just integrated into master:
commit 883e7acc65e1edba8b2453decf23c88eafeae8b0
Author: Vladimir Serbinenko <phcoder(a)gmail.com>
Date: Wed Aug 13 01:22:13 2014 +0200
lenovo/h8: Support uwb radio.
It's the third minipcie slot in x200.
Change-Id: Ibfa8d787698cd23b4abcffe5cff2d62039cf0f86
Signed-off-by: Vladimir Serbinenko <phcoder(a)gmail.com>
Reviewed-on: http://review.coreboot.org/6641
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan(a)alterapraxis.com>
Reviewed-by: Paul Menzel <paulepanter(a)users.sourceforge.net>
See http://review.coreboot.org/6641 for details.
-gerrit
the following patch was just integrated into master:
commit 020dc0e13cca062b8e1983cb5e77a9482dcf6e53
Author: Vladimir Serbinenko <phcoder(a)gmail.com>
Date: Tue Aug 12 22:50:40 2014 +0200
gm45: Allow skiping voltage config.
Change-Id: I81b9966212d09d4d2561b3adc20d6d8a8a200f4b
Signed-off-by: Vladimir Serbinenko <phcoder(a)gmail.com>
Reviewed-on: http://review.coreboot.org/6630
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan(a)alterapraxis.com>
See http://review.coreboot.org/6630 for details.
-gerrit
the following patch was just integrated into master:
commit 951fc26a084b030abb7876598831d2f6e158b5ca
Author: Stefan Reinauer <reinauer(a)chromium.org>
Date: Wed Sep 11 10:24:11 2013 -0700
ARMv7: drop dead code from Makefile.inc
This commented out code is a left over from x86.
Change-Id: Ice806000c73d5a068962914d067d4de7b3d75f45
Signed-off-by: Stefan Reinauer <reinauer(a)google.com>
Reviewed-on: https://chromium-review.googlesource.com/168961
Reviewed-by: Ronald Minnich <rminnich(a)chromium.org>
Reviewed-by: David Hendrix <dhendrix(a)chromium.org>
(cherry picked from commit 9d700cf35d2283a088e704c0ebd34e6f58f54993)
Signed-off-by: Isaac Christensen <isaac.christensen(a)se-eng.com>
Reviewed-on: http://review.coreboot.org/6639
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich(a)gmail.com>
See http://review.coreboot.org/6639 for details.
-gerrit
the following patch was just integrated into master:
commit ef3a17bd88f3c751ef98d3be94eb922da14ce3c5
Author: Edward O'Callaghan <eocallaghan(a)alterapraxis.com>
Date: Sat Aug 2 10:15:44 2014 +1000
util/inteltool: Typo in dump output for 'GP_IO_SEL3'
The GPIO offset of '0x44 - GP_IO_SEL3' as specified in the pch.h header
is incorrectly reported as 'GPIO_SEL3'.
Change-Id: I56dcdda109d5f57ed45938d60b995807bdfb46b1
Signed-off-by: Edward O'Callaghan <eocallaghan(a)alterapraxis.com>
Reviewed-on: http://review.coreboot.org/6459
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org>
Reviewed-by: Paul Menzel <paulepanter(a)users.sourceforge.net>
See http://review.coreboot.org/6459 for details.
-gerrit
the following patch was just integrated into master:
commit 691ff08e27b9f79e5178a0c3e6c51f9327f207d5
Author: Edward O'Callaghan <eocallaghan(a)alterapraxis.com>
Date: Sun Aug 3 19:42:02 2014 +1000
southbridge/amd/cimx/sb800: Uninitialized variables in config func
Both 'SbSpiSpeedSupport' and 'UsbRxMode' are uninitiated upon return from
a 'sb800_cimx_config()' call.
Change-Id: I32237ff97fafc3e69627d427e54268dcb039e12c
Found-by: Coverity Scan
Signed-off-by: Edward O'Callaghan <eocallaghan(a)alterapraxis.com>
Reviewed-on: http://review.coreboot.org/6474
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick(a)georgi-clan.de>
Reviewed-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org>
See http://review.coreboot.org/6474 for details.
-gerrit