coreboot-gerrit July 2014

coreboot-gerrit@coreboot.org

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Patch set updated for coreboot: 55d1786 google/panther: Avoid shutdown when thermal sensor is unavailable
by Paul Menzel 06 Jul '14

06 Jul '14

Paul Menzel (paulepanter(a)users.sourceforge.net) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/6002 -gerrit commit 55d178620985e5ff8155df990ce27c7eaedadac0 Author: Stefan Reinauer <reinauer(a)chromium.org> Date: Mon Jan 13 17:40:37 2014 -0800 google/panther: Avoid shutdown when thermal sensor is unavailable When the thermal sensor on Panther is unavailable (early on resume) it will return 0x80 which causes our AML thermal code to overflow, which causes the system to shut down. Instead, return a reasonable value in those cases so that the system will continue running until the sensor gets back on its feet. BUG=chrome-os-partner:24918 BRANCH=panther TEST=suspend_resume_test survived more than 100 iterations on Panther Change-Id: Ib2d714c39d353ce2415361bc6590784a3f6837d2 Signed-off-by: Stefan Reinauer <reinauer(a)google.com> Signed-off-by: Stefan Reinauer <reinauer(a)chromium.org> Reviewed-on: https://chromium-review.googlesource.com/182369 Tested-by: Stefan Reinauer <reinauer(a)chromium.org> Reviewed-by: Duncan Laurie <dlaurie(a)chromium.org> Commit-Queue: Stefan Reinauer <reinauer(a)chromium.org> --- src/mainboard/google/panther/acpi/thermal.asl | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/src/mainboard/google/panther/acpi/thermal.asl b/src/mainboard/google/panther/acpi/thermal.asl index a6ea851..e0ea2f5 100644 --- a/src/mainboard/google/panther/acpi/thermal.asl +++ b/src/mainboard/google/panther/acpi/thermal.asl @@ -66,6 +66,11 @@ Scope (\_TZ) // Get CPU Temperature from PECI via SuperIO TMPIN3 Store (\_SB.PCI0.LPCB.SIO.ENVC.TIN3, Local0) + // Check for "no reading available" + If (LEqual (Local0, 0x80)) { + Return (CTOK (\F2ON)) + } + // Check for invalid readings If (LOr (LEqual (Local0, 255), LEqual (Local0, 0))) { Return (CTOK (\F2ON))

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Patch set updated for coreboot: e7def4a google/panther: Re-read temperature if current reading would cause power-off
by Paul Menzel 06 Jul '14

06 Jul '14

Paul Menzel (paulepanter(a)users.sourceforge.net) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/6001 -gerrit commit e7def4a9e6c74a681524fbed1f115d4cb481de96 Author: Stefan Reinauer <reinauer(a)chromium.org> Date: Fri Jan 10 16:06:03 2014 -0800 google/panther: Re-read temperature if current reading would cause power-off Sometimes the SuperIO seems to provide wrong readings, especially early on after a resume from suspend. This will cause the system to power off. If that happens, wait for 1s and read again, to make sure the high temperature value was not just a flaky read. BUG=chrome-os-partner:24918 BRANCH=panther TEST=Boot tested on Panther. Change-Id: Ib3768528d90e34448e96ad587b2503d8d8b1a775 Signed-off-by: Stefan Reinauer <reinauer(a)google.com> Signed-off-by: Stefan Reinauer <reinauer(a)chromium.org> Reviewed-on: https://chromium-review.googlesource.com/182188 Reviewed-by: Aaron Durbin <adurbin(a)chromium.org> Reviewed-by: Duncan Laurie <dlaurie(a)chromium.org> Tested-by: Stefan Reinauer <reinauer(a)chromium.org> Commit-Queue: Stefan Reinauer <reinauer(a)chromium.org> --- src/mainboard/google/panther/acpi/thermal.asl | 27 ++++++++++++++++++++++++++- 1 file changed, 26 insertions(+), 1 deletion(-) diff --git a/src/mainboard/google/panther/acpi/thermal.asl b/src/mainboard/google/panther/acpi/thermal.asl index d5b1290..a6ea851 100644 --- a/src/mainboard/google/panther/acpi/thermal.asl +++ b/src/mainboard/google/panther/acpi/thermal.asl @@ -61,7 +61,7 @@ Scope (\_TZ) Return (\PPKG ()) } - Method (_TMP, 0, Serialized) + Method (TCHK, 0, Serialized) { // Get CPU Temperature from PECI via SuperIO TMPIN3 Store (\_SB.PCI0.LPCB.SIO.ENVC.TIN3, Local0) @@ -84,6 +84,31 @@ Scope (\_TZ) Return (CTOK (Local0)) } + Method (_TMP, 0, Serialized) + { + // Get temperature from SuperIO in deci-kelvin + Store (TCHK (), Local0) + + // Critical temperature in deci-kelvin + Store (CTOK (\TMAX), Local1) + + If (LGreaterEqual (Local0, Local1)) { + Store ("CRITICAL TEMPERATURE", Debug) + Store (Local0, Debug) + + // Wait 1 second for SuperIO to re-poll + Sleep (1000) + + // Re-read temperature from SuperIO + Store (TCHK (), Local0) + + Store ("RE-READ TEMPERATURE", Debug) + Store (Local0, Debug) + } + + Return (Local0) + } + Method (_AC0) { If (LLessEqual (\FLVL, 0)) { Return (CTOK (\F0OF))

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Patch set updated for coreboot: a29113a google/panther: Disconnect speaker and mic in verb table
by Paul Menzel 06 Jul '14

06 Jul '14

Paul Menzel (paulepanter(a)users.sourceforge.net) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/6000 -gerrit commit a29113a9b24544796e7e35dbd14a4a7296d8e025 Author: Stefan Reinauer <reinauer(a)chromium.org> Date: Thu Jan 9 14:15:36 2014 -0800 google/panther: Disconnect speaker and mic in verb table There is no speaker and no builtin microphone in this system, hence disable them in the verb table. BRANCH=panther BUG=chrome-os-partner:24230 TEST=Boot Panther, see Microphone and Speaker disappear in Audio Settings Change-Id: I32bacec38ba3ba0c2359a8fc94e12af64f576012 Signed-off-by: Stefan Reinauer <reinauer(a)google.com> Signed-off-by: Stefan Reinauer <reinauer(a)chromium.org> Reviewed-on: https://chromium-review.googlesource.com/182006 Reviewed-by: Dylan Reid <dgreid(a)chromium.org> Commit-Queue: Stefan Reinauer <reinauer(a)chromium.org> Tested-by: Stefan Reinauer <reinauer(a)chromium.org> --- src/mainboard/google/panther/hda_verb.h | 18 +++++++++--------- 1 file changed, 9 insertions(+), 9 deletions(-) diff --git a/src/mainboard/google/panther/hda_verb.h b/src/mainboard/google/panther/hda_verb.h index ba0da1c..cec56eb 100644 --- a/src/mainboard/google/panther/hda_verb.h +++ b/src/mainboard/google/panther/hda_verb.h @@ -31,17 +31,17 @@ static const u32 mainboard_cim_verb_data[] = { /* Pin Widget Verb Table */ - /* Pin Complex (NID 0x12) DMIC - interior mobile lid */ - 0x01271c10, - 0x01271d10, - 0x01271ea6, - 0x01271fb7, + /* Pin Complex (NID 0x12) DMIC */ + 0x01271cf0, + 0x01271d11, + 0x01271e11, + 0x01271f41, /* Pin Complex (NID 0x14) SPKR-OUT PORTD */ - 0x01471c10, // group 1, front left/right - 0x01471d01, // no connector, no jack detect - 0x01471e17, // speaker out, analog - 0x01471f90, // fixed function, internal + 0x01471cf0, + 0x01471d11, + 0x01471e11, + 0x01471f40, /* Pin Complex (NID 0x17) */ 0x01771cf0,

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Patch set updated for coreboot: 321b57c AGESA: Fix error status code return type to enum from UINT32
by Edward O'Callaghan 06 Jul '14

06 Jul '14

Edward O'Callaghan (eocallaghan(a)alterapraxis.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/6182 -gerrit commit 321b57c01cf7c68f957fc90b62d94724af795432 Author: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> Date: Sat Jul 5 15:24:50 2014 +1000 AGESA: Fix error status code return type to enum from UINT32 AGESA correctly uses the enum AGESA_STATUS type whereas boards use a mess of UINT32 typecasts. Change-Id: I16ccfcc73cda6b917c7ff5fd42ee2cd04e7dc0dd Signed-off-by: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> --- src/mainboard/amd/dinar/agesawrapper.c | 46 +++++++-------- src/mainboard/amd/dinar/agesawrapper.h | 20 +++---- src/mainboard/amd/inagua/agesawrapper.c | 50 +++++++--------- src/mainboard/amd/inagua/agesawrapper.h | 26 ++++----- src/mainboard/amd/olivehill/agesawrapper.c | 66 +++++++++------------- src/mainboard/amd/olivehill/agesawrapper.h | 30 +++++----- src/mainboard/amd/parmer/agesawrapper.c | 66 +++++++++------------- src/mainboard/amd/parmer/agesawrapper.h | 30 +++++----- src/mainboard/amd/persimmon/agesawrapper.c | 65 +++++++++------------ src/mainboard/amd/persimmon/agesawrapper.h | 30 +++++----- src/mainboard/amd/south_station/agesawrapper.c | 50 +++++++--------- src/mainboard/amd/south_station/agesawrapper.h | 26 ++++----- src/mainboard/amd/thatcher/agesawrapper.c | 66 +++++++++------------- src/mainboard/amd/thatcher/agesawrapper.h | 30 +++++----- src/mainboard/amd/torpedo/agesawrapper.c | 49 +++++++--------- src/mainboard/amd/torpedo/agesawrapper.h | 22 ++++---- src/mainboard/amd/union_station/agesawrapper.c | 50 +++++++--------- src/mainboard/amd/union_station/agesawrapper.h | 26 ++++----- src/mainboard/asrock/e350m1/agesawrapper.c | 50 +++++++--------- src/mainboard/asrock/e350m1/agesawrapper.h | 22 ++++---- src/mainboard/asrock/imb-a180/agesawrapper.c | 66 +++++++++------------- src/mainboard/asrock/imb-a180/agesawrapper.h | 30 +++++----- src/mainboard/asus/f2a85-m/agesawrapper.c | 66 +++++++++------------- src/mainboard/asus/f2a85-m/agesawrapper.h | 30 +++++----- src/mainboard/gizmosphere/gizmo/agesawrapper.c | 65 +++++++++------------ src/mainboard/gizmosphere/gizmo/agesawrapper.h | 26 ++++----- src/mainboard/hp/pavilion_m6_1035dx/agesawrapper.c | 61 +++++++++----------- src/mainboard/hp/pavilion_m6_1035dx/agesawrapper.h | 28 ++++----- src/mainboard/jetway/nf81-t56n-lf/agesawrapper.h | 2 +- .../lippert/frontrunner-af/agesawrapper.c | 65 +++++++++------------ .../lippert/frontrunner-af/agesawrapper.h | 26 ++++----- src/mainboard/lippert/toucan-af/agesawrapper.c | 65 +++++++++------------ src/mainboard/lippert/toucan-af/agesawrapper.h | 26 ++++----- src/mainboard/supermicro/h8qgi/agesawrapper.c | 48 ++++++++-------- src/mainboard/supermicro/h8qgi/agesawrapper.h | 20 +++---- src/mainboard/supermicro/h8scm/agesawrapper.c | 48 ++++++++-------- src/mainboard/supermicro/h8scm/agesawrapper.h | 20 +++---- src/mainboard/tyan/s8226/agesawrapper.c | 49 ++++++++-------- src/mainboard/tyan/s8226/agesawrapper.h | 20 +++---- 39 files changed, 706 insertions(+), 875 deletions(-) diff --git a/src/mainboard/amd/dinar/agesawrapper.c b/src/mainboard/amd/dinar/agesawrapper.c index f8a5803..782512d 100644 --- a/src/mainboard/amd/dinar/agesawrapper.c +++ b/src/mainboard/amd/dinar/agesawrapper.c @@ -195,11 +195,10 @@ static UINT32 amdinitcpuio(VOID) LibAmdPciWrite(AccessWidth32, PciAddress, &PciData, &StdHeader); } Status = AGESA_SUCCESS; - return (UINT32)Status; + return Status; } -UINT32 -agesawrapper_amdinitmmio ( +AGESA_STATUS agesawrapper_amdinitmmio ( VOID ) { @@ -248,11 +247,10 @@ agesawrapper_amdinitmmio ( LibAmdMsrWrite (0x20F, &MsrReg, &StdHeader); Status = AGESA_SUCCESS; - return (UINT32)Status; + return Status; } -UINT32 -agesawrapper_amdinitreset ( +AGESA_STATUS agesawrapper_amdinitreset ( VOID ) { @@ -291,11 +289,10 @@ agesawrapper_amdinitreset ( status = AGESA_SUCCESS; #endif - return (UINT32)status; + return status; } -UINT32 -agesawrapper_amdinitearly ( +AGESA_STATUS agesawrapper_amdinitearly ( VOID ) { @@ -323,7 +320,7 @@ agesawrapper_amdinitearly ( if (status != AGESA_SUCCESS) agesawrapper_amdreadeventlog(); AmdReleaseStruct (&AmdParamStruct); - return (UINT32)status; + return status; } /** * OemCustomizeInitEarly @@ -354,8 +351,7 @@ OemCustomizeInitPost ( InitPost->MemConfig.UmaSize = 0xE0-0xC0; } -UINT32 -agesawrapper_amdinitpost ( +AGESA_STATUS agesawrapper_amdinitpost ( VOID ) { @@ -386,11 +382,10 @@ agesawrapper_amdinitpost ( /* Initialize heap space */ EmptyHeap(); - return (UINT32)status; + return status; } -UINT32 -agesawrapper_amdinitenv ( +AGESA_STATUS agesawrapper_amdinitenv ( VOID ) { @@ -413,7 +408,7 @@ agesawrapper_amdinitenv ( if (status != AGESA_SUCCESS) agesawrapper_amdreadeventlog(); AmdReleaseStruct (&AmdParamStruct); - return (UINT32)status; + return status; } VOID * @@ -444,8 +439,7 @@ agesawrapper_getlateinitptr ( } } -UINT32 -agesawrapper_amdinitmid ( +AGESA_STATUS agesawrapper_amdinitmid ( VOID ) { @@ -474,11 +468,10 @@ agesawrapper_amdinitmid ( if (status != AGESA_SUCCESS) agesawrapper_amdreadeventlog(); AmdReleaseStruct (&AmdParamStruct); - return (UINT32)status; + return status; } -UINT32 -agesawrapper_amdinitlate(VOID) +AGESA_STATUS agesawrapper_amdinitlate(VOID) { AGESA_STATUS Status; AMD_INTERFACE_PARAMS AmdParamStruct; @@ -526,10 +519,10 @@ agesawrapper_amdinitlate(VOID) * AmdReleaseStruct (&AmdLateParams); */ - return (UINT32)Status; + return Status; } -UINT32 agesawrapper_amdlaterunaptask (UINT32 Func, UINT32 Data, VOID *ConfigPtr) +AGESA_STATUS agesawrapper_amdlaterunaptask (UINT32 Func, UINT32 Data, VOID *ConfigPtr) { AGESA_STATUS Status; AP_EXE_PARAMS AmdLateParams; @@ -550,11 +543,10 @@ UINT32 agesawrapper_amdlaterunaptask (UINT32 Func, UINT32 Data, VOID *ConfigPtr) ASSERT(Status == AGESA_SUCCESS); } - return (UINT32)Status; + return Status; } -UINT32 -agesawrapper_amdreadeventlog ( +AGESA_STATUS agesawrapper_amdreadeventlog ( VOID ) { @@ -578,5 +570,5 @@ agesawrapper_amdreadeventlog ( Status = AmdReadEventLog (&AmdEventParams); } - return (UINT32)Status; + return Status; } diff --git a/src/mainboard/amd/dinar/agesawrapper.h b/src/mainboard/amd/dinar/agesawrapper.h index b8b8db8..005b2ea 100644 --- a/src/mainboard/amd/dinar/agesawrapper.h +++ b/src/mainboard/amd/dinar/agesawrapper.h @@ -84,16 +84,16 @@ enum { //void brazos_platform_stage(void); -UINT32 agesawrapper_amdinitreset (void); -UINT32 agesawrapper_amdinitearly (void); -UINT32 agesawrapper_amdinitenv (void); -UINT32 agesawrapper_amdinitlate (void); -UINT32 agesawrapper_amdinitpost (void); -UINT32 agesawrapper_amdinitmid (void); -UINT32 agesawrapper_amdreadeventlog (void); -UINT32 agesawrapper_amdinitmmio (void); +AGESA_STATUS agesawrapper_amdinitreset (void); +AGESA_STATUS agesawrapper_amdinitearly (void); +AGESA_STATUS agesawrapper_amdinitenv (void); +AGESA_STATUS agesawrapper_amdinitlate (void); +AGESA_STATUS agesawrapper_amdinitpost (void); +AGESA_STATUS agesawrapper_amdinitmid (void); +AGESA_STATUS agesawrapper_amdreadeventlog (void); +AGESA_STATUS agesawrapper_amdinitmmio (void); void *agesawrapper_getlateinitptr (int pick); -UINT32 agesawrapper_amdlaterunaptask (UINT32 Func, UINT32 Data, VOID *ConfigPtr); +AGESA_STATUS agesawrapper_amdlaterunaptask (UINT32 Func, UINT32 Data, VOID *ConfigPtr); -static inline UINT32 agesawrapper_amdS3Save(void) { return 0; } +static inline AGESA_STATUS agesawrapper_amdS3Save(void) { return 0; } #endif diff --git a/src/mainboard/amd/inagua/agesawrapper.c b/src/mainboard/amd/inagua/agesawrapper.c index a375e84..49b96b5 100644 --- a/src/mainboard/amd/inagua/agesawrapper.c +++ b/src/mainboard/amd/inagua/agesawrapper.c @@ -47,8 +47,7 @@ VOID *AcpiWheaMce = NULL; VOID *AcpiWheaCmc = NULL; VOID *AcpiAlib = NULL; -UINT32 -agesawrapper_amdinitcpuio ( +AGESA_STATUS agesawrapper_amdinitcpuio ( VOID ) { @@ -93,11 +92,10 @@ agesawrapper_amdinitcpuio ( PciData = 0x00000003; LibAmdPciWrite(AccessWidth32, PciAddress, &PciData, &StdHeader); Status = AGESA_SUCCESS; - return (UINT32)Status; + return Status; } -UINT32 -agesawrapper_amdinitmmio ( +AGESA_STATUS agesawrapper_amdinitmmio ( VOID ) { @@ -143,11 +141,10 @@ agesawrapper_amdinitmmio ( LibAmdPciWrite(AccessWidth32, PciAddress, &PciData, &StdHeader); Status = AGESA_SUCCESS; - return (UINT32)Status; + return Status; } -UINT32 -agesawrapper_amdinitreset ( +AGESA_STATUS agesawrapper_amdinitreset ( VOID ) { @@ -172,11 +169,10 @@ agesawrapper_amdinitreset ( status = AmdInitReset ((AMD_RESET_PARAMS *)AmdParamStruct.NewStructPtr); if (status != AGESA_SUCCESS) agesawrapper_amdreadeventlog(); AmdReleaseStruct (&AmdParamStruct); - return (UINT32)status; + return status; } -UINT32 -agesawrapper_amdinitearly ( +AGESA_STATUS agesawrapper_amdinitearly ( VOID ) { @@ -201,11 +197,10 @@ agesawrapper_amdinitearly ( if (status != AGESA_SUCCESS) agesawrapper_amdreadeventlog(); AmdReleaseStruct (&AmdParamStruct); - return (UINT32)status; + return status; } -UINT32 -agesawrapper_amdinitpost ( +AGESA_STATUS agesawrapper_amdinitpost ( VOID ) { @@ -229,11 +224,10 @@ agesawrapper_amdinitpost ( /* Initialize heap space */ EmptyHeap(); - return (UINT32)status; + return status; } -UINT32 -agesawrapper_amdinitenv ( +AGESA_STATUS agesawrapper_amdinitenv ( VOID ) { @@ -327,7 +321,7 @@ agesawrapper_amdinitenv ( LibAmdPciWrite (AccessWidth32, PciAddress, &PciValue, &AmdParamStruct.StdHeader); AmdReleaseStruct (&AmdParamStruct); - return (UINT32)status; + return status; } VOID * @@ -355,8 +349,7 @@ agesawrapper_getlateinitptr ( } } -UINT32 -agesawrapper_amdinitmid ( +AGESA_STATUS agesawrapper_amdinitmid ( VOID ) { @@ -381,11 +374,10 @@ agesawrapper_amdinitmid ( if (status != AGESA_SUCCESS) agesawrapper_amdreadeventlog(); AmdReleaseStruct (&AmdParamStruct); - return (UINT32)status; + return status; } -UINT32 -agesawrapper_amdinitlate ( +AGESA_STATUS agesawrapper_amdinitlate ( VOID ) { @@ -431,11 +423,10 @@ agesawrapper_amdinitlate ( * AmdReleaseStruct (&AmdLateParams); */ - return (UINT32)Status; + return Status; } -UINT32 -agesawrapper_amdlaterunaptask ( +AGESA_STATUS agesawrapper_amdlaterunaptask ( UINT32 Func, UINT32 Data, VOID *ConfigPtr @@ -459,11 +450,10 @@ agesawrapper_amdlaterunaptask ( ASSERT(Status == AGESA_SUCCESS); } - return (UINT32)Status; + return Status; } -UINT32 -agesawrapper_amdreadeventlog ( +AGESA_STATUS agesawrapper_amdreadeventlog ( VOID ) { @@ -484,5 +474,5 @@ agesawrapper_amdreadeventlog ( Status = AmdReadEventLog (&AmdEventParams); } - return (UINT32)Status; + return Status; } diff --git a/src/mainboard/amd/inagua/agesawrapper.h b/src/mainboard/amd/inagua/agesawrapper.h index 6e15a25..df8f2b1 100644 --- a/src/mainboard/amd/inagua/agesawrapper.h +++ b/src/mainboard/amd/inagua/agesawrapper.h @@ -39,19 +39,19 @@ enum { PICK_ALIB, /* SACPI SSDT table with ALIB implementation */ }; -UINT32 agesawrapper_amdinitreset (void); -UINT32 agesawrapper_amdinitearly (void); -UINT32 agesawrapper_amdinitenv (void); -UINT32 agesawrapper_amdinitlate (void); -UINT32 agesawrapper_amdinitpost (void); -UINT32 agesawrapper_amdinitmid (void); - -UINT32 agesawrapper_amdreadeventlog (void); - -UINT32 agesawrapper_amdinitcpuio (void); -UINT32 agesawrapper_amdinitmmio (void); -UINT32 agesawrapper_amdlaterunaptask (UINT32 Func, UINT32 Data, VOID *ConfigPtr); +AGESA_STATUS agesawrapper_amdinitreset (void); +AGESA_STATUS agesawrapper_amdinitearly (void); +AGESA_STATUS agesawrapper_amdinitenv (void); +AGESA_STATUS agesawrapper_amdinitlate (void); +AGESA_STATUS agesawrapper_amdinitpost (void); +AGESA_STATUS agesawrapper_amdinitmid (void); + +AGESA_STATUS agesawrapper_amdreadeventlog (void); + +AGESA_STATUS agesawrapper_amdinitcpuio (void); +AGESA_STATUS agesawrapper_amdinitmmio (void); +AGESA_STATUS agesawrapper_amdlaterunaptask (UINT32 Func, UINT32 Data, VOID *ConfigPtr); void *agesawrapper_getlateinitptr (int pick); -static inline UINT32 agesawrapper_amdS3Save(void) { return 0; } +static inline AGESA_STATUS agesawrapper_amdS3Save(void) { return 0; } #endif diff --git a/src/mainboard/amd/olivehill/agesawrapper.c b/src/mainboard/amd/olivehill/agesawrapper.c index 8e3cb61..f4ea628 100644 --- a/src/mainboard/amd/olivehill/agesawrapper.c +++ b/src/mainboard/amd/olivehill/agesawrapper.c @@ -56,8 +56,7 @@ VOID *AcpiWheaCmc = NULL; VOID *AcpiAlib = NULL; VOID *AcpiIvrs = NULL; -UINT32 -agesawrapper_amdinitcpuio ( +AGESA_STATUS agesawrapper_amdinitcpuio ( VOID ) { @@ -102,11 +101,10 @@ agesawrapper_amdinitcpuio ( PciData = 0x00000003; LibAmdPciWrite(AccessWidth32, PciAddress, &PciData, &StdHeader); Status = AGESA_SUCCESS; - return (UINT32)Status; + return Status; } -UINT32 -agesawrapper_amdinitmmio ( +AGESA_STATUS agesawrapper_amdinitmmio ( VOID ) { @@ -142,11 +140,10 @@ agesawrapper_amdinitmmio ( LibAmdMsrWrite (0x20D, &MsrReg, &StdHeader); Status = AGESA_SUCCESS; - return (UINT32)Status; + return Status; } -UINT32 -agesawrapper_amdinitreset ( +AGESA_STATUS agesawrapper_amdinitreset ( VOID ) { @@ -182,11 +179,10 @@ agesawrapper_amdinitreset ( status = AmdInitReset ((AMD_RESET_PARAMS *)AmdParamStruct.NewStructPtr); if (status != AGESA_SUCCESS) agesawrapper_amdreadeventlog(AmdParamStruct.StdHeader.HeapStatus); AmdReleaseStruct (&AmdParamStruct); - return (UINT32)status; + return status; } -UINT32 -agesawrapper_amdinitearly ( +AGESA_STATUS agesawrapper_amdinitearly ( VOID ) { @@ -214,11 +210,10 @@ agesawrapper_amdinitearly ( if (status != AGESA_SUCCESS) agesawrapper_amdreadeventlog(AmdParamStruct.StdHeader.HeapStatus); AmdReleaseStruct (&AmdParamStruct); - return (UINT32)status; + return status; } -UINT32 -agesawrapper_amdinitpost ( +AGESA_STATUS agesawrapper_amdinitpost ( VOID ) { @@ -246,11 +241,10 @@ agesawrapper_amdinitpost ( /* Initialize heap space */ EmptyHeap(); - return (UINT32)status; + return status; } -UINT32 -agesawrapper_amdinitenv ( +AGESA_STATUS agesawrapper_amdinitenv ( VOID ) { @@ -279,7 +273,7 @@ agesawrapper_amdinitenv ( Modify D1F0x18 */ - return (UINT32)status; + return status; } VOID * @@ -309,8 +303,7 @@ agesawrapper_getlateinitptr ( } } -UINT32 -agesawrapper_amdinitmid ( +AGESA_STATUS agesawrapper_amdinitmid ( VOID ) { @@ -339,11 +332,10 @@ agesawrapper_amdinitmid ( if (status != AGESA_SUCCESS) agesawrapper_amdreadeventlog(AmdParamStruct.StdHeader.HeapStatus); AmdReleaseStruct (&AmdParamStruct); - return (UINT32)status; + return status; } -UINT32 -agesawrapper_amdinitlate ( +AGESA_STATUS agesawrapper_amdinitlate ( VOID ) { @@ -391,11 +383,10 @@ agesawrapper_amdinitlate ( (unsigned int)AcpiAlib, (unsigned int)AcpiIvrs, __func__); /* AmdReleaseStruct (&AmdParamStruct); */ - return (UINT32)Status; + return Status; } -UINT32 -agesawrapper_amdlaterunaptask ( +AGESA_STATUS agesawrapper_amdlaterunaptask ( UINT32 Func, UINT32 Data, VOID *ConfigPtr @@ -422,11 +413,11 @@ agesawrapper_amdlaterunaptask ( ASSERT(Status == AGESA_SUCCESS); } - return (UINT32)Status; + return Status; } -UINT32 agesawrapper_amdinitresume(VOID) +AGESA_STATUS agesawrapper_amdinitresume(VOID) { AGESA_STATUS status; AMD_INTERFACE_PARAMS AmdParamStruct; @@ -460,11 +451,11 @@ UINT32 agesawrapper_amdinitresume(VOID) if (status != AGESA_SUCCESS) agesawrapper_amdreadeventlog(AmdParamStruct.StdHeader.HeapStatus); AmdReleaseStruct (&AmdParamStruct); - return (UINT32)status; + return status; } #ifndef __PRE_RAM__ -UINT32 agesawrapper_fchs3earlyrestore (VOID) +AGESA_STATUS agesawrapper_fchs3earlyrestore (VOID) { AGESA_STATUS status = AGESA_SUCCESS; @@ -487,7 +478,7 @@ UINT32 agesawrapper_fchs3earlyrestore (VOID) } #endif -UINT32 agesawrapper_amds3laterestore (VOID) +AGESA_STATUS agesawrapper_amds3laterestore (VOID) { AGESA_STATUS Status; AMD_INTERFACE_PARAMS AmdInterfaceParams; @@ -523,14 +514,14 @@ UINT32 agesawrapper_amds3laterestore (VOID) ASSERT(Status == AGESA_SUCCESS); } - return (UINT32)Status; + return Status; } #ifndef __PRE_RAM__ extern UINT8 picr_data[0x54], intr_data[0x54]; -UINT32 agesawrapper_fchs3laterestore (VOID) +AGESA_STATUS agesawrapper_fchs3laterestore (VOID) { AGESA_STATUS status = AGESA_SUCCESS; @@ -566,7 +557,7 @@ UINT32 agesawrapper_fchs3laterestore (VOID) #ifndef __PRE_RAM__ -UINT32 agesawrapper_amdS3Save(VOID) +AGESA_STATUS agesawrapper_amdS3Save(VOID) { AGESA_STATUS Status; AMD_S3SAVE_PARAMS *AmdS3SaveParamsPtr; @@ -622,13 +613,12 @@ UINT32 agesawrapper_amdS3Save(VOID) AmdReleaseStruct (&AmdInterfaceParams); - return (UINT32)Status; + return Status; } #endif /* #ifndef __PRE_RAM__ */ -UINT32 -agesawrapper_amdreadeventlog ( +AGESA_STATUS agesawrapper_amdreadeventlog ( UINT8 HeapStatus ) { @@ -653,5 +643,5 @@ agesawrapper_amdreadeventlog ( Status = AmdReadEventLog (&AmdEventParams); } - return (UINT32)Status; + return Status; } diff --git a/src/mainboard/amd/olivehill/agesawrapper.h b/src/mainboard/amd/olivehill/agesawrapper.h index cccb5c9..f826d80 100644 --- a/src/mainboard/amd/olivehill/agesawrapper.h +++ b/src/mainboard/amd/olivehill/agesawrapper.h @@ -40,22 +40,22 @@ enum { PICK_IVRS, /* IOMMU ACPI IVRS(I/O Virtualization Reporting Structure) table */ }; -UINT32 agesawrapper_amdinitreset (void); -UINT32 agesawrapper_amdinitearly (void); -UINT32 agesawrapper_amdinitenv (void); -UINT32 agesawrapper_amdinitlate (void); -UINT32 agesawrapper_amdinitpost (void); -UINT32 agesawrapper_amdinitmid (void); -UINT32 agesawrapper_amdreadeventlog (UINT8 HeapStatus); -UINT32 agesawrapper_amdinitmmio (void); -UINT32 agesawrapper_amdinitcpuio (void); +AGESA_STATUS agesawrapper_amdinitreset (void); +AGESA_STATUS agesawrapper_amdinitearly (void); +AGESA_STATUS agesawrapper_amdinitenv (void); +AGESA_STATUS agesawrapper_amdinitlate (void); +AGESA_STATUS agesawrapper_amdinitpost (void); +AGESA_STATUS agesawrapper_amdinitmid (void); +AGESA_STATUS agesawrapper_amdreadeventlog (UINT8 HeapStatus); +AGESA_STATUS agesawrapper_amdinitmmio (void); +AGESA_STATUS agesawrapper_amdinitcpuio (void); void *agesawrapper_getlateinitptr (int pick); -UINT32 agesawrapper_amdlaterunaptask (UINT32 Func, UINT32 Data, void *ConfigPtr); -UINT32 agesawrapper_amdS3Save(VOID); -UINT32 agesawrapper_amdinitresume(VOID); -UINT32 agesawrapper_amds3laterestore (VOID); +AGESA_STATUS agesawrapper_amdlaterunaptask (UINT32 Func, UINT32 Data, void *ConfigPtr); +AGESA_STATUS agesawrapper_amdS3Save(VOID); +AGESA_STATUS agesawrapper_amdinitresume (VOID); +AGESA_STATUS agesawrapper_amds3laterestore (VOID); -UINT32 agesawrapper_fchs3earlyrestore (VOID); -UINT32 agesawrapper_fchs3laterestore (VOID); +AGESA_STATUS agesawrapper_fchs3earlyrestore (VOID); +AGESA_STATUS agesawrapper_fchs3laterestore (VOID); #endif /* _AGESAWRAPPER_H_ */ diff --git a/src/mainboard/amd/parmer/agesawrapper.c b/src/mainboard/amd/parmer/agesawrapper.c index 85c1474..c011242 100644 --- a/src/mainboard/amd/parmer/agesawrapper.c +++ b/src/mainboard/amd/parmer/agesawrapper.c @@ -56,8 +56,7 @@ VOID *AcpiWheaCmc = NULL; VOID *AcpiAlib = NULL; VOID *AcpiIvrs = NULL; -UINT32 -agesawrapper_amdinitcpuio ( +AGESA_STATUS agesawrapper_amdinitcpuio ( VOID ) { @@ -102,11 +101,10 @@ agesawrapper_amdinitcpuio ( PciData = 0x00000003; LibAmdPciWrite(AccessWidth32, PciAddress, &PciData, &StdHeader); Status = AGESA_SUCCESS; - return (UINT32)Status; + return Status; } -UINT32 -agesawrapper_amdinitmmio ( +AGESA_STATUS agesawrapper_amdinitmmio ( VOID ) { @@ -142,11 +140,10 @@ agesawrapper_amdinitmmio ( LibAmdMsrWrite (0x20D, &MsrReg, &StdHeader); Status = AGESA_SUCCESS; - return (UINT32)Status; + return Status; } -UINT32 -agesawrapper_amdinitreset ( +AGESA_STATUS agesawrapper_amdinitreset ( VOID ) { @@ -182,11 +179,10 @@ agesawrapper_amdinitreset ( status = AmdInitReset ((AMD_RESET_PARAMS *)AmdParamStruct.NewStructPtr); if (status != AGESA_SUCCESS) agesawrapper_amdreadeventlog(AmdParamStruct.StdHeader.HeapStatus); AmdReleaseStruct (&AmdParamStruct); - return (UINT32)status; + return status; } -UINT32 -agesawrapper_amdinitearly ( +AGESA_STATUS agesawrapper_amdinitearly ( VOID ) { @@ -214,11 +210,10 @@ agesawrapper_amdinitearly ( if (status != AGESA_SUCCESS) agesawrapper_amdreadeventlog(AmdParamStruct.StdHeader.HeapStatus); AmdReleaseStruct (&AmdParamStruct); - return (UINT32)status; + return status; } -UINT32 -agesawrapper_amdinitpost ( +AGESA_STATUS agesawrapper_amdinitpost ( VOID ) { @@ -247,11 +242,10 @@ agesawrapper_amdinitpost ( EmptyHeap(); - return (UINT32)status; + return status; } -UINT32 -agesawrapper_amdinitenv ( +AGESA_STATUS agesawrapper_amdinitenv ( VOID ) { @@ -280,7 +274,7 @@ agesawrapper_amdinitenv ( Modify D1F0x18 */ - return (UINT32)status; + return status; } VOID * @@ -310,8 +304,7 @@ agesawrapper_getlateinitptr ( } } -UINT32 -agesawrapper_amdinitmid ( +AGESA_STATUS agesawrapper_amdinitmid ( VOID ) { @@ -340,11 +333,10 @@ agesawrapper_amdinitmid ( if (status != AGESA_SUCCESS) agesawrapper_amdreadeventlog(AmdParamStruct.StdHeader.HeapStatus); AmdReleaseStruct (&AmdParamStruct); - return (UINT32)status; + return status; } -UINT32 -agesawrapper_amdinitlate ( +AGESA_STATUS agesawrapper_amdinitlate ( VOID ) { @@ -392,11 +384,10 @@ agesawrapper_amdinitlate ( (unsigned int)AcpiAlib, (unsigned int)AcpiIvrs, __func__); /* AmdReleaseStruct (&AmdParamStruct); */ - return (UINT32)Status; + return Status; } -UINT32 -agesawrapper_amdlaterunaptask ( +AGESA_STATUS agesawrapper_amdlaterunaptask ( UINT32 Func, UINT32 Data, VOID *ConfigPtr @@ -423,11 +414,11 @@ agesawrapper_amdlaterunaptask ( ASSERT(Status == AGESA_SUCCESS); } - return (UINT32)Status; + return Status; } -UINT32 agesawrapper_amdinitresume(VOID) +AGESA_STATUS agesawrapper_amdinitresume(VOID) { AGESA_STATUS status; AMD_INTERFACE_PARAMS AmdParamStruct; @@ -461,11 +452,11 @@ UINT32 agesawrapper_amdinitresume(VOID) if (status != AGESA_SUCCESS) agesawrapper_amdreadeventlog(AmdParamStruct.StdHeader.HeapStatus); AmdReleaseStruct (&AmdParamStruct); - return (UINT32)status; + return status; } #ifndef __PRE_RAM__ -UINT32 agesawrapper_fchs3earlyrestore (VOID) +AGESA_STATUS agesawrapper_fchs3earlyrestore (VOID) { AGESA_STATUS status = AGESA_SUCCESS; @@ -489,7 +480,7 @@ UINT32 agesawrapper_fchs3earlyrestore (VOID) } #endif -UINT32 agesawrapper_amds3laterestore (VOID) +AGESA_STATUS agesawrapper_amds3laterestore (VOID) { AGESA_STATUS Status; AMD_INTERFACE_PARAMS AmdInterfaceParams; @@ -525,14 +516,14 @@ UINT32 agesawrapper_amds3laterestore (VOID) ASSERT(Status == AGESA_SUCCESS); } - return (UINT32)Status; + return Status; } #ifndef __PRE_RAM__ extern UINT8 picr_data[0x54], intr_data[0x54]; -UINT32 agesawrapper_fchs3laterestore (VOID) +AGESA_STATUS agesawrapper_fchs3laterestore (VOID) { AGESA_STATUS status = AGESA_SUCCESS; @@ -569,7 +560,7 @@ UINT32 agesawrapper_fchs3laterestore (VOID) #ifndef __PRE_RAM__ -UINT32 agesawrapper_amdS3Save(VOID) +AGESA_STATUS agesawrapper_amdS3Save(VOID) { AGESA_STATUS Status; AMD_S3SAVE_PARAMS *AmdS3SaveParamsPtr; @@ -625,13 +616,12 @@ UINT32 agesawrapper_amdS3Save(VOID) AmdReleaseStruct (&AmdInterfaceParams); - return (UINT32)Status; + return Status; } #endif /* #ifndef __PRE_RAM__ */ -UINT32 -agesawrapper_amdreadeventlog ( +AGESA_STATUS agesawrapper_amdreadeventlog ( UINT8 HeapStatus ) { @@ -656,5 +646,5 @@ agesawrapper_amdreadeventlog ( Status = AmdReadEventLog (&AmdEventParams); } - return (UINT32)Status; + return Status; } diff --git a/src/mainboard/amd/parmer/agesawrapper.h b/src/mainboard/amd/parmer/agesawrapper.h index cccb5c9..f826d80 100644 --- a/src/mainboard/amd/parmer/agesawrapper.h +++ b/src/mainboard/amd/parmer/agesawrapper.h @@ -40,22 +40,22 @@ enum { PICK_IVRS, /* IOMMU ACPI IVRS(I/O Virtualization Reporting Structure) table */ }; -UINT32 agesawrapper_amdinitreset (void); -UINT32 agesawrapper_amdinitearly (void); -UINT32 agesawrapper_amdinitenv (void); -UINT32 agesawrapper_amdinitlate (void); -UINT32 agesawrapper_amdinitpost (void); -UINT32 agesawrapper_amdinitmid (void); -UINT32 agesawrapper_amdreadeventlog (UINT8 HeapStatus); -UINT32 agesawrapper_amdinitmmio (void); -UINT32 agesawrapper_amdinitcpuio (void); +AGESA_STATUS agesawrapper_amdinitreset (void); +AGESA_STATUS agesawrapper_amdinitearly (void); +AGESA_STATUS agesawrapper_amdinitenv (void); +AGESA_STATUS agesawrapper_amdinitlate (void); +AGESA_STATUS agesawrapper_amdinitpost (void); +AGESA_STATUS agesawrapper_amdinitmid (void); +AGESA_STATUS agesawrapper_amdreadeventlog (UINT8 HeapStatus); +AGESA_STATUS agesawrapper_amdinitmmio (void); +AGESA_STATUS agesawrapper_amdinitcpuio (void); void *agesawrapper_getlateinitptr (int pick); -UINT32 agesawrapper_amdlaterunaptask (UINT32 Func, UINT32 Data, void *ConfigPtr); -UINT32 agesawrapper_amdS3Save(VOID); -UINT32 agesawrapper_amdinitresume(VOID); -UINT32 agesawrapper_amds3laterestore (VOID); +AGESA_STATUS agesawrapper_amdlaterunaptask (UINT32 Func, UINT32 Data, void *ConfigPtr); +AGESA_STATUS agesawrapper_amdS3Save(VOID); +AGESA_STATUS agesawrapper_amdinitresume (VOID); +AGESA_STATUS agesawrapper_amds3laterestore (VOID); -UINT32 agesawrapper_fchs3earlyrestore (VOID); -UINT32 agesawrapper_fchs3laterestore (VOID); +AGESA_STATUS agesawrapper_fchs3earlyrestore (VOID); +AGESA_STATUS agesawrapper_fchs3laterestore (VOID); #endif /* _AGESAWRAPPER_H_ */ diff --git a/src/mainboard/amd/persimmon/agesawrapper.c b/src/mainboard/amd/persimmon/agesawrapper.c index cfd0eee..b3a217a 100644 --- a/src/mainboard/amd/persimmon/agesawrapper.c +++ b/src/mainboard/amd/persimmon/agesawrapper.c @@ -46,8 +46,7 @@ VOID *AcpiWheaMce = NULL; VOID *AcpiWheaCmc = NULL; VOID *AcpiAlib = NULL; -UINT32 -agesawrapper_amdinitcpuio ( +AGESA_STATUS agesawrapper_amdinitcpuio ( VOID ) { @@ -92,11 +91,10 @@ agesawrapper_amdinitcpuio ( PciData = 0x00000003; LibAmdPciWrite(AccessWidth32, PciAddress, &PciData, &StdHeader); Status = AGESA_SUCCESS; - return (UINT32)Status; + return Status; } -UINT32 -agesawrapper_amdinitmmio ( +AGESA_STATUS agesawrapper_amdinitmmio ( VOID ) { @@ -142,11 +140,10 @@ agesawrapper_amdinitmmio ( LibAmdPciWrite(AccessWidth32, PciAddress, &PciData, &StdHeader); Status = AGESA_SUCCESS; - return (UINT32)Status; + return Status; } -UINT32 -agesawrapper_amdinitreset ( +AGESA_STATUS agesawrapper_amdinitreset ( VOID ) { @@ -171,11 +168,10 @@ agesawrapper_amdinitreset ( status = AmdInitReset ((AMD_RESET_PARAMS *)AmdParamStruct.NewStructPtr); if (status != AGESA_SUCCESS) agesawrapper_amdreadeventlog(); AmdReleaseStruct (&AmdParamStruct); - return (UINT32)status; + return status; } -UINT32 -agesawrapper_amdinitearly ( +AGESA_STATUS agesawrapper_amdinitearly ( VOID ) { @@ -200,11 +196,10 @@ agesawrapper_amdinitearly ( if (status != AGESA_SUCCESS) agesawrapper_amdreadeventlog(); AmdReleaseStruct (&AmdParamStruct); - return (UINT32)status; + return status; } -UINT32 -agesawrapper_amdinitpost ( +AGESA_STATUS agesawrapper_amdinitpost ( VOID ) { @@ -228,11 +223,10 @@ agesawrapper_amdinitpost ( /* Initialize heap space */ EmptyHeap(); - return (UINT32)status; + return status; } -UINT32 -agesawrapper_amdinitenv ( +AGESA_STATUS agesawrapper_amdinitenv ( VOID ) { @@ -326,7 +320,7 @@ agesawrapper_amdinitenv ( LibAmdPciWrite (AccessWidth32, PciAddress, &PciValue, &AmdParamStruct.StdHeader); AmdReleaseStruct (&AmdParamStruct); - return (UINT32)status; + return status; } VOID * @@ -354,8 +348,7 @@ agesawrapper_getlateinitptr ( } } -UINT32 -agesawrapper_amdinitmid ( +AGESA_STATUS agesawrapper_amdinitmid ( VOID ) { @@ -380,11 +373,10 @@ agesawrapper_amdinitmid ( if (status != AGESA_SUCCESS) agesawrapper_amdreadeventlog(); AmdReleaseStruct (&AmdParamStruct); - return (UINT32)status; + return status; } -UINT32 -agesawrapper_amdinitlate ( +AGESA_STATUS agesawrapper_amdinitlate ( VOID ) { @@ -430,11 +422,10 @@ agesawrapper_amdinitlate ( * AmdReleaseStruct (&AmdLateParams); */ - return (UINT32)Status; + return Status; } -UINT32 -agesawrapper_amdinitresume ( +AGESA_STATUS agesawrapper_amdinitresume ( VOID ) { @@ -468,11 +459,10 @@ agesawrapper_amdinitresume ( if (status != AGESA_SUCCESS) agesawrapper_amdreadeventlog(); AmdReleaseStruct (&AmdParamStruct); - return (UINT32)status; + return status; } -UINT32 -agesawrapper_amds3laterestore ( +AGESA_STATUS agesawrapper_amds3laterestore ( VOID ) { @@ -507,12 +497,11 @@ agesawrapper_amds3laterestore ( ASSERT(Status == AGESA_SUCCESS); } - return (UINT32)Status; + return Status; } #ifndef __PRE_RAM__ -UINT32 -agesawrapper_amdS3Save ( +AGESA_STATUS agesawrapper_amdS3Save ( VOID ) { @@ -561,12 +550,11 @@ agesawrapper_amdS3Save ( OemAgesaSaveMtrr(); AmdReleaseStruct (&AmdInterfaceParams); - return (UINT32)Status; + return Status; } #endif /* #ifndef __PRE_RAM__ */ -UINT32 -agesawrapper_amdlaterunaptask ( +AGESA_STATUS agesawrapper_amdlaterunaptask ( UINT32 Func, UINT32 Data, VOID *ConfigPtr @@ -590,11 +578,10 @@ agesawrapper_amdlaterunaptask ( ASSERT(Status == AGESA_SUCCESS); } - return (UINT32)Status; + return Status; } -UINT32 -agesawrapper_amdreadeventlog ( +AGESA_STATUS agesawrapper_amdreadeventlog ( VOID ) { @@ -615,5 +602,5 @@ agesawrapper_amdreadeventlog ( Status = AmdReadEventLog (&AmdEventParams); } - return (UINT32)Status; + return Status; } diff --git a/src/mainboard/amd/persimmon/agesawrapper.h b/src/mainboard/amd/persimmon/agesawrapper.h index c16dab2..965b5d2 100644 --- a/src/mainboard/amd/persimmon/agesawrapper.h +++ b/src/mainboard/amd/persimmon/agesawrapper.h @@ -39,21 +39,21 @@ enum { PICK_ALIB, /* SACPI SSDT table with ALIB implementation */ }; -UINT32 agesawrapper_amdinitreset (void); -UINT32 agesawrapper_amdinitearly (void); -UINT32 agesawrapper_amdinitenv (void); -UINT32 agesawrapper_amdinitlate (void); -UINT32 agesawrapper_amdinitpost (void); -UINT32 agesawrapper_amdinitmid (void); - -UINT32 agesawrapper_amdreadeventlog (void); - -UINT32 agesawrapper_amdinitcpuio (void); -UINT32 agesawrapper_amdinitmmio (void); -UINT32 agesawrapper_amdinitresume (void); -UINT32 agesawrapper_amdS3Save (void); -UINT32 agesawrapper_amds3laterestore (void); -UINT32 agesawrapper_amdlaterunaptask (UINT32 Func, UINT32 Data, VOID *ConfigPtr); +AGESA_STATUS agesawrapper_amdinitreset (void); +AGESA_STATUS agesawrapper_amdinitearly (void); +AGESA_STATUS agesawrapper_amdinitenv (void); +AGESA_STATUS agesawrapper_amdinitlate (void); +AGESA_STATUS agesawrapper_amdinitpost (void); +AGESA_STATUS agesawrapper_amdinitmid (void); + +AGESA_STATUS agesawrapper_amdreadeventlog (void); + +AGESA_STATUS agesawrapper_amdinitcpuio (void); +AGESA_STATUS agesawrapper_amdinitmmio (void); +AGESA_STATUS agesawrapper_amdinitresume (void); +AGESA_STATUS agesawrapper_amdS3Save (void); +AGESA_STATUS agesawrapper_amds3laterestore (void); +AGESA_STATUS agesawrapper_amdlaterunaptask (UINT32 Func, UINT32 Data, VOID *ConfigPtr); void *agesawrapper_getlateinitptr (int pick); #endif /* _AGESAWRAPPER_H_ */ diff --git a/src/mainboard/amd/south_station/agesawrapper.c b/src/mainboard/amd/south_station/agesawrapper.c index 7c8aab8..98dd09d 100644 --- a/src/mainboard/amd/south_station/agesawrapper.c +++ b/src/mainboard/amd/south_station/agesawrapper.c @@ -47,8 +47,7 @@ VOID *AcpiWheaMce = NULL; VOID *AcpiWheaCmc = NULL; VOID *AcpiAlib = NULL; -UINT32 -agesawrapper_amdinitcpuio ( +AGESA_STATUS agesawrapper_amdinitcpuio ( VOID ) { @@ -93,11 +92,10 @@ agesawrapper_amdinitcpuio ( PciData = 0x00000003; LibAmdPciWrite(AccessWidth32, PciAddress, &PciData, &StdHeader); Status = AGESA_SUCCESS; - return (UINT32)Status; + return Status; } -UINT32 -agesawrapper_amdinitmmio ( +AGESA_STATUS agesawrapper_amdinitmmio ( VOID ) { @@ -143,11 +141,10 @@ agesawrapper_amdinitmmio ( LibAmdPciWrite(AccessWidth32, PciAddress, &PciData, &StdHeader); Status = AGESA_SUCCESS; - return (UINT32)Status; + return Status; } -UINT32 -agesawrapper_amdinitreset ( +AGESA_STATUS agesawrapper_amdinitreset ( VOID ) { @@ -172,11 +169,10 @@ agesawrapper_amdinitreset ( status = AmdInitReset ((AMD_RESET_PARAMS *)AmdParamStruct.NewStructPtr); if (status != AGESA_SUCCESS) agesawrapper_amdreadeventlog(); AmdReleaseStruct (&AmdParamStruct); - return (UINT32)status; + return status; } -UINT32 -agesawrapper_amdinitearly ( +AGESA_STATUS agesawrapper_amdinitearly ( VOID ) { @@ -201,11 +197,10 @@ agesawrapper_amdinitearly ( if (status != AGESA_SUCCESS) agesawrapper_amdreadeventlog(); AmdReleaseStruct (&AmdParamStruct); - return (UINT32)status; + return status; } -UINT32 -agesawrapper_amdinitpost ( +AGESA_STATUS agesawrapper_amdinitpost ( VOID ) { @@ -229,11 +224,10 @@ agesawrapper_amdinitpost ( /* Initialize heap space */ EmptyHeap(); - return (UINT32)status; + return status; } -UINT32 -agesawrapper_amdinitenv ( +AGESA_STATUS agesawrapper_amdinitenv ( VOID ) { @@ -327,7 +321,7 @@ agesawrapper_amdinitenv ( LibAmdPciWrite (AccessWidth32, PciAddress, &PciValue, &AmdParamStruct.StdHeader); AmdReleaseStruct (&AmdParamStruct); - return (UINT32)status; + return status; } VOID * @@ -355,8 +349,7 @@ agesawrapper_getlateinitptr ( } } -UINT32 -agesawrapper_amdinitmid ( +AGESA_STATUS agesawrapper_amdinitmid ( VOID ) { @@ -381,11 +374,10 @@ agesawrapper_amdinitmid ( if (status != AGESA_SUCCESS) agesawrapper_amdreadeventlog(); AmdReleaseStruct (&AmdParamStruct); - return (UINT32)status; + return status; } -UINT32 -agesawrapper_amdinitlate ( +AGESA_STATUS agesawrapper_amdinitlate ( VOID ) { @@ -426,11 +418,10 @@ agesawrapper_amdinitlate ( * AmdReleaseStruct (&AmdLateParams); */ - return (UINT32)Status; + return Status; } -UINT32 -agesawrapper_amdlaterunaptask ( +AGESA_STATUS agesawrapper_amdlaterunaptask ( UINT32 Func, UINT32 Data, VOID *ConfigPtr @@ -454,11 +445,10 @@ agesawrapper_amdlaterunaptask ( ASSERT(Status == AGESA_SUCCESS); } - return (UINT32)Status; + return Status; } -UINT32 -agesawrapper_amdreadeventlog ( +AGESA_STATUS agesawrapper_amdreadeventlog ( VOID ) { @@ -479,5 +469,5 @@ agesawrapper_amdreadeventlog ( Status = AmdReadEventLog (&AmdEventParams); } - return (UINT32)Status; + return Status; } diff --git a/src/mainboard/amd/south_station/agesawrapper.h b/src/mainboard/amd/south_station/agesawrapper.h index 47332c5..ec731ad 100644 --- a/src/mainboard/amd/south_station/agesawrapper.h +++ b/src/mainboard/amd/south_station/agesawrapper.h @@ -39,19 +39,19 @@ enum { PICK_ALIB, /* SACPI SSDT table with ALIB implementation */ }; -UINT32 agesawrapper_amdinitreset (void); -UINT32 agesawrapper_amdinitearly (void); -UINT32 agesawrapper_amdinitenv (void); -UINT32 agesawrapper_amdinitlate (void); -UINT32 agesawrapper_amdinitpost (void); -UINT32 agesawrapper_amdinitmid (void); - -UINT32 agesawrapper_amdreadeventlog (void); - -UINT32 agesawrapper_amdinitcpuio (void); -UINT32 agesawrapper_amdinitmmio (void); -UINT32 agesawrapper_amdlaterunaptask (UINT32 Func, UINT32 Data, VOID *ConfigPtr); +AGESA_STATUS agesawrapper_amdinitreset (void); +AGESA_STATUS agesawrapper_amdinitearly (void); +AGESA_STATUS agesawrapper_amdinitenv (void); +AGESA_STATUS agesawrapper_amdinitlate (void); +AGESA_STATUS agesawrapper_amdinitpost (void); +AGESA_STATUS agesawrapper_amdinitmid (void); + +AGESA_STATUS agesawrapper_amdreadeventlog (void); + +AGESA_STATUS agesawrapper_amdinitcpuio (void); +AGESA_STATUS agesawrapper_amdinitmmio (void); +AGESA_STATUS agesawrapper_amdlaterunaptask (UINT32 Func, UINT32 Data, VOID *ConfigPtr); void *agesawrapper_getlateinitptr (int pick); -static inline UINT32 agesawrapper_amdS3Save(void) { return 0; } +static inline AGESA_STATUS agesawrapper_amdS3Save(void) { return 0; } #endif /* _AGESAWRAPPER_H_ */ diff --git a/src/mainboard/amd/thatcher/agesawrapper.c b/src/mainboard/amd/thatcher/agesawrapper.c index 7ab9e44..74a2321 100644 --- a/src/mainboard/amd/thatcher/agesawrapper.c +++ b/src/mainboard/amd/thatcher/agesawrapper.c @@ -56,8 +56,7 @@ VOID *AcpiWheaCmc = NULL; VOID *AcpiAlib = NULL; VOID *AcpiIvrs = NULL; -UINT32 -agesawrapper_amdinitcpuio ( +AGESA_STATUS agesawrapper_amdinitcpuio ( VOID ) { @@ -102,11 +101,10 @@ agesawrapper_amdinitcpuio ( PciData = 0x00000003; LibAmdPciWrite(AccessWidth32, PciAddress, &PciData, &StdHeader); Status = AGESA_SUCCESS; - return (UINT32)Status; + return Status; } -UINT32 -agesawrapper_amdinitmmio ( +AGESA_STATUS agesawrapper_amdinitmmio ( VOID ) { @@ -142,11 +140,10 @@ agesawrapper_amdinitmmio ( LibAmdMsrWrite (0x20D, &MsrReg, &StdHeader); Status = AGESA_SUCCESS; - return (UINT32)Status; + return Status; } -UINT32 -agesawrapper_amdinitreset ( +AGESA_STATUS agesawrapper_amdinitreset ( VOID ) { @@ -180,11 +177,10 @@ agesawrapper_amdinitreset ( status = AmdInitReset ((AMD_RESET_PARAMS *)AmdParamStruct.NewStructPtr); if (status != AGESA_SUCCESS) agesawrapper_amdreadeventlog(AmdParamStruct.StdHeader.HeapStatus); AmdReleaseStruct (&AmdParamStruct); - return (UINT32)status; + return status; } -UINT32 -agesawrapper_amdinitearly ( +AGESA_STATUS agesawrapper_amdinitearly ( VOID ) { @@ -212,11 +208,10 @@ agesawrapper_amdinitearly ( if (status != AGESA_SUCCESS) agesawrapper_amdreadeventlog(AmdParamStruct.StdHeader.HeapStatus); AmdReleaseStruct (&AmdParamStruct); - return (UINT32)status; + return status; } -UINT32 -agesawrapper_amdinitpost ( +AGESA_STATUS agesawrapper_amdinitpost ( VOID ) { @@ -244,11 +239,10 @@ agesawrapper_amdinitpost ( /* Initialize heap space */ EmptyHeap(); - return (UINT32)status; + return status; } -UINT32 -agesawrapper_amdinitenv ( +AGESA_STATUS agesawrapper_amdinitenv ( VOID ) { @@ -277,7 +271,7 @@ agesawrapper_amdinitenv ( Modify D1F0x18 */ - return (UINT32)status; + return status; } VOID * @@ -307,8 +301,7 @@ agesawrapper_getlateinitptr ( } } -UINT32 -agesawrapper_amdinitmid ( +AGESA_STATUS agesawrapper_amdinitmid ( VOID ) { @@ -337,11 +330,10 @@ agesawrapper_amdinitmid ( if (status != AGESA_SUCCESS) agesawrapper_amdreadeventlog(AmdParamStruct.StdHeader.HeapStatus); AmdReleaseStruct (&AmdParamStruct); - return (UINT32)status; + return status; } -UINT32 -agesawrapper_amdinitlate ( +AGESA_STATUS agesawrapper_amdinitlate ( VOID ) { @@ -389,11 +381,10 @@ agesawrapper_amdinitlate ( (unsigned int)AcpiAlib, (unsigned int)AcpiIvrs, __func__); /* AmdReleaseStruct (&AmdParamStruct); */ - return (UINT32)Status; + return Status; } -UINT32 -agesawrapper_amdlaterunaptask ( +AGESA_STATUS agesawrapper_amdlaterunaptask ( UINT32 Func, UINT32 Data, VOID *ConfigPtr @@ -420,11 +411,11 @@ agesawrapper_amdlaterunaptask ( ASSERT(Status == AGESA_SUCCESS); } - return (UINT32)Status; + return Status; } -UINT32 agesawrapper_amdinitresume(VOID) +AGESA_STATUS agesawrapper_amdinitresume(VOID) { AGESA_STATUS status; AMD_INTERFACE_PARAMS AmdParamStruct; @@ -460,11 +451,11 @@ UINT32 agesawrapper_amdinitresume(VOID) if (status != AGESA_SUCCESS) agesawrapper_amdreadeventlog(AmdParamStruct.StdHeader.HeapStatus); AmdReleaseStruct (&AmdParamStruct); - return (UINT32)status; + return status; } #ifndef __PRE_RAM__ -UINT32 agesawrapper_fchs3earlyrestore (VOID) +AGESA_STATUS agesawrapper_fchs3earlyrestore (VOID) { AGESA_STATUS status = AGESA_SUCCESS; @@ -487,7 +478,7 @@ UINT32 agesawrapper_fchs3earlyrestore (VOID) } #endif -UINT32 agesawrapper_amds3laterestore (VOID) +AGESA_STATUS agesawrapper_amds3laterestore (VOID) { AGESA_STATUS Status; AMD_INTERFACE_PARAMS AmdInterfaceParams; @@ -525,14 +516,14 @@ UINT32 agesawrapper_amds3laterestore (VOID) ASSERT(Status == AGESA_SUCCESS); } - return (UINT32)Status; + return Status; } #ifndef __PRE_RAM__ extern UINT8 picr_data[0x54], intr_data[0x54]; -UINT32 agesawrapper_fchs3laterestore (VOID) +AGESA_STATUS agesawrapper_fchs3laterestore (VOID) { AGESA_STATUS status = AGESA_SUCCESS; @@ -568,7 +559,7 @@ UINT32 agesawrapper_fchs3laterestore (VOID) #ifndef __PRE_RAM__ -UINT32 agesawrapper_amdS3Save(VOID) +AGESA_STATUS agesawrapper_amdS3Save(VOID) { AGESA_STATUS Status; AMD_S3SAVE_PARAMS *AmdS3SaveParamsPtr; @@ -627,13 +618,12 @@ UINT32 agesawrapper_amdS3Save(VOID) AmdReleaseStruct (&AmdInterfaceParams); - return (UINT32)Status; + return Status; } #endif /* #ifndef __PRE_RAM__ */ -UINT32 -agesawrapper_amdreadeventlog ( +AGESA_STATUS agesawrapper_amdreadeventlog ( UINT8 HeapStatus ) { @@ -658,5 +648,5 @@ agesawrapper_amdreadeventlog ( Status = AmdReadEventLog (&AmdEventParams); } - return (UINT32)Status; + return Status; } diff --git a/src/mainboard/amd/thatcher/agesawrapper.h b/src/mainboard/amd/thatcher/agesawrapper.h index cccb5c9..f826d80 100644 --- a/src/mainboard/amd/thatcher/agesawrapper.h +++ b/src/mainboard/amd/thatcher/agesawrapper.h @@ -40,22 +40,22 @@ enum { PICK_IVRS, /* IOMMU ACPI IVRS(I/O Virtualization Reporting Structure) table */ }; -UINT32 agesawrapper_amdinitreset (void); -UINT32 agesawrapper_amdinitearly (void); -UINT32 agesawrapper_amdinitenv (void); -UINT32 agesawrapper_amdinitlate (void); -UINT32 agesawrapper_amdinitpost (void); -UINT32 agesawrapper_amdinitmid (void); -UINT32 agesawrapper_amdreadeventlog (UINT8 HeapStatus); -UINT32 agesawrapper_amdinitmmio (void); -UINT32 agesawrapper_amdinitcpuio (void); +AGESA_STATUS agesawrapper_amdinitreset (void); +AGESA_STATUS agesawrapper_amdinitearly (void); +AGESA_STATUS agesawrapper_amdinitenv (void); +AGESA_STATUS agesawrapper_amdinitlate (void); +AGESA_STATUS agesawrapper_amdinitpost (void); +AGESA_STATUS agesawrapper_amdinitmid (void); +AGESA_STATUS agesawrapper_amdreadeventlog (UINT8 HeapStatus); +AGESA_STATUS agesawrapper_amdinitmmio (void); +AGESA_STATUS agesawrapper_amdinitcpuio (void); void *agesawrapper_getlateinitptr (int pick); -UINT32 agesawrapper_amdlaterunaptask (UINT32 Func, UINT32 Data, void *ConfigPtr); -UINT32 agesawrapper_amdS3Save(VOID); -UINT32 agesawrapper_amdinitresume(VOID); -UINT32 agesawrapper_amds3laterestore (VOID); +AGESA_STATUS agesawrapper_amdlaterunaptask (UINT32 Func, UINT32 Data, void *ConfigPtr); +AGESA_STATUS agesawrapper_amdS3Save(VOID); +AGESA_STATUS agesawrapper_amdinitresume (VOID); +AGESA_STATUS agesawrapper_amds3laterestore (VOID); -UINT32 agesawrapper_fchs3earlyrestore (VOID); -UINT32 agesawrapper_fchs3laterestore (VOID); +AGESA_STATUS agesawrapper_fchs3earlyrestore (VOID); +AGESA_STATUS agesawrapper_fchs3laterestore (VOID); #endif /* _AGESAWRAPPER_H_ */ diff --git a/src/mainboard/amd/torpedo/agesawrapper.c b/src/mainboard/amd/torpedo/agesawrapper.c index 556c2a8..4088386 100644 --- a/src/mainboard/amd/torpedo/agesawrapper.c +++ b/src/mainboard/amd/torpedo/agesawrapper.c @@ -149,8 +149,7 @@ ClearAllSmiEnableInPmio ( Mmio32 (SmiMmioAddr, 0xC4) = 0x0; } -UINT32 -agesawrapper_amdinitcpuio ( +AGESA_STATUS agesawrapper_amdinitcpuio ( VOID ) { @@ -195,11 +194,10 @@ agesawrapper_amdinitcpuio ( PciData = 0x00000013; LibAmdPciWrite(AccessWidth32, PciAddress, &PciData, &StdHeader); Status = AGESA_SUCCESS; - return (UINT32)Status; + return Status; } -UINT32 -agesawrapper_amdinitmmio ( +AGESA_STATUS agesawrapper_amdinitmmio ( VOID ) { @@ -259,11 +257,10 @@ agesawrapper_amdinitmmio ( //- ClearAllSmiEnableInPmio (); Status = AGESA_SUCCESS; - return (UINT32)Status; + return Status; } -UINT32 -agesawrapper_amdinitreset ( +AGESA_STATUS agesawrapper_amdinitreset ( VOID ) { @@ -296,11 +293,10 @@ agesawrapper_amdinitreset ( status = AmdInitReset ((AMD_RESET_PARAMS *)AmdParamStruct.NewStructPtr); if (status != AGESA_SUCCESS) agesawrapper_amdreadeventlog(); AmdReleaseStruct (&AmdParamStruct); - return (UINT32)status; + return status; } -UINT32 -agesawrapper_amdinitearly ( +AGESA_STATUS agesawrapper_amdinitearly ( VOID ) { @@ -328,11 +324,10 @@ agesawrapper_amdinitearly ( if (status != AGESA_SUCCESS) agesawrapper_amdreadeventlog(); AmdReleaseStruct (&AmdParamStruct); - return (UINT32)status; + return status; } -UINT32 -agesawrapper_amdinitpost ( +AGESA_STATUS agesawrapper_amdinitpost ( VOID ) { @@ -359,11 +354,10 @@ agesawrapper_amdinitpost ( /* Initialize heap space */ EmptyHeap(); - return (UINT32)status; + return status; } -UINT32 -agesawrapper_amdinitenv ( +AGESA_STATUS agesawrapper_amdinitenv ( VOID ) { @@ -386,7 +380,7 @@ agesawrapper_amdinitenv ( if (status != AGESA_SUCCESS) agesawrapper_amdreadeventlog(); AmdReleaseStruct (&AmdParamStruct); - return (UINT32)status; + return status; } VOID * @@ -417,8 +411,7 @@ agesawrapper_getlateinitptr ( } } -UINT32 -agesawrapper_amdinitmid ( +AGESA_STATUS agesawrapper_amdinitmid ( VOID ) { @@ -446,11 +439,10 @@ agesawrapper_amdinitmid ( if (status != AGESA_SUCCESS) agesawrapper_amdreadeventlog(); AmdReleaseStruct (&AmdParamStruct); - return (UINT32)status; + return status; } -UINT32 -agesawrapper_amdinitlate ( +AGESA_STATUS agesawrapper_amdinitlate ( VOID ) { @@ -482,10 +474,10 @@ agesawrapper_amdinitlate ( AcpiWheaCmc = AmdLateParams.AcpiWheaCmc; AcpiAlib = AmdLateParams.AcpiAlib; - return (UINT32)Status; + return Status; } -UINT32 agesawrapper_amdlaterunaptask (UINT32 Func, UINT32 Data, VOID *ConfigPtr) +AGESA_STATUS agesawrapper_amdlaterunaptask (UINT32 Func, UINT32 Data, VOID *ConfigPtr) { AGESA_STATUS Status; AP_EXE_PARAMS ApExeParams; @@ -506,11 +498,10 @@ UINT32 agesawrapper_amdlaterunaptask (UINT32 Func, UINT32 Data, VOID *ConfigPtr) ASSERT(Status == AGESA_SUCCESS); } - return (UINT32)Status; + return Status; } -UINT32 -agesawrapper_amdreadeventlog ( +AGESA_STATUS agesawrapper_amdreadeventlog ( VOID ) { @@ -534,5 +525,5 @@ agesawrapper_amdreadeventlog ( Status = AmdReadEventLog (&AmdEventParams); } - return (UINT32)Status; + return Status; } diff --git a/src/mainboard/amd/torpedo/agesawrapper.h b/src/mainboard/amd/torpedo/agesawrapper.h index 5947b6b..69f986c 100644 --- a/src/mainboard/amd/torpedo/agesawrapper.h +++ b/src/mainboard/amd/torpedo/agesawrapper.h @@ -82,18 +82,18 @@ enum { }; -UINT32 agesawrapper_amdinitreset (void); -UINT32 agesawrapper_amdinitearly (void); -UINT32 agesawrapper_amdinitenv (void); -UINT32 agesawrapper_amdinitlate (void); -UINT32 agesawrapper_amdinitpost (void); -UINT32 agesawrapper_amdinitmid (void); +AGESA_STATUS agesawrapper_amdinitreset (void); +AGESA_STATUS agesawrapper_amdinitearly (void); +AGESA_STATUS agesawrapper_amdinitenv (void); +AGESA_STATUS agesawrapper_amdinitlate (void); +AGESA_STATUS agesawrapper_amdinitpost (void); +AGESA_STATUS agesawrapper_amdinitmid (void); -UINT32 agesawrapper_amdreadeventlog (void); -UINT32 agesawrapper_amdinitcpuio (void); -UINT32 agesawrapper_amdinitmmio (void); -UINT32 agesawrapper_amdlaterunaptask (UINT32 Func, UINT32 Data, VOID *ConfigPtr); +AGESA_STATUS agesawrapper_amdreadeventlog (void); +AGESA_STATUS agesawrapper_amdinitcpuio (void); +AGESA_STATUS agesawrapper_amdinitmmio (void); +AGESA_STATUS agesawrapper_amdlaterunaptask (UINT32 Func, UINT32 Data, VOID *ConfigPtr); void *agesawrapper_getlateinitptr (int pick); -static inline UINT32 agesawrapper_amdS3Save(void) { return 0; } +static inline AGESA_STATUS agesawrapper_amdS3Save(void) { return 0; } #endif diff --git a/src/mainboard/amd/union_station/agesawrapper.c b/src/mainboard/amd/union_station/agesawrapper.c index 7c8aab8..98dd09d 100644 --- a/src/mainboard/amd/union_station/agesawrapper.c +++ b/src/mainboard/amd/union_station/agesawrapper.c @@ -47,8 +47,7 @@ VOID *AcpiWheaMce = NULL; VOID *AcpiWheaCmc = NULL; VOID *AcpiAlib = NULL; -UINT32 -agesawrapper_amdinitcpuio ( +AGESA_STATUS agesawrapper_amdinitcpuio ( VOID ) { @@ -93,11 +92,10 @@ agesawrapper_amdinitcpuio ( PciData = 0x00000003; LibAmdPciWrite(AccessWidth32, PciAddress, &PciData, &StdHeader); Status = AGESA_SUCCESS; - return (UINT32)Status; + return Status; } -UINT32 -agesawrapper_amdinitmmio ( +AGESA_STATUS agesawrapper_amdinitmmio ( VOID ) { @@ -143,11 +141,10 @@ agesawrapper_amdinitmmio ( LibAmdPciWrite(AccessWidth32, PciAddress, &PciData, &StdHeader); Status = AGESA_SUCCESS; - return (UINT32)Status; + return Status; } -UINT32 -agesawrapper_amdinitreset ( +AGESA_STATUS agesawrapper_amdinitreset ( VOID ) { @@ -172,11 +169,10 @@ agesawrapper_amdinitreset ( status = AmdInitReset ((AMD_RESET_PARAMS *)AmdParamStruct.NewStructPtr); if (status != AGESA_SUCCESS) agesawrapper_amdreadeventlog(); AmdReleaseStruct (&AmdParamStruct); - return (UINT32)status; + return status; } -UINT32 -agesawrapper_amdinitearly ( +AGESA_STATUS agesawrapper_amdinitearly ( VOID ) { @@ -201,11 +197,10 @@ agesawrapper_amdinitearly ( if (status != AGESA_SUCCESS) agesawrapper_amdreadeventlog(); AmdReleaseStruct (&AmdParamStruct); - return (UINT32)status; + return status; } -UINT32 -agesawrapper_amdinitpost ( +AGESA_STATUS agesawrapper_amdinitpost ( VOID ) { @@ -229,11 +224,10 @@ agesawrapper_amdinitpost ( /* Initialize heap space */ EmptyHeap(); - return (UINT32)status; + return status; } -UINT32 -agesawrapper_amdinitenv ( +AGESA_STATUS agesawrapper_amdinitenv ( VOID ) { @@ -327,7 +321,7 @@ agesawrapper_amdinitenv ( LibAmdPciWrite (AccessWidth32, PciAddress, &PciValue, &AmdParamStruct.StdHeader); AmdReleaseStruct (&AmdParamStruct); - return (UINT32)status; + return status; } VOID * @@ -355,8 +349,7 @@ agesawrapper_getlateinitptr ( } } -UINT32 -agesawrapper_amdinitmid ( +AGESA_STATUS agesawrapper_amdinitmid ( VOID ) { @@ -381,11 +374,10 @@ agesawrapper_amdinitmid ( if (status != AGESA_SUCCESS) agesawrapper_amdreadeventlog(); AmdReleaseStruct (&AmdParamStruct); - return (UINT32)status; + return status; } -UINT32 -agesawrapper_amdinitlate ( +AGESA_STATUS agesawrapper_amdinitlate ( VOID ) { @@ -426,11 +418,10 @@ agesawrapper_amdinitlate ( * AmdReleaseStruct (&AmdLateParams); */ - return (UINT32)Status; + return Status; } -UINT32 -agesawrapper_amdlaterunaptask ( +AGESA_STATUS agesawrapper_amdlaterunaptask ( UINT32 Func, UINT32 Data, VOID *ConfigPtr @@ -454,11 +445,10 @@ agesawrapper_amdlaterunaptask ( ASSERT(Status == AGESA_SUCCESS); } - return (UINT32)Status; + return Status; } -UINT32 -agesawrapper_amdreadeventlog ( +AGESA_STATUS agesawrapper_amdreadeventlog ( VOID ) { @@ -479,5 +469,5 @@ agesawrapper_amdreadeventlog ( Status = AmdReadEventLog (&AmdEventParams); } - return (UINT32)Status; + return Status; } diff --git a/src/mainboard/amd/union_station/agesawrapper.h b/src/mainboard/amd/union_station/agesawrapper.h index 47332c5..ec731ad 100644 --- a/src/mainboard/amd/union_station/agesawrapper.h +++ b/src/mainboard/amd/union_station/agesawrapper.h @@ -39,19 +39,19 @@ enum { PICK_ALIB, /* SACPI SSDT table with ALIB implementation */ }; -UINT32 agesawrapper_amdinitreset (void); -UINT32 agesawrapper_amdinitearly (void); -UINT32 agesawrapper_amdinitenv (void); -UINT32 agesawrapper_amdinitlate (void); -UINT32 agesawrapper_amdinitpost (void); -UINT32 agesawrapper_amdinitmid (void); - -UINT32 agesawrapper_amdreadeventlog (void); - -UINT32 agesawrapper_amdinitcpuio (void); -UINT32 agesawrapper_amdinitmmio (void); -UINT32 agesawrapper_amdlaterunaptask (UINT32 Func, UINT32 Data, VOID *ConfigPtr); +AGESA_STATUS agesawrapper_amdinitreset (void); +AGESA_STATUS agesawrapper_amdinitearly (void); +AGESA_STATUS agesawrapper_amdinitenv (void); +AGESA_STATUS agesawrapper_amdinitlate (void); +AGESA_STATUS agesawrapper_amdinitpost (void); +AGESA_STATUS agesawrapper_amdinitmid (void); + +AGESA_STATUS agesawrapper_amdreadeventlog (void); + +AGESA_STATUS agesawrapper_amdinitcpuio (void); +AGESA_STATUS agesawrapper_amdinitmmio (void); +AGESA_STATUS agesawrapper_amdlaterunaptask (UINT32 Func, UINT32 Data, VOID *ConfigPtr); void *agesawrapper_getlateinitptr (int pick); -static inline UINT32 agesawrapper_amdS3Save(void) { return 0; } +static inline AGESA_STATUS agesawrapper_amdS3Save(void) { return 0; } #endif /* _AGESAWRAPPER_H_ */ diff --git a/src/mainboard/asrock/e350m1/agesawrapper.c b/src/mainboard/asrock/e350m1/agesawrapper.c index 6e47880..0e1ce0a 100644 --- a/src/mainboard/asrock/e350m1/agesawrapper.c +++ b/src/mainboard/asrock/e350m1/agesawrapper.c @@ -76,8 +76,7 @@ VOID *AcpiAlib = NULL; * L O C A L F U N C T I O N S *------------------------------------------------------------------------------ */ -UINT32 -agesawrapper_amdinitcpuio ( +AGESA_STATUS agesawrapper_amdinitcpuio ( VOID ) { @@ -122,11 +121,10 @@ agesawrapper_amdinitcpuio ( PciData = 0x00000003; LibAmdPciWrite(AccessWidth32, PciAddress, &PciData, &StdHeader); Status = AGESA_SUCCESS; - return (UINT32)Status; + return Status; } -UINT32 -agesawrapper_amdinitmmio ( +AGESA_STATUS agesawrapper_amdinitmmio ( VOID ) { @@ -172,11 +170,10 @@ agesawrapper_amdinitmmio ( LibAmdPciWrite(AccessWidth32, PciAddress, &PciData, &StdHeader); Status = AGESA_SUCCESS; - return (UINT32)Status; + return Status; } -UINT32 -agesawrapper_amdinitreset ( +AGESA_STATUS agesawrapper_amdinitreset ( VOID ) { @@ -201,11 +198,10 @@ agesawrapper_amdinitreset ( status = AmdInitReset ((AMD_RESET_PARAMS *)AmdParamStruct.NewStructPtr); if (status != AGESA_SUCCESS) agesawrapper_amdreadeventlog(); AmdReleaseStruct (&AmdParamStruct); - return (UINT32)status; + return status; } -UINT32 -agesawrapper_amdinitearly ( +AGESA_STATUS agesawrapper_amdinitearly ( VOID ) { @@ -230,11 +226,10 @@ agesawrapper_amdinitearly ( if (status != AGESA_SUCCESS) agesawrapper_amdreadeventlog(); AmdReleaseStruct (&AmdParamStruct); - return (UINT32)status; + return status; } -UINT32 -agesawrapper_amdinitpost ( +AGESA_STATUS agesawrapper_amdinitpost ( VOID ) { @@ -258,11 +253,10 @@ agesawrapper_amdinitpost ( /* Initialize heap space */ EmptyHeap(); - return (UINT32)status; + return status; } -UINT32 -agesawrapper_amdinitenv ( +AGESA_STATUS agesawrapper_amdinitenv ( VOID ) { @@ -356,7 +350,7 @@ agesawrapper_amdinitenv ( LibAmdPciWrite (AccessWidth32, PciAddress, &PciValue, &AmdParamStruct.StdHeader); AmdReleaseStruct (&AmdParamStruct); - return (UINT32)status; + return status; } VOID * @@ -384,8 +378,7 @@ agesawrapper_getlateinitptr ( } } -UINT32 -agesawrapper_amdinitmid ( +AGESA_STATUS agesawrapper_amdinitmid ( VOID ) { @@ -410,11 +403,10 @@ agesawrapper_amdinitmid ( if (status != AGESA_SUCCESS) agesawrapper_amdreadeventlog(); AmdReleaseStruct (&AmdParamStruct); - return (UINT32)status; + return status; } -UINT32 -agesawrapper_amdinitlate ( +AGESA_STATUS agesawrapper_amdinitlate ( VOID ) { @@ -455,11 +447,10 @@ agesawrapper_amdinitlate ( * AmdReleaseStruct (&AmdLateParams); */ - return (UINT32)Status; + return Status; } -UINT32 -agesawrapper_amdlaterunaptask ( +AGESA_STATUS agesawrapper_amdlaterunaptask ( UINT32 Func, UINT32 Data, VOID *ConfigPtr @@ -483,11 +474,10 @@ agesawrapper_amdlaterunaptask ( ASSERT(Status == AGESA_SUCCESS); } - return (UINT32)Status; + return Status; } -UINT32 -agesawrapper_amdreadeventlog ( +AGESA_STATUS agesawrapper_amdreadeventlog ( VOID ) { @@ -508,5 +498,5 @@ agesawrapper_amdreadeventlog ( Status = AmdReadEventLog (&AmdEventParams); } - return (UINT32)Status; + return Status; } diff --git a/src/mainboard/asrock/e350m1/agesawrapper.h b/src/mainboard/asrock/e350m1/agesawrapper.h index b503559..6d14b67 100644 --- a/src/mainboard/asrock/e350m1/agesawrapper.h +++ b/src/mainboard/asrock/e350m1/agesawrapper.h @@ -72,17 +72,17 @@ enum { *--------------------------------------------------------------------------------------- */ -UINT32 agesawrapper_amdinitreset (void); -UINT32 agesawrapper_amdinitearly (void); -UINT32 agesawrapper_amdinitenv (void); -UINT32 agesawrapper_amdinitlate (void); -UINT32 agesawrapper_amdinitpost (void); -UINT32 agesawrapper_amdinitmid (void); -UINT32 agesawrapper_amdreadeventlog (void); -UINT32 agesawrapper_amdinitmmio (void); -UINT32 agesawrapper_amdinitcpuio (void); -UINT32 agesawrapper_amdlaterunaptask (UINT32 Func, UINT32 Data, VOID *ConfigPtr); +AGESA_STATUS agesawrapper_amdinitreset (void); +AGESA_STATUS agesawrapper_amdinitearly (void); +AGESA_STATUS agesawrapper_amdinitenv (void); +AGESA_STATUS agesawrapper_amdinitlate (void); +AGESA_STATUS agesawrapper_amdinitpost (void); +AGESA_STATUS agesawrapper_amdinitmid (void); +AGESA_STATUS agesawrapper_amdreadeventlog (void); +AGESA_STATUS agesawrapper_amdinitmmio (void); +AGESA_STATUS agesawrapper_amdinitcpuio (void); +AGESA_STATUS agesawrapper_amdlaterunaptask (UINT32 Func, UINT32 Data, VOID *ConfigPtr); void *agesawrapper_getlateinitptr (int pick); -static inline UINT32 agesawrapper_amdS3Save(void) { return 0; } +static inline AGESA_STATUS agesawrapper_amdS3Save(void) { return 0; } #endif diff --git a/src/mainboard/asrock/imb-a180/agesawrapper.c b/src/mainboard/asrock/imb-a180/agesawrapper.c index 083de3d..fcb9827 100644 --- a/src/mainboard/asrock/imb-a180/agesawrapper.c +++ b/src/mainboard/asrock/imb-a180/agesawrapper.c @@ -85,8 +85,7 @@ VOID *AcpiIvrs = NULL; * L O C A L F U N C T I O N S *--------------------------------------------------------------------------------------- */ -UINT32 -agesawrapper_amdinitcpuio ( +AGESA_STATUS agesawrapper_amdinitcpuio ( VOID ) { @@ -131,11 +130,10 @@ agesawrapper_amdinitcpuio ( PciData = 0x00000003; LibAmdPciWrite(AccessWidth32, PciAddress, &PciData, &StdHeader); Status = AGESA_SUCCESS; - return (UINT32)Status; + return Status; } -UINT32 -agesawrapper_amdinitmmio ( +AGESA_STATUS agesawrapper_amdinitmmio ( VOID ) { @@ -171,11 +169,10 @@ agesawrapper_amdinitmmio ( LibAmdMsrWrite (0x20D, &MsrReg, &StdHeader); Status = AGESA_SUCCESS; - return (UINT32)Status; + return Status; } -UINT32 -agesawrapper_amdinitreset ( +AGESA_STATUS agesawrapper_amdinitreset ( VOID ) { @@ -211,11 +208,10 @@ agesawrapper_amdinitreset ( status = AmdInitReset ((AMD_RESET_PARAMS *)AmdParamStruct.NewStructPtr); if (status != AGESA_SUCCESS) agesawrapper_amdreadeventlog(AmdParamStruct.StdHeader.HeapStatus); AmdReleaseStruct (&AmdParamStruct); - return (UINT32)status; + return status; } -UINT32 -agesawrapper_amdinitearly ( +AGESA_STATUS agesawrapper_amdinitearly ( VOID ) { @@ -243,11 +239,10 @@ agesawrapper_amdinitearly ( if (status != AGESA_SUCCESS) agesawrapper_amdreadeventlog(AmdParamStruct.StdHeader.HeapStatus); AmdReleaseStruct (&AmdParamStruct); - return (UINT32)status; + return status; } -UINT32 -agesawrapper_amdinitpost ( +AGESA_STATUS agesawrapper_amdinitpost ( VOID ) { @@ -275,11 +270,10 @@ agesawrapper_amdinitpost ( /* Initialize heap space */ EmptyHeap(); - return (UINT32)status; + return status; } -UINT32 -agesawrapper_amdinitenv ( +AGESA_STATUS agesawrapper_amdinitenv ( VOID ) { @@ -308,7 +302,7 @@ agesawrapper_amdinitenv ( Modify D1F0x18 */ - return (UINT32)status; + return status; } VOID * @@ -338,8 +332,7 @@ agesawrapper_getlateinitptr ( } } -UINT32 -agesawrapper_amdinitmid ( +AGESA_STATUS agesawrapper_amdinitmid ( VOID ) { @@ -368,11 +361,10 @@ agesawrapper_amdinitmid ( if (status != AGESA_SUCCESS) agesawrapper_amdreadeventlog(AmdParamStruct.StdHeader.HeapStatus); AmdReleaseStruct (&AmdParamStruct); - return (UINT32)status; + return status; } -UINT32 -agesawrapper_amdinitlate ( +AGESA_STATUS agesawrapper_amdinitlate ( VOID ) { @@ -420,11 +412,10 @@ agesawrapper_amdinitlate ( (unsigned int)AcpiAlib, (unsigned int)AcpiIvrs, __func__); /* AmdReleaseStruct (&AmdParamStruct); */ - return (UINT32)Status; + return Status; } -UINT32 -agesawrapper_amdlaterunaptask ( +AGESA_STATUS agesawrapper_amdlaterunaptask ( UINT32 Func, UINT32 Data, VOID *ConfigPtr @@ -451,11 +442,11 @@ agesawrapper_amdlaterunaptask ( ASSERT(Status == AGESA_SUCCESS); } - return (UINT32)Status; + return Status; } -UINT32 agesawrapper_amdinitresume(VOID) +AGESA_STATUS agesawrapper_amdinitresume(VOID) { AGESA_STATUS status; AMD_INTERFACE_PARAMS AmdParamStruct; @@ -489,11 +480,11 @@ UINT32 agesawrapper_amdinitresume(VOID) if (status != AGESA_SUCCESS) agesawrapper_amdreadeventlog(AmdParamStruct.StdHeader.HeapStatus); AmdReleaseStruct (&AmdParamStruct); - return (UINT32)status; + return status; } #ifndef __PRE_RAM__ -UINT32 agesawrapper_fchs3earlyrestore (VOID) +AGESA_STATUS agesawrapper_fchs3earlyrestore (VOID) { AGESA_STATUS status = AGESA_SUCCESS; @@ -516,7 +507,7 @@ UINT32 agesawrapper_fchs3earlyrestore (VOID) } #endif -UINT32 agesawrapper_amds3laterestore (VOID) +AGESA_STATUS agesawrapper_amds3laterestore (VOID) { AGESA_STATUS Status; AMD_INTERFACE_PARAMS AmdInterfaceParams; @@ -552,14 +543,14 @@ UINT32 agesawrapper_amds3laterestore (VOID) ASSERT(Status == AGESA_SUCCESS); } - return (UINT32)Status; + return Status; } #ifndef __PRE_RAM__ extern UINT8 picr_data[0x54], intr_data[0x54]; -UINT32 agesawrapper_fchs3laterestore (VOID) +AGESA_STATUS agesawrapper_fchs3laterestore (VOID) { AGESA_STATUS status = AGESA_SUCCESS; @@ -595,7 +586,7 @@ UINT32 agesawrapper_fchs3laterestore (VOID) #ifndef __PRE_RAM__ -UINT32 agesawrapper_amdS3Save(VOID) +AGESA_STATUS agesawrapper_amdS3Save(VOID) { AGESA_STATUS Status; AMD_S3SAVE_PARAMS *AmdS3SaveParamsPtr; @@ -651,13 +642,12 @@ UINT32 agesawrapper_amdS3Save(VOID) AmdReleaseStruct (&AmdInterfaceParams); - return (UINT32)Status; + return Status; } #endif /* #ifndef __PRE_RAM__ */ -UINT32 -agesawrapper_amdreadeventlog ( +AGESA_STATUS agesawrapper_amdreadeventlog ( UINT8 HeapStatus ) { @@ -682,5 +672,5 @@ agesawrapper_amdreadeventlog ( Status = AmdReadEventLog (&AmdEventParams); } - return (UINT32)Status; + return Status; } diff --git a/src/mainboard/asrock/imb-a180/agesawrapper.h b/src/mainboard/asrock/imb-a180/agesawrapper.h index 8589db5..60ec551 100644 --- a/src/mainboard/asrock/imb-a180/agesawrapper.h +++ b/src/mainboard/asrock/imb-a180/agesawrapper.h @@ -69,22 +69,22 @@ enum { *--------------------------------------------------------------------------------------- */ -UINT32 agesawrapper_amdinitreset (void); -UINT32 agesawrapper_amdinitearly (void); -UINT32 agesawrapper_amdinitenv (void); -UINT32 agesawrapper_amdinitlate (void); -UINT32 agesawrapper_amdinitpost (void); -UINT32 agesawrapper_amdinitmid (void); -UINT32 agesawrapper_amdreadeventlog (UINT8 HeapStatus); -UINT32 agesawrapper_amdinitmmio (void); -UINT32 agesawrapper_amdinitcpuio (void); +AGESA_STATUS agesawrapper_amdinitreset (void); +AGESA_STATUS agesawrapper_amdinitearly (void); +AGESA_STATUS agesawrapper_amdinitenv (void); +AGESA_STATUS agesawrapper_amdinitlate (void); +AGESA_STATUS agesawrapper_amdinitpost (void); +AGESA_STATUS agesawrapper_amdinitmid (void); +AGESA_STATUS agesawrapper_amdreadeventlog (UINT8 HeapStatus); +AGESA_STATUS agesawrapper_amdinitmmio (void); +AGESA_STATUS agesawrapper_amdinitcpuio (void); void *agesawrapper_getlateinitptr (int pick); -UINT32 agesawrapper_amdlaterunaptask (UINT32 Func, UINT32 Data, void *ConfigPtr); -UINT32 agesawrapper_amdS3Save(VOID); -UINT32 agesawrapper_amdinitresume(VOID); -UINT32 agesawrapper_amds3laterestore (VOID); +AGESA_STATUS agesawrapper_amdlaterunaptask (UINT32 Func, UINT32 Data, void *ConfigPtr); +AGESA_STATUS agesawrapper_amdS3Save(VOID); +AGESA_STATUS agesawrapper_amdinitresume (VOID); +AGESA_STATUS agesawrapper_amds3laterestore (VOID); -UINT32 agesawrapper_fchs3earlyrestore (VOID); -UINT32 agesawrapper_fchs3laterestore (VOID); +AGESA_STATUS agesawrapper_fchs3earlyrestore (VOID); +AGESA_STATUS agesawrapper_fchs3laterestore (VOID); #endif diff --git a/src/mainboard/asus/f2a85-m/agesawrapper.c b/src/mainboard/asus/f2a85-m/agesawrapper.c index 2a3502a..46d24ad 100644 --- a/src/mainboard/asus/f2a85-m/agesawrapper.c +++ b/src/mainboard/asus/f2a85-m/agesawrapper.c @@ -76,8 +76,7 @@ VOID *AcpiIvrs = NULL; * L O C A L F U N C T I O N S *--------------------------------------------------------------------------------------- */ -UINT32 -agesawrapper_amdinitcpuio ( +AGESA_STATUS agesawrapper_amdinitcpuio ( VOID ) { @@ -122,11 +121,10 @@ agesawrapper_amdinitcpuio ( PciData = 0x00000003; LibAmdPciWrite(AccessWidth32, PciAddress, &PciData, &StdHeader); Status = AGESA_SUCCESS; - return (UINT32)Status; + return Status; } -UINT32 -agesawrapper_amdinitmmio ( +AGESA_STATUS agesawrapper_amdinitmmio ( VOID ) { @@ -155,11 +153,10 @@ agesawrapper_amdinitmmio ( LibAmdMsrWrite (0x20D, &MsrReg, &StdHeader); Status = AGESA_SUCCESS; - return (UINT32)Status; + return Status; } -UINT32 -agesawrapper_amdinitreset ( +AGESA_STATUS agesawrapper_amdinitreset ( VOID ) { @@ -195,11 +192,10 @@ agesawrapper_amdinitreset ( status = AmdInitReset ((AMD_RESET_PARAMS *)AmdParamStruct.NewStructPtr); if (status != AGESA_SUCCESS) agesawrapper_amdreadeventlog(AmdParamStruct.StdHeader.HeapStatus); AmdReleaseStruct (&AmdParamStruct); - return (UINT32)status; + return status; } -UINT32 -agesawrapper_amdinitearly ( +AGESA_STATUS agesawrapper_amdinitearly ( VOID ) { @@ -227,11 +223,10 @@ agesawrapper_amdinitearly ( if (status != AGESA_SUCCESS) agesawrapper_amdreadeventlog(AmdParamStruct.StdHeader.HeapStatus); AmdReleaseStruct (&AmdParamStruct); - return (UINT32)status; + return status; } -UINT32 -agesawrapper_amdinitpost ( +AGESA_STATUS agesawrapper_amdinitpost ( VOID ) { @@ -259,11 +254,10 @@ agesawrapper_amdinitpost ( /* Initialize heap space */ EmptyHeap(); - return (UINT32)status; + return status; } -UINT32 -agesawrapper_amdinitenv ( +AGESA_STATUS agesawrapper_amdinitenv ( VOID ) { @@ -292,7 +286,7 @@ agesawrapper_amdinitenv ( Modify D1F0x18 */ - return (UINT32)status; + return status; } VOID * @@ -322,8 +316,7 @@ agesawrapper_getlateinitptr ( } } -UINT32 -agesawrapper_amdinitmid ( +AGESA_STATUS agesawrapper_amdinitmid ( VOID ) { @@ -352,11 +345,10 @@ agesawrapper_amdinitmid ( if (status != AGESA_SUCCESS) agesawrapper_amdreadeventlog(AmdParamStruct.StdHeader.HeapStatus); AmdReleaseStruct (&AmdParamStruct); - return (UINT32)status; + return status; } -UINT32 -agesawrapper_amdinitlate ( +AGESA_STATUS agesawrapper_amdinitlate ( VOID ) { @@ -404,11 +396,10 @@ agesawrapper_amdinitlate ( (unsigned int)AcpiAlib, (unsigned int)AcpiIvrs, __func__); /* AmdReleaseStruct (&AmdParamStruct); */ - return (UINT32)Status; + return Status; } -UINT32 -agesawrapper_amdlaterunaptask ( +AGESA_STATUS agesawrapper_amdlaterunaptask ( UINT32 Func, UINT32 Data, VOID *ConfigPtr @@ -435,11 +426,11 @@ agesawrapper_amdlaterunaptask ( ASSERT(Status == AGESA_SUCCESS); } - return (UINT32)Status; + return Status; } -UINT32 agesawrapper_amdinitresume(VOID) +AGESA_STATUS agesawrapper_amdinitresume(VOID) { AGESA_STATUS status; AMD_INTERFACE_PARAMS AmdParamStruct; @@ -475,11 +466,11 @@ UINT32 agesawrapper_amdinitresume(VOID) if (status != AGESA_SUCCESS) agesawrapper_amdreadeventlog(AmdParamStruct.StdHeader.HeapStatus); AmdReleaseStruct (&AmdParamStruct); - return (UINT32)status; + return status; } #ifndef __PRE_RAM__ -UINT32 agesawrapper_fchs3earlyrestore (VOID) +AGESA_STATUS agesawrapper_fchs3earlyrestore (VOID) { AGESA_STATUS status = AGESA_SUCCESS; @@ -502,7 +493,7 @@ UINT32 agesawrapper_fchs3earlyrestore (VOID) } #endif -UINT32 agesawrapper_amds3laterestore (VOID) +AGESA_STATUS agesawrapper_amds3laterestore (VOID) { AGESA_STATUS Status; AMD_INTERFACE_PARAMS AmdInterfaceParams; @@ -540,14 +531,14 @@ UINT32 agesawrapper_amds3laterestore (VOID) ASSERT(Status == AGESA_SUCCESS); } - return (UINT32)Status; + return Status; } #ifndef __PRE_RAM__ extern UINT8 picr_data[0x54], intr_data[0x54]; -UINT32 agesawrapper_fchs3laterestore (VOID) +AGESA_STATUS agesawrapper_fchs3laterestore (VOID) { AGESA_STATUS status = AGESA_SUCCESS; @@ -583,7 +574,7 @@ UINT32 agesawrapper_fchs3laterestore (VOID) #ifndef __PRE_RAM__ -UINT32 agesawrapper_amdS3Save(VOID) +AGESA_STATUS agesawrapper_amdS3Save(VOID) { AGESA_STATUS Status; AMD_S3SAVE_PARAMS *AmdS3SaveParamsPtr; @@ -642,13 +633,12 @@ UINT32 agesawrapper_amdS3Save(VOID) AmdReleaseStruct (&AmdInterfaceParams); - return (UINT32)Status; + return Status; } #endif /* #ifndef __PRE_RAM__ */ -UINT32 -agesawrapper_amdreadeventlog ( +AGESA_STATUS agesawrapper_amdreadeventlog ( UINT8 HeapStatus ) { @@ -673,5 +663,5 @@ agesawrapper_amdreadeventlog ( Status = AmdReadEventLog (&AmdEventParams); } - return (UINT32)Status; + return Status; } diff --git a/src/mainboard/asus/f2a85-m/agesawrapper.h b/src/mainboard/asus/f2a85-m/agesawrapper.h index 4ae226d..5294562 100644 --- a/src/mainboard/asus/f2a85-m/agesawrapper.h +++ b/src/mainboard/asus/f2a85-m/agesawrapper.h @@ -68,22 +68,22 @@ enum { *--------------------------------------------------------------------------------------- */ -UINT32 agesawrapper_amdinitreset (void); -UINT32 agesawrapper_amdinitearly (void); -UINT32 agesawrapper_amdinitenv (void); -UINT32 agesawrapper_amdinitlate (void); -UINT32 agesawrapper_amdinitpost (void); -UINT32 agesawrapper_amdinitmid (void); -UINT32 agesawrapper_amdreadeventlog (UINT8 HeapStatus); -UINT32 agesawrapper_amdinitmmio (void); -UINT32 agesawrapper_amdinitcpuio (void); +AGESA_STATUS agesawrapper_amdinitreset (void); +AGESA_STATUS agesawrapper_amdinitearly (void); +AGESA_STATUS agesawrapper_amdinitenv (void); +AGESA_STATUS agesawrapper_amdinitlate (void); +AGESA_STATUS agesawrapper_amdinitpost (void); +AGESA_STATUS agesawrapper_amdinitmid (void); +AGESA_STATUS agesawrapper_amdreadeventlog (UINT8 HeapStatus); +AGESA_STATUS agesawrapper_amdinitmmio (void); +AGESA_STATUS agesawrapper_amdinitcpuio (void); void *agesawrapper_getlateinitptr (int pick); -UINT32 agesawrapper_amdlaterunaptask (UINT32 Func, UINT32 Data, void *ConfigPtr); -UINT32 agesawrapper_amdS3Save(VOID); -UINT32 agesawrapper_amdinitresume(VOID); -UINT32 agesawrapper_amds3laterestore (VOID); +AGESA_STATUS agesawrapper_amdlaterunaptask (UINT32 Func, UINT32 Data, void *ConfigPtr); +AGESA_STATUS agesawrapper_amdS3Save(VOID); +AGESA_STATUS agesawrapper_amdinitresume (VOID); +AGESA_STATUS agesawrapper_amds3laterestore (VOID); -UINT32 agesawrapper_fchs3earlyrestore (VOID); -UINT32 agesawrapper_fchs3laterestore (VOID); +AGESA_STATUS agesawrapper_fchs3earlyrestore (VOID); +AGESA_STATUS agesawrapper_fchs3laterestore (VOID); #endif diff --git a/src/mainboard/gizmosphere/gizmo/agesawrapper.c b/src/mainboard/gizmosphere/gizmo/agesawrapper.c index 4b29128..c6ef79f 100755 --- a/src/mainboard/gizmosphere/gizmo/agesawrapper.c +++ b/src/mainboard/gizmosphere/gizmo/agesawrapper.c @@ -66,8 +66,7 @@ VOID *AcpiAlib = NULL; * L O C A L F U N C T I O N S *------------------------------------------------------------------------------ */ -UINT32 -agesawrapper_amdinitcpuio ( +AGESA_STATUS agesawrapper_amdinitcpuio ( VOID ) { @@ -112,11 +111,10 @@ agesawrapper_amdinitcpuio ( PciData = 0x00000003; LibAmdPciWrite(AccessWidth32, PciAddress, &PciData, &StdHeader); Status = AGESA_SUCCESS; - return (UINT32)Status; + return Status; } -UINT32 -agesawrapper_amdinitmmio ( +AGESA_STATUS agesawrapper_amdinitmmio ( VOID ) { @@ -162,11 +160,10 @@ agesawrapper_amdinitmmio ( LibAmdPciWrite(AccessWidth32, PciAddress, &PciData, &StdHeader); Status = AGESA_SUCCESS; - return (UINT32)Status; + return Status; } -UINT32 -agesawrapper_amdinitreset ( +AGESA_STATUS agesawrapper_amdinitreset ( VOID ) { @@ -191,11 +188,10 @@ agesawrapper_amdinitreset ( status = AmdInitReset ((AMD_RESET_PARAMS *)AmdParamStruct.NewStructPtr); if (status != AGESA_SUCCESS) agesawrapper_amdreadeventlog(); AmdReleaseStruct (&AmdParamStruct); - return (UINT32)status; + return status; } -UINT32 -agesawrapper_amdinitearly ( +AGESA_STATUS agesawrapper_amdinitearly ( VOID ) { @@ -220,11 +216,10 @@ agesawrapper_amdinitearly ( if (status != AGESA_SUCCESS) agesawrapper_amdreadeventlog(); AmdReleaseStruct (&AmdParamStruct); - return (UINT32)status; + return status; } -UINT32 -agesawrapper_amdinitpost ( +AGESA_STATUS agesawrapper_amdinitpost ( VOID ) { @@ -248,11 +243,10 @@ agesawrapper_amdinitpost ( /* Initialize heap space */ EmptyHeap(); - return (UINT32)status; + return status; } -UINT32 -agesawrapper_amdinitenv ( +AGESA_STATUS agesawrapper_amdinitenv ( VOID ) { @@ -346,7 +340,7 @@ agesawrapper_amdinitenv ( LibAmdPciWrite (AccessWidth32, PciAddress, &PciValue, &AmdParamStruct.StdHeader); AmdReleaseStruct (&AmdParamStruct); - return (UINT32)status; + return status; } VOID * @@ -374,8 +368,7 @@ agesawrapper_getlateinitptr ( } } -UINT32 -agesawrapper_amdinitmid ( +AGESA_STATUS agesawrapper_amdinitmid ( VOID ) { @@ -400,11 +393,10 @@ agesawrapper_amdinitmid ( if (status != AGESA_SUCCESS) agesawrapper_amdreadeventlog(); AmdReleaseStruct (&AmdParamStruct); - return (UINT32)status; + return status; } -UINT32 -agesawrapper_amdinitlate ( +AGESA_STATUS agesawrapper_amdinitlate ( VOID ) { @@ -450,11 +442,10 @@ agesawrapper_amdinitlate ( * AmdReleaseStruct (&AmdLateParams); */ - return (UINT32)Status; + return Status; } -UINT32 -agesawrapper_amdinitresume ( +AGESA_STATUS agesawrapper_amdinitresume ( VOID ) { @@ -488,11 +479,10 @@ agesawrapper_amdinitresume ( if (status != AGESA_SUCCESS) agesawrapper_amdreadeventlog(); AmdReleaseStruct (&AmdParamStruct); - return (UINT32)status; + return status; } -UINT32 -agesawrapper_amds3laterestore ( +AGESA_STATUS agesawrapper_amds3laterestore ( VOID ) { @@ -527,12 +517,11 @@ agesawrapper_amds3laterestore ( ASSERT(Status == AGESA_SUCCESS); } - return (UINT32)Status; + return Status; } #ifndef __PRE_RAM__ -UINT32 -agesawrapper_amdS3Save ( +AGESA_STATUS agesawrapper_amdS3Save ( VOID ) { @@ -581,12 +570,11 @@ agesawrapper_amdS3Save ( OemAgesaSaveMtrr(); AmdReleaseStruct (&AmdInterfaceParams); - return (UINT32)Status; + return Status; } #endif /* #ifndef __PRE_RAM__ */ -UINT32 -agesawrapper_amdlaterunaptask ( +AGESA_STATUS agesawrapper_amdlaterunaptask ( UINT32 Func, UINT32 Data, VOID *ConfigPtr @@ -610,11 +598,10 @@ agesawrapper_amdlaterunaptask ( ASSERT(Status == AGESA_SUCCESS); } - return (UINT32)Status; + return Status; } -UINT32 -agesawrapper_amdreadeventlog ( +AGESA_STATUS agesawrapper_amdreadeventlog ( VOID ) { @@ -635,5 +622,5 @@ agesawrapper_amdreadeventlog ( Status = AmdReadEventLog (&AmdEventParams); } - return (UINT32)Status; + return Status; } diff --git a/src/mainboard/gizmosphere/gizmo/agesawrapper.h b/src/mainboard/gizmosphere/gizmo/agesawrapper.h index 871982a..0e63e26 100755 --- a/src/mainboard/gizmosphere/gizmo/agesawrapper.h +++ b/src/mainboard/gizmosphere/gizmo/agesawrapper.h @@ -69,21 +69,21 @@ enum { *--------------------------------------------------------------------------------------- */ -UINT32 agesawrapper_amdinitreset (void); -UINT32 agesawrapper_amdinitearly (void); -UINT32 agesawrapper_amdinitenv (void); -UINT32 agesawrapper_amdinitlate (void); -UINT32 agesawrapper_amdinitpost (void); -UINT32 agesawrapper_amdinitmid (void); +AGESA_STATUS agesawrapper_amdinitreset (void); +AGESA_STATUS agesawrapper_amdinitearly (void); +AGESA_STATUS agesawrapper_amdinitenv (void); +AGESA_STATUS agesawrapper_amdinitlate (void); +AGESA_STATUS agesawrapper_amdinitpost (void); +AGESA_STATUS agesawrapper_amdinitmid (void); -UINT32 agesawrapper_amdreadeventlog (void); +AGESA_STATUS agesawrapper_amdreadeventlog (void); -UINT32 agesawrapper_amdinitcpuio (void); -UINT32 agesawrapper_amdinitmmio (void); -UINT32 agesawrapper_amdinitresume (void); -UINT32 agesawrapper_amdS3Save (void); -UINT32 agesawrapper_amds3laterestore (void); -UINT32 agesawrapper_amdlaterunaptask (UINT32 Func, UINT32 Data, VOID *ConfigPtr); +AGESA_STATUS agesawrapper_amdinitcpuio (void); +AGESA_STATUS agesawrapper_amdinitmmio (void); +AGESA_STATUS agesawrapper_amdinitresume (void); +AGESA_STATUS agesawrapper_amdS3Save (void); +AGESA_STATUS agesawrapper_amds3laterestore (void); +AGESA_STATUS agesawrapper_amdlaterunaptask (UINT32 Func, UINT32 Data, VOID *ConfigPtr); void *agesawrapper_getlateinitptr (int pick); #endif diff --git a/src/mainboard/hp/pavilion_m6_1035dx/agesawrapper.c b/src/mainboard/hp/pavilion_m6_1035dx/agesawrapper.c index 23cdbfa..1e010d2 100644 --- a/src/mainboard/hp/pavilion_m6_1035dx/agesawrapper.c +++ b/src/mainboard/hp/pavilion_m6_1035dx/agesawrapper.c @@ -116,8 +116,7 @@ uint32_t agesawrapper_amdinitcpuio(void) return AGESA_SUCCESS; } -UINT32 -agesawrapper_amdinitmmio ( +AGESA_STATUS agesawrapper_amdinitmmio ( VOID ) { @@ -153,11 +152,10 @@ agesawrapper_amdinitmmio ( LibAmdMsrWrite (0x20D, &MsrReg, &StdHeader); Status = AGESA_SUCCESS; - return (UINT32)Status; + return Status; } -UINT32 -agesawrapper_amdinitreset ( +AGESA_STATUS agesawrapper_amdinitreset ( VOID ) { @@ -193,11 +191,10 @@ agesawrapper_amdinitreset ( status = AmdInitReset ((AMD_RESET_PARAMS *)AmdParamStruct.NewStructPtr); if (status != AGESA_SUCCESS) agesawrapper_amdreadeventlog(AmdParamStruct.StdHeader.HeapStatus); AmdReleaseStruct (&AmdParamStruct); - return (UINT32)status; + return status; } -UINT32 -agesawrapper_amdinitearly ( +AGESA_STATUS agesawrapper_amdinitearly ( VOID ) { @@ -225,11 +222,10 @@ agesawrapper_amdinitearly ( if (status != AGESA_SUCCESS) agesawrapper_amdreadeventlog(AmdParamStruct.StdHeader.HeapStatus); AmdReleaseStruct (&AmdParamStruct); - return (UINT32)status; + return status; } -UINT32 -agesawrapper_amdinitpost ( +AGESA_STATUS agesawrapper_amdinitpost ( VOID ) { @@ -257,11 +253,10 @@ agesawrapper_amdinitpost ( /* Initialize heap space */ EmptyHeap(); - return (UINT32)status; + return status; } -UINT32 -agesawrapper_amdinitenv ( +AGESA_STATUS agesawrapper_amdinitenv ( VOID ) { @@ -290,7 +285,7 @@ agesawrapper_amdinitenv ( Modify D1F0x18 */ - return (UINT32)status; + return status; } VOID * @@ -320,8 +315,7 @@ agesawrapper_getlateinitptr ( } } -UINT32 -agesawrapper_amdinitmid ( +AGESA_STATUS agesawrapper_amdinitmid ( VOID ) { @@ -350,11 +344,10 @@ agesawrapper_amdinitmid ( if (status != AGESA_SUCCESS) agesawrapper_amdreadeventlog(AmdParamStruct.StdHeader.HeapStatus); AmdReleaseStruct (&AmdParamStruct); - return (UINT32)status; + return status; } -UINT32 -agesawrapper_amdinitlate ( +AGESA_STATUS agesawrapper_amdinitlate ( VOID ) { @@ -402,11 +395,10 @@ agesawrapper_amdinitlate ( (unsigned int)AcpiAlib, (unsigned int)AcpiIvrs, __func__); /* AmdReleaseStruct (&AmdParamStruct); */ - return (UINT32)Status; + return Status; } -UINT32 -agesawrapper_amdlaterunaptask ( +AGESA_STATUS agesawrapper_amdlaterunaptask ( UINT32 Func, UINT32 Data, VOID *ConfigPtr @@ -433,11 +425,11 @@ agesawrapper_amdlaterunaptask ( ASSERT(Status == AGESA_SUCCESS); } - return (UINT32)Status; + return Status; } -UINT32 agesawrapper_amdinitresume(VOID) +AGESA_STATUS agesawrapper_amdinitresume(VOID) { AGESA_STATUS status; AMD_INTERFACE_PARAMS AmdParamStruct; @@ -471,11 +463,11 @@ UINT32 agesawrapper_amdinitresume(VOID) if (status != AGESA_SUCCESS) agesawrapper_amdreadeventlog(AmdParamStruct.StdHeader.HeapStatus); AmdReleaseStruct (&AmdParamStruct); - return (UINT32)status; + return status; } #ifndef __PRE_RAM__ -UINT32 agesawrapper_fchs3earlyrestore (VOID) +AGESA_STATUS agesawrapper_fchs3earlyrestore (VOID) { AGESA_STATUS status = AGESA_SUCCESS; @@ -499,7 +491,7 @@ UINT32 agesawrapper_fchs3earlyrestore (VOID) } #endif -UINT32 agesawrapper_amds3laterestore (VOID) +AGESA_STATUS agesawrapper_amds3laterestore (VOID) { AGESA_STATUS Status; AMD_INTERFACE_PARAMS AmdInterfaceParams; @@ -535,14 +527,14 @@ UINT32 agesawrapper_amds3laterestore (VOID) ASSERT(Status == AGESA_SUCCESS); } - return (UINT32)Status; + return Status; } #ifndef __PRE_RAM__ extern UINT8 picr_data[0x54], intr_data[0x54]; -UINT32 agesawrapper_fchs3laterestore (VOID) +AGESA_STATUS agesawrapper_fchs3laterestore (VOID) { AGESA_STATUS status = AGESA_SUCCESS; @@ -579,7 +571,7 @@ UINT32 agesawrapper_fchs3laterestore (VOID) #ifndef __PRE_RAM__ -UINT32 agesawrapper_amdS3Save(VOID) +AGESA_STATUS agesawrapper_amdS3Save(VOID) { AGESA_STATUS Status; AMD_S3SAVE_PARAMS *AmdS3SaveParamsPtr; @@ -635,13 +627,12 @@ UINT32 agesawrapper_amdS3Save(VOID) AmdReleaseStruct (&AmdInterfaceParams); - return (UINT32)Status; + return Status; } #endif /* #ifndef __PRE_RAM__ */ -UINT32 -agesawrapper_amdreadeventlog ( +AGESA_STATUS agesawrapper_amdreadeventlog ( UINT8 HeapStatus ) { @@ -666,5 +657,5 @@ agesawrapper_amdreadeventlog ( Status = AmdReadEventLog (&AmdEventParams); } - return (UINT32)Status; + return Status; } diff --git a/src/mainboard/hp/pavilion_m6_1035dx/agesawrapper.h b/src/mainboard/hp/pavilion_m6_1035dx/agesawrapper.h index 317e5e8..96ed141 100644 --- a/src/mainboard/hp/pavilion_m6_1035dx/agesawrapper.h +++ b/src/mainboard/hp/pavilion_m6_1035dx/agesawrapper.h @@ -68,22 +68,22 @@ enum { *--------------------------------------------------------------------------------------- */ -UINT32 agesawrapper_amdinitreset (void); -UINT32 agesawrapper_amdinitearly (void); -UINT32 agesawrapper_amdinitenv (void); -UINT32 agesawrapper_amdinitlate (void); -UINT32 agesawrapper_amdinitpost (void); -UINT32 agesawrapper_amdinitmid (void); -UINT32 agesawrapper_amdreadeventlog (UINT8 HeapStatus); -UINT32 agesawrapper_amdinitmmio (void); +AGESA_STATUS agesawrapper_amdinitreset (void); +AGESA_STATUS agesawrapper_amdinitearly (void); +AGESA_STATUS agesawrapper_amdinitenv (void); +AGESA_STATUS agesawrapper_amdinitlate (void); +AGESA_STATUS agesawrapper_amdinitpost (void); +AGESA_STATUS agesawrapper_amdinitmid (void); +AGESA_STATUS agesawrapper_amdreadeventlog (UINT8 HeapStatus); +AGESA_STATUS agesawrapper_amdinitmmio (void); uint32_t agesawrapper_amdinitcpuio (void); void *agesawrapper_getlateinitptr (int pick); -UINT32 agesawrapper_amdlaterunaptask (UINT32 Func, UINT32 Data, void *ConfigPtr); -UINT32 agesawrapper_amdS3Save(VOID); -UINT32 agesawrapper_amdinitresume(VOID); -UINT32 agesawrapper_amds3laterestore (VOID); +AGESA_STATUS agesawrapper_amdlaterunaptask (UINT32 Func, UINT32 Data, void *ConfigPtr); +AGESA_STATUS agesawrapper_amdS3Save(VOID); +AGESA_STATUS agesawrapper_amdinitresume (VOID); +AGESA_STATUS agesawrapper_amds3laterestore (VOID); -UINT32 agesawrapper_fchs3earlyrestore (VOID); -UINT32 agesawrapper_fchs3laterestore (VOID); +AGESA_STATUS agesawrapper_fchs3earlyrestore (VOID); +AGESA_STATUS agesawrapper_fchs3laterestore (VOID); #endif diff --git a/src/mainboard/jetway/nf81-t56n-lf/agesawrapper.h b/src/mainboard/jetway/nf81-t56n-lf/agesawrapper.h index 720f3be..7f5b6bf 100644 --- a/src/mainboard/jetway/nf81-t56n-lf/agesawrapper.h +++ b/src/mainboard/jetway/nf81-t56n-lf/agesawrapper.h @@ -53,7 +53,7 @@ AGESA_STATUS agesawrapper_amdreadeventlog(void); AGESA_STATUS agesawrapper_amdinitcpuio(void); AGESA_STATUS agesawrapper_amdinitmmio(void); -AGESA_STATUS agesawrapper_amdinitresume(void); +AGESA_STATUS agesawrapper_amdinitresume (void); AGESA_STATUS agesawrapper_amdS3Save(void); AGESA_STATUS agesawrapper_amds3laterestore(void); AGESA_STATUS agesawrapper_amdlaterunaptask(uint32_t, uint32_t, void *); diff --git a/src/mainboard/lippert/frontrunner-af/agesawrapper.c b/src/mainboard/lippert/frontrunner-af/agesawrapper.c index 99a32f4..4a0348d 100644 --- a/src/mainboard/lippert/frontrunner-af/agesawrapper.c +++ b/src/mainboard/lippert/frontrunner-af/agesawrapper.c @@ -65,8 +65,7 @@ VOID *AcpiAlib = NULL; * L O C A L F U N C T I O N S *------------------------------------------------------------------------------ */ -UINT32 -agesawrapper_amdinitcpuio ( +AGESA_STATUS agesawrapper_amdinitcpuio ( VOID ) { @@ -111,11 +110,10 @@ agesawrapper_amdinitcpuio ( PciData = 0x00000003; LibAmdPciWrite(AccessWidth32, PciAddress, &PciData, &StdHeader); Status = AGESA_SUCCESS; - return (UINT32)Status; + return Status; } -UINT32 -agesawrapper_amdinitmmio ( +AGESA_STATUS agesawrapper_amdinitmmio ( VOID ) { @@ -161,11 +159,10 @@ agesawrapper_amdinitmmio ( LibAmdPciWrite(AccessWidth32, PciAddress, &PciData, &StdHeader); Status = AGESA_SUCCESS; - return (UINT32)Status; + return Status; } -UINT32 -agesawrapper_amdinitreset ( +AGESA_STATUS agesawrapper_amdinitreset ( VOID ) { @@ -190,11 +187,10 @@ agesawrapper_amdinitreset ( status = AmdInitReset ((AMD_RESET_PARAMS *)AmdParamStruct.NewStructPtr); if (status != AGESA_SUCCESS) agesawrapper_amdreadeventlog(); AmdReleaseStruct (&AmdParamStruct); - return (UINT32)status; + return status; } -UINT32 -agesawrapper_amdinitearly ( +AGESA_STATUS agesawrapper_amdinitearly ( VOID ) { @@ -219,11 +215,10 @@ agesawrapper_amdinitearly ( if (status != AGESA_SUCCESS) agesawrapper_amdreadeventlog(); AmdReleaseStruct (&AmdParamStruct); - return (UINT32)status; + return status; } -UINT32 -agesawrapper_amdinitpost ( +AGESA_STATUS agesawrapper_amdinitpost ( VOID ) { @@ -247,11 +242,10 @@ agesawrapper_amdinitpost ( /* Initialize heap space */ EmptyHeap(); - return (UINT32)status; + return status; } -UINT32 -agesawrapper_amdinitenv ( +AGESA_STATUS agesawrapper_amdinitenv ( VOID ) { @@ -345,7 +339,7 @@ agesawrapper_amdinitenv ( LibAmdPciWrite (AccessWidth32, PciAddress, &PciValue, &AmdParamStruct.StdHeader); AmdReleaseStruct (&AmdParamStruct); - return (UINT32)status; + return status; } VOID * @@ -373,8 +367,7 @@ agesawrapper_getlateinitptr ( } } -UINT32 -agesawrapper_amdinitmid ( +AGESA_STATUS agesawrapper_amdinitmid ( VOID ) { @@ -399,11 +392,10 @@ agesawrapper_amdinitmid ( if (status != AGESA_SUCCESS) agesawrapper_amdreadeventlog(); AmdReleaseStruct (&AmdParamStruct); - return (UINT32)status; + return status; } -UINT32 -agesawrapper_amdinitlate ( +AGESA_STATUS agesawrapper_amdinitlate ( VOID ) { @@ -449,11 +441,10 @@ agesawrapper_amdinitlate ( * AmdReleaseStruct (&AmdLateParams); */ - return (UINT32)Status; + return Status; } -UINT32 -agesawrapper_amdinitresume ( +AGESA_STATUS agesawrapper_amdinitresume ( VOID ) { @@ -487,11 +478,10 @@ agesawrapper_amdinitresume ( if (status != AGESA_SUCCESS) agesawrapper_amdreadeventlog(); AmdReleaseStruct (&AmdParamStruct); - return (UINT32)status; + return status; } -UINT32 -agesawrapper_amds3laterestore ( +AGESA_STATUS agesawrapper_amds3laterestore ( VOID ) { @@ -526,12 +516,11 @@ agesawrapper_amds3laterestore ( ASSERT(Status == AGESA_SUCCESS); } - return (UINT32)Status; + return Status; } #ifndef __PRE_RAM__ -UINT32 -agesawrapper_amdS3Save ( +AGESA_STATUS agesawrapper_amdS3Save ( VOID ) { @@ -580,12 +569,11 @@ agesawrapper_amdS3Save ( OemAgesaSaveMtrr(); AmdReleaseStruct (&AmdInterfaceParams); - return (UINT32)Status; + return Status; } #endif /* #ifndef __PRE_RAM__ */ -UINT32 -agesawrapper_amdlaterunaptask ( +AGESA_STATUS agesawrapper_amdlaterunaptask ( UINT32 Func, UINT32 Data, VOID *ConfigPtr @@ -609,11 +597,10 @@ agesawrapper_amdlaterunaptask ( ASSERT(Status == AGESA_SUCCESS); } - return (UINT32)Status; + return Status; } -UINT32 -agesawrapper_amdreadeventlog ( +AGESA_STATUS agesawrapper_amdreadeventlog ( VOID ) { @@ -634,5 +621,5 @@ agesawrapper_amdreadeventlog ( Status = AmdReadEventLog (&AmdEventParams); } - return (UINT32)Status; + return Status; } diff --git a/src/mainboard/lippert/frontrunner-af/agesawrapper.h b/src/mainboard/lippert/frontrunner-af/agesawrapper.h index 8cdb71e..42cfdd3 100644 --- a/src/mainboard/lippert/frontrunner-af/agesawrapper.h +++ b/src/mainboard/lippert/frontrunner-af/agesawrapper.h @@ -68,21 +68,21 @@ enum { *--------------------------------------------------------------------------------------- */ -UINT32 agesawrapper_amdinitreset (void); -UINT32 agesawrapper_amdinitearly (void); -UINT32 agesawrapper_amdinitenv (void); -UINT32 agesawrapper_amdinitlate (void); -UINT32 agesawrapper_amdinitpost (void); -UINT32 agesawrapper_amdinitmid (void); +AGESA_STATUS agesawrapper_amdinitreset (void); +AGESA_STATUS agesawrapper_amdinitearly (void); +AGESA_STATUS agesawrapper_amdinitenv (void); +AGESA_STATUS agesawrapper_amdinitlate (void); +AGESA_STATUS agesawrapper_amdinitpost (void); +AGESA_STATUS agesawrapper_amdinitmid (void); -UINT32 agesawrapper_amdreadeventlog (void); +AGESA_STATUS agesawrapper_amdreadeventlog (void); -UINT32 agesawrapper_amdinitcpuio (void); -UINT32 agesawrapper_amdinitmmio (void); -UINT32 agesawrapper_amdinitresume (void); -UINT32 agesawrapper_amdS3Save (void); -UINT32 agesawrapper_amds3laterestore (void); -UINT32 agesawrapper_amdlaterunaptask (UINT32 Func, UINT32 Data, VOID *ConfigPtr); +AGESA_STATUS agesawrapper_amdinitcpuio (void); +AGESA_STATUS agesawrapper_amdinitmmio (void); +AGESA_STATUS agesawrapper_amdinitresume (void); +AGESA_STATUS agesawrapper_amdS3Save (void); +AGESA_STATUS agesawrapper_amds3laterestore (void); +AGESA_STATUS agesawrapper_amdlaterunaptask (UINT32 Func, UINT32 Data, VOID *ConfigPtr); void *agesawrapper_getlateinitptr (int pick); #endif diff --git a/src/mainboard/lippert/toucan-af/agesawrapper.c b/src/mainboard/lippert/toucan-af/agesawrapper.c index 99a32f4..4a0348d 100644 --- a/src/mainboard/lippert/toucan-af/agesawrapper.c +++ b/src/mainboard/lippert/toucan-af/agesawrapper.c @@ -65,8 +65,7 @@ VOID *AcpiAlib = NULL; * L O C A L F U N C T I O N S *------------------------------------------------------------------------------ */ -UINT32 -agesawrapper_amdinitcpuio ( +AGESA_STATUS agesawrapper_amdinitcpuio ( VOID ) { @@ -111,11 +110,10 @@ agesawrapper_amdinitcpuio ( PciData = 0x00000003; LibAmdPciWrite(AccessWidth32, PciAddress, &PciData, &StdHeader); Status = AGESA_SUCCESS; - return (UINT32)Status; + return Status; } -UINT32 -agesawrapper_amdinitmmio ( +AGESA_STATUS agesawrapper_amdinitmmio ( VOID ) { @@ -161,11 +159,10 @@ agesawrapper_amdinitmmio ( LibAmdPciWrite(AccessWidth32, PciAddress, &PciData, &StdHeader); Status = AGESA_SUCCESS; - return (UINT32)Status; + return Status; } -UINT32 -agesawrapper_amdinitreset ( +AGESA_STATUS agesawrapper_amdinitreset ( VOID ) { @@ -190,11 +187,10 @@ agesawrapper_amdinitreset ( status = AmdInitReset ((AMD_RESET_PARAMS *)AmdParamStruct.NewStructPtr); if (status != AGESA_SUCCESS) agesawrapper_amdreadeventlog(); AmdReleaseStruct (&AmdParamStruct); - return (UINT32)status; + return status; } -UINT32 -agesawrapper_amdinitearly ( +AGESA_STATUS agesawrapper_amdinitearly ( VOID ) { @@ -219,11 +215,10 @@ agesawrapper_amdinitearly ( if (status != AGESA_SUCCESS) agesawrapper_amdreadeventlog(); AmdReleaseStruct (&AmdParamStruct); - return (UINT32)status; + return status; } -UINT32 -agesawrapper_amdinitpost ( +AGESA_STATUS agesawrapper_amdinitpost ( VOID ) { @@ -247,11 +242,10 @@ agesawrapper_amdinitpost ( /* Initialize heap space */ EmptyHeap(); - return (UINT32)status; + return status; } -UINT32 -agesawrapper_amdinitenv ( +AGESA_STATUS agesawrapper_amdinitenv ( VOID ) { @@ -345,7 +339,7 @@ agesawrapper_amdinitenv ( LibAmdPciWrite (AccessWidth32, PciAddress, &PciValue, &AmdParamStruct.StdHeader); AmdReleaseStruct (&AmdParamStruct); - return (UINT32)status; + return status; } VOID * @@ -373,8 +367,7 @@ agesawrapper_getlateinitptr ( } } -UINT32 -agesawrapper_amdinitmid ( +AGESA_STATUS agesawrapper_amdinitmid ( VOID ) { @@ -399,11 +392,10 @@ agesawrapper_amdinitmid ( if (status != AGESA_SUCCESS) agesawrapper_amdreadeventlog(); AmdReleaseStruct (&AmdParamStruct); - return (UINT32)status; + return status; } -UINT32 -agesawrapper_amdinitlate ( +AGESA_STATUS agesawrapper_amdinitlate ( VOID ) { @@ -449,11 +441,10 @@ agesawrapper_amdinitlate ( * AmdReleaseStruct (&AmdLateParams); */ - return (UINT32)Status; + return Status; } -UINT32 -agesawrapper_amdinitresume ( +AGESA_STATUS agesawrapper_amdinitresume ( VOID ) { @@ -487,11 +478,10 @@ agesawrapper_amdinitresume ( if (status != AGESA_SUCCESS) agesawrapper_amdreadeventlog(); AmdReleaseStruct (&AmdParamStruct); - return (UINT32)status; + return status; } -UINT32 -agesawrapper_amds3laterestore ( +AGESA_STATUS agesawrapper_amds3laterestore ( VOID ) { @@ -526,12 +516,11 @@ agesawrapper_amds3laterestore ( ASSERT(Status == AGESA_SUCCESS); } - return (UINT32)Status; + return Status; } #ifndef __PRE_RAM__ -UINT32 -agesawrapper_amdS3Save ( +AGESA_STATUS agesawrapper_amdS3Save ( VOID ) { @@ -580,12 +569,11 @@ agesawrapper_amdS3Save ( OemAgesaSaveMtrr(); AmdReleaseStruct (&AmdInterfaceParams); - return (UINT32)Status; + return Status; } #endif /* #ifndef __PRE_RAM__ */ -UINT32 -agesawrapper_amdlaterunaptask ( +AGESA_STATUS agesawrapper_amdlaterunaptask ( UINT32 Func, UINT32 Data, VOID *ConfigPtr @@ -609,11 +597,10 @@ agesawrapper_amdlaterunaptask ( ASSERT(Status == AGESA_SUCCESS); } - return (UINT32)Status; + return Status; } -UINT32 -agesawrapper_amdreadeventlog ( +AGESA_STATUS agesawrapper_amdreadeventlog ( VOID ) { @@ -634,5 +621,5 @@ agesawrapper_amdreadeventlog ( Status = AmdReadEventLog (&AmdEventParams); } - return (UINT32)Status; + return Status; } diff --git a/src/mainboard/lippert/toucan-af/agesawrapper.h b/src/mainboard/lippert/toucan-af/agesawrapper.h index 8cdb71e..42cfdd3 100644 --- a/src/mainboard/lippert/toucan-af/agesawrapper.h +++ b/src/mainboard/lippert/toucan-af/agesawrapper.h @@ -68,21 +68,21 @@ enum { *--------------------------------------------------------------------------------------- */ -UINT32 agesawrapper_amdinitreset (void); -UINT32 agesawrapper_amdinitearly (void); -UINT32 agesawrapper_amdinitenv (void); -UINT32 agesawrapper_amdinitlate (void); -UINT32 agesawrapper_amdinitpost (void); -UINT32 agesawrapper_amdinitmid (void); +AGESA_STATUS agesawrapper_amdinitreset (void); +AGESA_STATUS agesawrapper_amdinitearly (void); +AGESA_STATUS agesawrapper_amdinitenv (void); +AGESA_STATUS agesawrapper_amdinitlate (void); +AGESA_STATUS agesawrapper_amdinitpost (void); +AGESA_STATUS agesawrapper_amdinitmid (void); -UINT32 agesawrapper_amdreadeventlog (void); +AGESA_STATUS agesawrapper_amdreadeventlog (void); -UINT32 agesawrapper_amdinitcpuio (void); -UINT32 agesawrapper_amdinitmmio (void); -UINT32 agesawrapper_amdinitresume (void); -UINT32 agesawrapper_amdS3Save (void); -UINT32 agesawrapper_amds3laterestore (void); -UINT32 agesawrapper_amdlaterunaptask (UINT32 Func, UINT32 Data, VOID *ConfigPtr); +AGESA_STATUS agesawrapper_amdinitcpuio (void); +AGESA_STATUS agesawrapper_amdinitmmio (void); +AGESA_STATUS agesawrapper_amdinitresume (void); +AGESA_STATUS agesawrapper_amdS3Save (void); +AGESA_STATUS agesawrapper_amds3laterestore (void); +AGESA_STATUS agesawrapper_amdlaterunaptask (UINT32 Func, UINT32 Data, VOID *ConfigPtr); void *agesawrapper_getlateinitptr (int pick); #endif diff --git a/src/mainboard/supermicro/h8qgi/agesawrapper.c b/src/mainboard/supermicro/h8qgi/agesawrapper.c index 95fcece..24e3ee7 100644 --- a/src/mainboard/supermicro/h8qgi/agesawrapper.c +++ b/src/mainboard/supermicro/h8qgi/agesawrapper.c @@ -78,7 +78,7 @@ VOID *AcpiAlib = NULL; */ extern VOID OemCustomizeInitEarly(IN OUT AMD_EARLY_PARAMS *InitEarly); -static UINT32 agesawrapper_amdinitcpuio(VOID) +static AGESA_STATUS agesawrapper_amdinitcpuio(VOID) { AGESA_STATUS Status; UINT32 PciData; @@ -169,10 +169,10 @@ static UINT32 agesawrapper_amdinitcpuio(VOID) } Status = AGESA_SUCCESS; - return (UINT32)Status; + return Status; } -UINT32 agesawrapper_amdinitmmio(VOID) +AGESA_STATUS agesawrapper_amdinitmmio(VOID) { AGESA_STATUS Status; UINT64 MsrReg; @@ -199,7 +199,7 @@ UINT32 agesawrapper_amdinitmmio(VOID) LibAmdMsrWrite(0x20D, &MsrReg, &StdHeader); Status = AGESA_SUCCESS; - return (UINT32)Status; + return Status; } UINT32 agesawrapper_amdinitreset(VOID) @@ -228,7 +228,7 @@ UINT32 agesawrapper_amdinitreset(VOID) AmdParamStruct.StdHeader.ImageBasePtr = 0; status = AmdCreateStruct(&AmdParamStruct); if (status != AGESA_SUCCESS) { - return (UINT32)status; + return status; } AmdResetParams.HtConfig.Depth = 0; @@ -241,10 +241,10 @@ UINT32 agesawrapper_amdinitreset(VOID) agesawrapper_amdreadeventlog(AmdParamStruct.StdHeader.HeapStatus); AmdReleaseStruct(&AmdParamStruct); - return (UINT32)status; + return status; } -UINT32 agesawrapper_amdinitearly(VOID) +AGESA_STATUS agesawrapper_amdinitearly(VOID) { AGESA_STATUS status; AMD_INTERFACE_PARAMS AmdParamStruct; @@ -265,7 +265,7 @@ UINT32 agesawrapper_amdinitearly(VOID) AmdParamStruct.StdHeader.ImageBasePtr = 0; status = AmdCreateStruct(&AmdParamStruct); if (status != AGESA_SUCCESS) { - return (UINT32)status; + return status; } AmdEarlyParamsPtr = (AMD_EARLY_PARAMS *)AmdParamStruct.NewStructPtr; @@ -280,10 +280,10 @@ UINT32 agesawrapper_amdinitearly(VOID) printk(BIOS_DEBUG, "BSP Frequency: %uMHz\n", (unsigned int)TscRateInMhz); AmdReleaseStruct(&AmdParamStruct); - return (UINT32)status; + return status; } -UINT32 agesawrapper_amdinitpost(VOID) +AGESA_STATUS agesawrapper_amdinitpost(VOID) { AGESA_STATUS status; AMD_INTERFACE_PARAMS AmdParamStruct; @@ -305,7 +305,7 @@ UINT32 agesawrapper_amdinitpost(VOID) status = AmdCreateStruct(&AmdParamStruct); if (status != AGESA_SUCCESS) { - return (UINT32)status; + return status; } PostParams = (AMD_POST_PARAMS *)AmdParamStruct.NewStructPtr; status = AmdInitPost(PostParams); @@ -321,10 +321,10 @@ UINT32 agesawrapper_amdinitpost(VOID) FamilySpecificServices->GetTscRate (FamilySpecificServices, &TscRateInMhz, &AmdParamStruct.StdHeader); printk(BIOS_DEBUG, "BSP Frequency: %uMHz\n", (unsigned int)TscRateInMhz); - return (UINT32)status; + return status; } -UINT32 agesawrapper_amdinitenv(VOID) +AGESA_STATUS agesawrapper_amdinitenv(VOID) { AGESA_STATUS status; AMD_INTERFACE_PARAMS AmdParamStruct; @@ -344,7 +344,7 @@ UINT32 agesawrapper_amdinitenv(VOID) status = AmdCreateStruct(&AmdParamStruct); if (status != AGESA_SUCCESS) { - return (UINT32)status; + return status; } EnvParams = (AMD_ENV_PARAMS *)AmdParamStruct.NewStructPtr; status = AmdInitEnv(EnvParams); @@ -352,7 +352,7 @@ UINT32 agesawrapper_amdinitenv(VOID) agesawrapper_amdreadeventlog(EnvParams->StdHeader.HeapStatus); AmdReleaseStruct(&AmdParamStruct); - return (UINT32)status; + return status; } VOID * agesawrapper_getlateinitptr(int pick) @@ -382,7 +382,7 @@ VOID * agesawrapper_getlateinitptr(int pick) return NULL; } -UINT32 agesawrapper_amdinitmid(VOID) +AGESA_STATUS agesawrapper_amdinitmid(VOID) { AGESA_STATUS status; AMD_INTERFACE_PARAMS AmdParamStruct; @@ -404,17 +404,17 @@ UINT32 agesawrapper_amdinitmid(VOID) status = AmdCreateStruct(&AmdParamStruct); if (status != AGESA_SUCCESS) { - return (UINT32)status; + return status; } status = AmdInitMid((AMD_MID_PARAMS *)AmdParamStruct.NewStructPtr); if (status != AGESA_SUCCESS) agesawrapper_amdreadeventlog(AmdParamStruct.StdHeader.HeapStatus); AmdReleaseStruct(&AmdParamStruct); - return (UINT32)status; + return status; } -UINT32 agesawrapper_amdinitlate(VOID) +AGESA_STATUS agesawrapper_amdinitlate(VOID) { AGESA_STATUS Status; AMD_INTERFACE_PARAMS AmdParamStruct; @@ -460,14 +460,14 @@ UINT32 agesawrapper_amdinitlate(VOID) * AmdReleaseStruct (&AmdLateParams); */ - return (UINT32)Status; + return Status; } /** * @param[in] UINTN ApicIdOfCore, * @param[in] AP_EXE_PARAMS *LaunchApParams */ -UINT32 agesawrapper_amdlaterunaptask (UINT32 Func, UINT32 Data, VOID *ConfigPtr) +AGESA_STATUS agesawrapper_amdlaterunaptask (UINT32 Func, UINT32 Data, VOID *ConfigPtr) { AGESA_STATUS Status; AMD_LATE_PARAMS AmdLateParams; @@ -490,7 +490,7 @@ UINT32 agesawrapper_amdlaterunaptask (UINT32 Func, UINT32 Data, VOID *ConfigPtr) ASSERT(Status <= AGESA_UNSUPPORTED); } - return (UINT32)Status; + return Status; } /** @@ -1152,7 +1152,7 @@ static void interpret_agesa_eventlog(EVENT_PARAMS *event) /** * @param HeapStatus -the current HeapStatus */ -UINT32 agesawrapper_amdreadeventlog(UINT8 HeapStatus) +AGESA_STATUS agesawrapper_amdreadeventlog(UINT8 HeapStatus) { printk(BIOS_DEBUG, "enter in %s\n", __func__); AGESA_STATUS Status; @@ -1185,6 +1185,6 @@ UINT32 agesawrapper_amdreadeventlog(UINT8 HeapStatus) } printk(BIOS_DEBUG, "exit %s \n", __func__); - return (UINT32)Status; + return Status; } diff --git a/src/mainboard/supermicro/h8qgi/agesawrapper.h b/src/mainboard/supermicro/h8qgi/agesawrapper.h index 51e438d..17de116 100644 --- a/src/mainboard/supermicro/h8qgi/agesawrapper.h +++ b/src/mainboard/supermicro/h8qgi/agesawrapper.h @@ -68,16 +68,16 @@ enum { *--------------------------------------------------------------------------------------- */ -UINT32 agesawrapper_amdinitreset (void); -UINT32 agesawrapper_amdinitearly (void); -UINT32 agesawrapper_amdinitenv (void); -UINT32 agesawrapper_amdinitlate (void); -UINT32 agesawrapper_amdinitpost (void); -UINT32 agesawrapper_amdinitmid (void); -UINT32 agesawrapper_amdreadeventlog (UINT8 HeapStatus); -UINT32 agesawrapper_amdinitmmio (void); +AGESA_STATUS agesawrapper_amdinitreset (void); +AGESA_STATUS agesawrapper_amdinitearly (void); +AGESA_STATUS agesawrapper_amdinitenv (void); +AGESA_STATUS agesawrapper_amdinitlate (void); +AGESA_STATUS agesawrapper_amdinitpost (void); +AGESA_STATUS agesawrapper_amdinitmid (void); +AGESA_STATUS agesawrapper_amdreadeventlog (UINT8 HeapStatus); +AGESA_STATUS agesawrapper_amdinitmmio (void); void *agesawrapper_getlateinitptr (int pick); -UINT32 agesawrapper_amdlaterunaptask (UINT32 Func, UINT32 Data, VOID *ConfigPtr); +AGESA_STATUS agesawrapper_amdlaterunaptask (UINT32 Func, UINT32 Data, VOID *ConfigPtr); -static inline UINT32 agesawrapper_amdS3Save(void) { return 0; } +static inline AGESA_STATUS agesawrapper_amdS3Save(void) { return 0; } #endif diff --git a/src/mainboard/supermicro/h8scm/agesawrapper.c b/src/mainboard/supermicro/h8scm/agesawrapper.c index e26dc75..9679fd9 100644 --- a/src/mainboard/supermicro/h8scm/agesawrapper.c +++ b/src/mainboard/supermicro/h8scm/agesawrapper.c @@ -78,7 +78,7 @@ VOID *AcpiAlib = NULL; */ extern VOID OemCustomizeInitEarly(IN OUT AMD_EARLY_PARAMS *InitEarly); -static UINT32 agesawrapper_amdinitcpuio(VOID) +static AGESA_STATUS agesawrapper_amdinitcpuio(VOID) { AGESA_STATUS Status; UINT32 PciData; @@ -169,10 +169,10 @@ static UINT32 agesawrapper_amdinitcpuio(VOID) } Status = AGESA_SUCCESS; - return (UINT32)Status; + return Status; } -UINT32 agesawrapper_amdinitmmio(VOID) +AGESA_STATUS agesawrapper_amdinitmmio(VOID) { AGESA_STATUS Status; UINT64 MsrReg; @@ -199,7 +199,7 @@ UINT32 agesawrapper_amdinitmmio(VOID) LibAmdMsrWrite(0x20D, &MsrReg, &StdHeader); Status = AGESA_SUCCESS; - return (UINT32)Status; + return Status; } UINT32 agesawrapper_amdinitreset(VOID) @@ -228,7 +228,7 @@ UINT32 agesawrapper_amdinitreset(VOID) AmdParamStruct.StdHeader.ImageBasePtr = 0; status = AmdCreateStruct(&AmdParamStruct); if (status != AGESA_SUCCESS) { - return (UINT32)status; + return status; } AmdResetParams.HtConfig.Depth = 0; @@ -241,10 +241,10 @@ UINT32 agesawrapper_amdinitreset(VOID) agesawrapper_amdreadeventlog(AmdParamStruct.StdHeader.HeapStatus); AmdReleaseStruct(&AmdParamStruct); - return (UINT32)status; + return status; } -UINT32 agesawrapper_amdinitearly(VOID) +AGESA_STATUS agesawrapper_amdinitearly(VOID) { AGESA_STATUS status; AMD_INTERFACE_PARAMS AmdParamStruct; @@ -265,7 +265,7 @@ UINT32 agesawrapper_amdinitearly(VOID) AmdParamStruct.StdHeader.ImageBasePtr = 0; status = AmdCreateStruct(&AmdParamStruct); if (status != AGESA_SUCCESS) { - return (UINT32)status; + return status; } AmdEarlyParamsPtr = (AMD_EARLY_PARAMS *)AmdParamStruct.NewStructPtr; @@ -280,10 +280,10 @@ UINT32 agesawrapper_amdinitearly(VOID) printk(BIOS_DEBUG, "BSP Frequency: %uMHz\n", (unsigned int)TscRateInMhz); AmdReleaseStruct(&AmdParamStruct); - return (UINT32)status; + return status; } -UINT32 agesawrapper_amdinitpost(VOID) +AGESA_STATUS agesawrapper_amdinitpost(VOID) { AGESA_STATUS status; AMD_INTERFACE_PARAMS AmdParamStruct; @@ -305,7 +305,7 @@ UINT32 agesawrapper_amdinitpost(VOID) status = AmdCreateStruct(&AmdParamStruct); if (status != AGESA_SUCCESS) { - return (UINT32)status; + return status; } PostParams = (AMD_POST_PARAMS *)AmdParamStruct.NewStructPtr; status = AmdInitPost(PostParams); @@ -321,10 +321,10 @@ UINT32 agesawrapper_amdinitpost(VOID) FamilySpecificServices->GetTscRate (FamilySpecificServices, &TscRateInMhz, &AmdParamStruct.StdHeader); printk(BIOS_DEBUG, "BSP Frequency: %uMHz\n", (unsigned int)TscRateInMhz); - return (UINT32)status; + return status; } -UINT32 agesawrapper_amdinitenv(VOID) +AGESA_STATUS agesawrapper_amdinitenv(VOID) { AGESA_STATUS status; AMD_INTERFACE_PARAMS AmdParamStruct; @@ -344,7 +344,7 @@ UINT32 agesawrapper_amdinitenv(VOID) status = AmdCreateStruct(&AmdParamStruct); if (status != AGESA_SUCCESS) { - return (UINT32)status; + return status; } EnvParams = (AMD_ENV_PARAMS *)AmdParamStruct.NewStructPtr; status = AmdInitEnv(EnvParams); @@ -352,7 +352,7 @@ UINT32 agesawrapper_amdinitenv(VOID) agesawrapper_amdreadeventlog(EnvParams->StdHeader.HeapStatus); AmdReleaseStruct(&AmdParamStruct); - return (UINT32)status; + return status; } VOID * agesawrapper_getlateinitptr(int pick) @@ -382,7 +382,7 @@ VOID * agesawrapper_getlateinitptr(int pick) return NULL; } -UINT32 agesawrapper_amdinitmid(VOID) +AGESA_STATUS agesawrapper_amdinitmid(VOID) { AGESA_STATUS status; AMD_INTERFACE_PARAMS AmdParamStruct; @@ -404,17 +404,17 @@ UINT32 agesawrapper_amdinitmid(VOID) status = AmdCreateStruct(&AmdParamStruct); if (status != AGESA_SUCCESS) { - return (UINT32)status; + return status; } status = AmdInitMid((AMD_MID_PARAMS *)AmdParamStruct.NewStructPtr); if (status != AGESA_SUCCESS) agesawrapper_amdreadeventlog(AmdParamStruct.StdHeader.HeapStatus); AmdReleaseStruct(&AmdParamStruct); - return (UINT32)status; + return status; } -UINT32 agesawrapper_amdinitlate(VOID) +AGESA_STATUS agesawrapper_amdinitlate(VOID) { AGESA_STATUS Status; AMD_INTERFACE_PARAMS AmdParamStruct; @@ -460,14 +460,14 @@ UINT32 agesawrapper_amdinitlate(VOID) * AmdReleaseStruct (&AmdLateParams); */ - return (UINT32)Status; + return Status; } /** * @param[in] UINTN ApicIdOfCore, * @param[in] AP_EXE_PARAMS *LaunchApParams */ -UINT32 agesawrapper_amdlaterunaptask (UINT32 Func, UINT32 Data, VOID *ConfigPtr) +AGESA_STATUS agesawrapper_amdlaterunaptask (UINT32 Func, UINT32 Data, VOID *ConfigPtr) { AGESA_STATUS Status; AMD_LATE_PARAMS AmdLateParams; @@ -490,7 +490,7 @@ UINT32 agesawrapper_amdlaterunaptask (UINT32 Func, UINT32 Data, VOID *ConfigPtr) ASSERT(Status <= AGESA_UNSUPPORTED); } - return (UINT32)Status; + return Status; } /** @@ -1152,7 +1152,7 @@ static void interpret_agesa_eventlog(EVENT_PARAMS *event) /** * @param HeapStatus -the current HeapStatus */ -UINT32 agesawrapper_amdreadeventlog(UINT8 HeapStatus) +AGESA_STATUS agesawrapper_amdreadeventlog(UINT8 HeapStatus) { printk(BIOS_DEBUG, "enter in %s\n", __func__); AGESA_STATUS Status; @@ -1185,6 +1185,6 @@ UINT32 agesawrapper_amdreadeventlog(UINT8 HeapStatus) } printk(BIOS_DEBUG, "exit %s \n", __func__); - return (UINT32)Status; + return Status; } diff --git a/src/mainboard/supermicro/h8scm/agesawrapper.h b/src/mainboard/supermicro/h8scm/agesawrapper.h index 51e438d..17de116 100644 --- a/src/mainboard/supermicro/h8scm/agesawrapper.h +++ b/src/mainboard/supermicro/h8scm/agesawrapper.h @@ -68,16 +68,16 @@ enum { *--------------------------------------------------------------------------------------- */ -UINT32 agesawrapper_amdinitreset (void); -UINT32 agesawrapper_amdinitearly (void); -UINT32 agesawrapper_amdinitenv (void); -UINT32 agesawrapper_amdinitlate (void); -UINT32 agesawrapper_amdinitpost (void); -UINT32 agesawrapper_amdinitmid (void); -UINT32 agesawrapper_amdreadeventlog (UINT8 HeapStatus); -UINT32 agesawrapper_amdinitmmio (void); +AGESA_STATUS agesawrapper_amdinitreset (void); +AGESA_STATUS agesawrapper_amdinitearly (void); +AGESA_STATUS agesawrapper_amdinitenv (void); +AGESA_STATUS agesawrapper_amdinitlate (void); +AGESA_STATUS agesawrapper_amdinitpost (void); +AGESA_STATUS agesawrapper_amdinitmid (void); +AGESA_STATUS agesawrapper_amdreadeventlog (UINT8 HeapStatus); +AGESA_STATUS agesawrapper_amdinitmmio (void); void *agesawrapper_getlateinitptr (int pick); -UINT32 agesawrapper_amdlaterunaptask (UINT32 Func, UINT32 Data, VOID *ConfigPtr); +AGESA_STATUS agesawrapper_amdlaterunaptask (UINT32 Func, UINT32 Data, VOID *ConfigPtr); -static inline UINT32 agesawrapper_amdS3Save(void) { return 0; } +static inline AGESA_STATUS agesawrapper_amdS3Save(void) { return 0; } #endif diff --git a/src/mainboard/tyan/s8226/agesawrapper.c b/src/mainboard/tyan/s8226/agesawrapper.c index 0a68979..9f622be 100644 --- a/src/mainboard/tyan/s8226/agesawrapper.c +++ b/src/mainboard/tyan/s8226/agesawrapper.c @@ -78,7 +78,7 @@ VOID *AcpiAlib = NULL; */ extern VOID OemCustomizeInitEarly(IN OUT AMD_EARLY_PARAMS *InitEarly); -static UINT32 agesawrapper_amdinitcpuio(VOID) +static AGESA_STATUS agesawrapper_amdinitcpuio(VOID) { AGESA_STATUS Status; UINT32 PciData; @@ -169,11 +169,10 @@ static UINT32 agesawrapper_amdinitcpuio(VOID) } Status = AGESA_SUCCESS; - return (UINT32)Status; + return Status; } -UINT32 -agesawrapper_amdinitmmio ( +AGESA_STATUS agesawrapper_amdinitmmio ( VOID ) { @@ -209,7 +208,7 @@ agesawrapper_amdinitmmio ( LibAmdMsrWrite (0x20D, &MsrReg, &StdHeader); Status = AGESA_SUCCESS; - return (UINT32)Status; + return Status; } UINT32 agesawrapper_amdinitreset(VOID) @@ -238,7 +237,7 @@ UINT32 agesawrapper_amdinitreset(VOID) AmdParamStruct.StdHeader.ImageBasePtr = 0; status = AmdCreateStruct(&AmdParamStruct); if (status != AGESA_SUCCESS) { - return (UINT32)status; + return status; } AmdResetParams.HtConfig.Depth = 0; @@ -251,10 +250,10 @@ UINT32 agesawrapper_amdinitreset(VOID) agesawrapper_amdreadeventlog(AmdParamStruct.StdHeader.HeapStatus); AmdReleaseStruct(&AmdParamStruct); - return (UINT32)status; + return status; } -UINT32 agesawrapper_amdinitearly(VOID) +AGESA_STATUS agesawrapper_amdinitearly(VOID) { AGESA_STATUS status; AMD_INTERFACE_PARAMS AmdParamStruct; @@ -275,7 +274,7 @@ UINT32 agesawrapper_amdinitearly(VOID) AmdParamStruct.StdHeader.ImageBasePtr = 0; status = AmdCreateStruct(&AmdParamStruct); if (status != AGESA_SUCCESS) { - return (UINT32)status; + return status; } AmdEarlyParamsPtr = (AMD_EARLY_PARAMS *)AmdParamStruct.NewStructPtr; @@ -290,10 +289,10 @@ UINT32 agesawrapper_amdinitearly(VOID) printk(BIOS_DEBUG, "BSP Frequency: %uMHz\n", (unsigned int)TscRateInMhz); AmdReleaseStruct(&AmdParamStruct); - return (UINT32)status; + return status; } -UINT32 agesawrapper_amdinitpost(VOID) +AGESA_STATUS agesawrapper_amdinitpost(VOID) { AGESA_STATUS status; AMD_INTERFACE_PARAMS AmdParamStruct; @@ -315,7 +314,7 @@ UINT32 agesawrapper_amdinitpost(VOID) status = AmdCreateStruct(&AmdParamStruct); if (status != AGESA_SUCCESS) { - return (UINT32)status; + return status; } PostParams = (AMD_POST_PARAMS *)AmdParamStruct.NewStructPtr; status = AmdInitPost(PostParams); @@ -331,10 +330,10 @@ UINT32 agesawrapper_amdinitpost(VOID) FamilySpecificServices->GetTscRate (FamilySpecificServices, &TscRateInMhz, &AmdParamStruct.StdHeader); printk(BIOS_DEBUG, "BSP Frequency: %uMHz\n", (unsigned int)TscRateInMhz); - return (UINT32)status; + return status; } -UINT32 agesawrapper_amdinitenv(VOID) +AGESA_STATUS agesawrapper_amdinitenv(VOID) { AGESA_STATUS status; AMD_INTERFACE_PARAMS AmdParamStruct; @@ -354,7 +353,7 @@ UINT32 agesawrapper_amdinitenv(VOID) status = AmdCreateStruct(&AmdParamStruct); if (status != AGESA_SUCCESS) { - return (UINT32)status; + return status; } EnvParams = (AMD_ENV_PARAMS *)AmdParamStruct.NewStructPtr; status = AmdInitEnv(EnvParams); @@ -362,7 +361,7 @@ UINT32 agesawrapper_amdinitenv(VOID) agesawrapper_amdreadeventlog(EnvParams->StdHeader.HeapStatus); AmdReleaseStruct(&AmdParamStruct); - return (UINT32)status; + return status; } VOID * agesawrapper_getlateinitptr(int pick) @@ -392,7 +391,7 @@ VOID * agesawrapper_getlateinitptr(int pick) return NULL; } -UINT32 agesawrapper_amdinitmid(VOID) +AGESA_STATUS agesawrapper_amdinitmid(VOID) { AGESA_STATUS status; AMD_INTERFACE_PARAMS AmdParamStruct; @@ -414,17 +413,17 @@ UINT32 agesawrapper_amdinitmid(VOID) status = AmdCreateStruct(&AmdParamStruct); if (status != AGESA_SUCCESS) { - return (UINT32)status; + return status; } status = AmdInitMid((AMD_MID_PARAMS *)AmdParamStruct.NewStructPtr); if (status != AGESA_SUCCESS) agesawrapper_amdreadeventlog(AmdParamStruct.StdHeader.HeapStatus); AmdReleaseStruct(&AmdParamStruct); - return (UINT32)status; + return status; } -UINT32 agesawrapper_amdinitlate(VOID) +AGESA_STATUS agesawrapper_amdinitlate(VOID) { AGESA_STATUS Status; AMD_INTERFACE_PARAMS AmdParamStruct; @@ -470,14 +469,14 @@ UINT32 agesawrapper_amdinitlate(VOID) * AmdReleaseStruct (&AmdLateParams); */ - return (UINT32)Status; + return Status; } /** * @param[in] UINTN ApicIdOfCore, * @param[in] AP_EXE_PARAMS *LaunchApParams */ -UINT32 agesawrapper_amdlaterunaptask (UINT32 Func, UINT32 Data, VOID *ConfigPtr) +AGESA_STATUS agesawrapper_amdlaterunaptask (UINT32 Func, UINT32 Data, VOID *ConfigPtr) { AGESA_STATUS Status; AMD_LATE_PARAMS AmdLateParams; @@ -500,7 +499,7 @@ UINT32 agesawrapper_amdlaterunaptask (UINT32 Func, UINT32 Data, VOID *ConfigPtr) ASSERT(Status <= AGESA_UNSUPPORTED); } - return (UINT32)Status; + return Status; } /** @@ -1162,7 +1161,7 @@ static void interpret_agesa_eventlog(EVENT_PARAMS *event) /** * @param HeapStatus -the current HeapStatus */ -UINT32 agesawrapper_amdreadeventlog(UINT8 HeapStatus) +AGESA_STATUS agesawrapper_amdreadeventlog(UINT8 HeapStatus) { printk(BIOS_DEBUG, "enter in %s\n", __func__); AGESA_STATUS Status; @@ -1195,6 +1194,6 @@ UINT32 agesawrapper_amdreadeventlog(UINT8 HeapStatus) } printk(BIOS_DEBUG, "exit %s \n", __func__); - return (UINT32)Status; + return Status; } diff --git a/src/mainboard/tyan/s8226/agesawrapper.h b/src/mainboard/tyan/s8226/agesawrapper.h index 51e438d..17de116 100644 --- a/src/mainboard/tyan/s8226/agesawrapper.h +++ b/src/mainboard/tyan/s8226/agesawrapper.h @@ -68,16 +68,16 @@ enum { *--------------------------------------------------------------------------------------- */ -UINT32 agesawrapper_amdinitreset (void); -UINT32 agesawrapper_amdinitearly (void); -UINT32 agesawrapper_amdinitenv (void); -UINT32 agesawrapper_amdinitlate (void); -UINT32 agesawrapper_amdinitpost (void); -UINT32 agesawrapper_amdinitmid (void); -UINT32 agesawrapper_amdreadeventlog (UINT8 HeapStatus); -UINT32 agesawrapper_amdinitmmio (void); +AGESA_STATUS agesawrapper_amdinitreset (void); +AGESA_STATUS agesawrapper_amdinitearly (void); +AGESA_STATUS agesawrapper_amdinitenv (void); +AGESA_STATUS agesawrapper_amdinitlate (void); +AGESA_STATUS agesawrapper_amdinitpost (void); +AGESA_STATUS agesawrapper_amdinitmid (void); +AGESA_STATUS agesawrapper_amdreadeventlog (UINT8 HeapStatus); +AGESA_STATUS agesawrapper_amdinitmmio (void); void *agesawrapper_getlateinitptr (int pick); -UINT32 agesawrapper_amdlaterunaptask (UINT32 Func, UINT32 Data, VOID *ConfigPtr); +AGESA_STATUS agesawrapper_amdlaterunaptask (UINT32 Func, UINT32 Data, VOID *ConfigPtr); -static inline UINT32 agesawrapper_amdS3Save(void) { return 0; } +static inline AGESA_STATUS agesawrapper_amdS3Save(void) { return 0; } #endif

1 0

Patch set updated for coreboot: f84040f AGESA: No need to shout VOID in agesawrapper
by Edward O'Callaghan 06 Jul '14

06 Jul '14

Edward O'Callaghan (eocallaghan(a)alterapraxis.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/6183 -gerrit commit f84040fc9aac67cb0765fc8a5f993b41361a70e3 Author: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> Date: Sat Jul 5 19:35:17 2014 +1000 AGESA: No need to shout VOID in agesawrapper Change-Id: I9a8a310d5f0df7a514c370fec3cbf23f9675bd63 Signed-off-by: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> --- src/mainboard/amd/dinar/agesawrapper.c | 32 +++++------------ src/mainboard/amd/olivehill/agesawrapper.c | 42 +++++++--------------- src/mainboard/amd/olivehill/agesawrapper.h | 10 +++--- src/mainboard/amd/parmer/agesawrapper.c | 42 +++++++--------------- src/mainboard/amd/parmer/agesawrapper.h | 10 +++--- src/mainboard/amd/thatcher/agesawrapper.c | 42 +++++++--------------- src/mainboard/amd/thatcher/agesawrapper.h | 10 +++--- src/mainboard/asrock/imb-a180/agesawrapper.c | 42 +++++++--------------- src/mainboard/asrock/imb-a180/agesawrapper.h | 10 +++--- src/mainboard/asus/f2a85-m/agesawrapper.c | 42 +++++++--------------- src/mainboard/asus/f2a85-m/agesawrapper.h | 10 +++--- src/mainboard/hp/pavilion_m6_1035dx/agesawrapper.c | 38 +++++++------------- src/mainboard/hp/pavilion_m6_1035dx/agesawrapper.h | 10 +++--- src/mainboard/supermicro/h8qgi/agesawrapper.c | 16 ++++----- src/mainboard/supermicro/h8scm/agesawrapper.c | 16 ++++----- src/mainboard/tyan/s8226/agesawrapper.c | 18 +++++----- 16 files changed, 140 insertions(+), 250 deletions(-) diff --git a/src/mainboard/amd/dinar/agesawrapper.c b/src/mainboard/amd/dinar/agesawrapper.c index 782512d..f1eb996 100644 --- a/src/mainboard/amd/dinar/agesawrapper.c +++ b/src/mainboard/amd/dinar/agesawrapper.c @@ -78,7 +78,7 @@ GetEndBusNum ( return Index; } -static UINT32 amdinitcpuio(VOID) +static UINT32 amdinitcpuio(void) { AGESA_STATUS Status; UINT64 MsrReg; @@ -198,9 +198,7 @@ static UINT32 amdinitcpuio(VOID) return Status; } -AGESA_STATUS agesawrapper_amdinitmmio ( - VOID - ) +AGESA_STATUS agesawrapper_amdinitmmio (void) { AGESA_STATUS Status; UINT64 MsrReg; @@ -250,9 +248,7 @@ AGESA_STATUS agesawrapper_amdinitmmio ( return Status; } -AGESA_STATUS agesawrapper_amdinitreset ( - VOID - ) +AGESA_STATUS agesawrapper_amdinitreset (void) { AGESA_STATUS status; #if (defined AGESA_ENTRY_INIT_RESET) && (AGESA_ENTRY_INIT_RESET == TRUE) @@ -292,9 +288,7 @@ AGESA_STATUS agesawrapper_amdinitreset ( return status; } -AGESA_STATUS agesawrapper_amdinitearly ( - VOID - ) +AGESA_STATUS agesawrapper_amdinitearly (void) { AGESA_STATUS status; AMD_INTERFACE_PARAMS AmdParamStruct; @@ -351,9 +345,7 @@ OemCustomizeInitPost ( InitPost->MemConfig.UmaSize = 0xE0-0xC0; } -AGESA_STATUS agesawrapper_amdinitpost ( - VOID - ) +AGESA_STATUS agesawrapper_amdinitpost (void) { AGESA_STATUS status; AMD_INTERFACE_PARAMS AmdParamStruct; @@ -385,9 +377,7 @@ AGESA_STATUS agesawrapper_amdinitpost ( return status; } -AGESA_STATUS agesawrapper_amdinitenv ( - VOID - ) +AGESA_STATUS agesawrapper_amdinitenv (void) { AGESA_STATUS status; AMD_INTERFACE_PARAMS AmdParamStruct; @@ -439,9 +429,7 @@ agesawrapper_getlateinitptr ( } } -AGESA_STATUS agesawrapper_amdinitmid ( - VOID - ) +AGESA_STATUS agesawrapper_amdinitmid (void) { AGESA_STATUS status; AMD_INTERFACE_PARAMS AmdParamStruct; @@ -471,7 +459,7 @@ AGESA_STATUS agesawrapper_amdinitmid ( return status; } -AGESA_STATUS agesawrapper_amdinitlate(VOID) +AGESA_STATUS agesawrapper_amdinitlate(void) { AGESA_STATUS Status; AMD_INTERFACE_PARAMS AmdParamStruct; @@ -546,9 +534,7 @@ AGESA_STATUS agesawrapper_amdlaterunaptask (UINT32 Func, UINT32 Data, VOID *Conf return Status; } -AGESA_STATUS agesawrapper_amdreadeventlog ( - VOID - ) +AGESA_STATUS agesawrapper_amdreadeventlog (void) { AGESA_STATUS Status; EVENT_PARAMS AmdEventParams; diff --git a/src/mainboard/amd/olivehill/agesawrapper.c b/src/mainboard/amd/olivehill/agesawrapper.c index f4ea628..1cf6c2e 100644 --- a/src/mainboard/amd/olivehill/agesawrapper.c +++ b/src/mainboard/amd/olivehill/agesawrapper.c @@ -56,9 +56,7 @@ VOID *AcpiWheaCmc = NULL; VOID *AcpiAlib = NULL; VOID *AcpiIvrs = NULL; -AGESA_STATUS agesawrapper_amdinitcpuio ( - VOID - ) +AGESA_STATUS agesawrapper_amdinitcpuio (void) { AGESA_STATUS Status; UINT64 MsrReg; @@ -104,9 +102,7 @@ AGESA_STATUS agesawrapper_amdinitcpuio ( return Status; } -AGESA_STATUS agesawrapper_amdinitmmio ( - VOID - ) +AGESA_STATUS agesawrapper_amdinitmmio (void) { AGESA_STATUS Status; UINT64 MsrReg; @@ -143,9 +139,7 @@ AGESA_STATUS agesawrapper_amdinitmmio ( return Status; } -AGESA_STATUS agesawrapper_amdinitreset ( - VOID - ) +AGESA_STATUS agesawrapper_amdinitreset (void) { AGESA_STATUS status; AMD_INTERFACE_PARAMS AmdParamStruct; @@ -182,9 +176,7 @@ AGESA_STATUS agesawrapper_amdinitreset ( return status; } -AGESA_STATUS agesawrapper_amdinitearly ( - VOID - ) +AGESA_STATUS agesawrapper_amdinitearly (void) { AGESA_STATUS status; AMD_INTERFACE_PARAMS AmdParamStruct; @@ -213,9 +205,7 @@ AGESA_STATUS agesawrapper_amdinitearly ( return status; } -AGESA_STATUS agesawrapper_amdinitpost ( - VOID - ) +AGESA_STATUS agesawrapper_amdinitpost (void) { AGESA_STATUS status; AMD_INTERFACE_PARAMS AmdParamStruct; @@ -244,9 +234,7 @@ AGESA_STATUS agesawrapper_amdinitpost ( return status; } -AGESA_STATUS agesawrapper_amdinitenv ( - VOID - ) +AGESA_STATUS agesawrapper_amdinitenv (void) { AGESA_STATUS status; AMD_INTERFACE_PARAMS AmdParamStruct; @@ -303,9 +291,7 @@ agesawrapper_getlateinitptr ( } } -AGESA_STATUS agesawrapper_amdinitmid ( - VOID - ) +AGESA_STATUS agesawrapper_amdinitmid (void) { AGESA_STATUS status; AMD_INTERFACE_PARAMS AmdParamStruct; @@ -335,9 +321,7 @@ AGESA_STATUS agesawrapper_amdinitmid ( return status; } -AGESA_STATUS agesawrapper_amdinitlate ( - VOID - ) +AGESA_STATUS agesawrapper_amdinitlate (void) { AGESA_STATUS Status; AMD_INTERFACE_PARAMS AmdParamStruct; @@ -417,7 +401,7 @@ AGESA_STATUS agesawrapper_amdlaterunaptask ( } -AGESA_STATUS agesawrapper_amdinitresume(VOID) +AGESA_STATUS agesawrapper_amdinitresume(void) { AGESA_STATUS status; AMD_INTERFACE_PARAMS AmdParamStruct; @@ -455,7 +439,7 @@ AGESA_STATUS agesawrapper_amdinitresume(VOID) } #ifndef __PRE_RAM__ -AGESA_STATUS agesawrapper_fchs3earlyrestore (VOID) +AGESA_STATUS agesawrapper_fchs3earlyrestore (void) { AGESA_STATUS status = AGESA_SUCCESS; @@ -478,7 +462,7 @@ AGESA_STATUS agesawrapper_fchs3earlyrestore (VOID) } #endif -AGESA_STATUS agesawrapper_amds3laterestore (VOID) +AGESA_STATUS agesawrapper_amds3laterestore (void) { AGESA_STATUS Status; AMD_INTERFACE_PARAMS AmdInterfaceParams; @@ -521,7 +505,7 @@ AGESA_STATUS agesawrapper_amds3laterestore (VOID) extern UINT8 picr_data[0x54], intr_data[0x54]; -AGESA_STATUS agesawrapper_fchs3laterestore (VOID) +AGESA_STATUS agesawrapper_fchs3laterestore (void) { AGESA_STATUS status = AGESA_SUCCESS; @@ -557,7 +541,7 @@ AGESA_STATUS agesawrapper_fchs3laterestore (VOID) #ifndef __PRE_RAM__ -AGESA_STATUS agesawrapper_amdS3Save(VOID) +AGESA_STATUS agesawrapper_amdS3Save(void) { AGESA_STATUS Status; AMD_S3SAVE_PARAMS *AmdS3SaveParamsPtr; diff --git a/src/mainboard/amd/olivehill/agesawrapper.h b/src/mainboard/amd/olivehill/agesawrapper.h index f826d80..038895a 100644 --- a/src/mainboard/amd/olivehill/agesawrapper.h +++ b/src/mainboard/amd/olivehill/agesawrapper.h @@ -51,11 +51,11 @@ AGESA_STATUS agesawrapper_amdinitmmio (void); AGESA_STATUS agesawrapper_amdinitcpuio (void); void *agesawrapper_getlateinitptr (int pick); AGESA_STATUS agesawrapper_amdlaterunaptask (UINT32 Func, UINT32 Data, void *ConfigPtr); -AGESA_STATUS agesawrapper_amdS3Save(VOID); -AGESA_STATUS agesawrapper_amdinitresume (VOID); -AGESA_STATUS agesawrapper_amds3laterestore (VOID); +AGESA_STATUS agesawrapper_amdS3Save(void); +AGESA_STATUS agesawrapper_amdinitresume (void); +AGESA_STATUS agesawrapper_amds3laterestore (void); -AGESA_STATUS agesawrapper_fchs3earlyrestore (VOID); -AGESA_STATUS agesawrapper_fchs3laterestore (VOID); +AGESA_STATUS agesawrapper_fchs3earlyrestore (void); +AGESA_STATUS agesawrapper_fchs3laterestore (void); #endif /* _AGESAWRAPPER_H_ */ diff --git a/src/mainboard/amd/parmer/agesawrapper.c b/src/mainboard/amd/parmer/agesawrapper.c index c011242..728f5d3 100644 --- a/src/mainboard/amd/parmer/agesawrapper.c +++ b/src/mainboard/amd/parmer/agesawrapper.c @@ -56,9 +56,7 @@ VOID *AcpiWheaCmc = NULL; VOID *AcpiAlib = NULL; VOID *AcpiIvrs = NULL; -AGESA_STATUS agesawrapper_amdinitcpuio ( - VOID - ) +AGESA_STATUS agesawrapper_amdinitcpuio (void) { AGESA_STATUS Status; UINT64 MsrReg; @@ -104,9 +102,7 @@ AGESA_STATUS agesawrapper_amdinitcpuio ( return Status; } -AGESA_STATUS agesawrapper_amdinitmmio ( - VOID - ) +AGESA_STATUS agesawrapper_amdinitmmio (void) { AGESA_STATUS Status; UINT64 MsrReg; @@ -143,9 +139,7 @@ AGESA_STATUS agesawrapper_amdinitmmio ( return Status; } -AGESA_STATUS agesawrapper_amdinitreset ( - VOID - ) +AGESA_STATUS agesawrapper_amdinitreset (void) { AGESA_STATUS status; AMD_INTERFACE_PARAMS AmdParamStruct; @@ -182,9 +176,7 @@ AGESA_STATUS agesawrapper_amdinitreset ( return status; } -AGESA_STATUS agesawrapper_amdinitearly ( - VOID - ) +AGESA_STATUS agesawrapper_amdinitearly (void) { AGESA_STATUS status; AMD_INTERFACE_PARAMS AmdParamStruct; @@ -213,9 +205,7 @@ AGESA_STATUS agesawrapper_amdinitearly ( return status; } -AGESA_STATUS agesawrapper_amdinitpost ( - VOID - ) +AGESA_STATUS agesawrapper_amdinitpost (void) { AGESA_STATUS status; AMD_INTERFACE_PARAMS AmdParamStruct; @@ -245,9 +235,7 @@ AGESA_STATUS agesawrapper_amdinitpost ( return status; } -AGESA_STATUS agesawrapper_amdinitenv ( - VOID - ) +AGESA_STATUS agesawrapper_amdinitenv (void) { AGESA_STATUS status; AMD_INTERFACE_PARAMS AmdParamStruct; @@ -304,9 +292,7 @@ agesawrapper_getlateinitptr ( } } -AGESA_STATUS agesawrapper_amdinitmid ( - VOID - ) +AGESA_STATUS agesawrapper_amdinitmid (void) { AGESA_STATUS status; AMD_INTERFACE_PARAMS AmdParamStruct; @@ -336,9 +322,7 @@ AGESA_STATUS agesawrapper_amdinitmid ( return status; } -AGESA_STATUS agesawrapper_amdinitlate ( - VOID - ) +AGESA_STATUS agesawrapper_amdinitlate (void) { AGESA_STATUS Status; AMD_INTERFACE_PARAMS AmdParamStruct; @@ -418,7 +402,7 @@ AGESA_STATUS agesawrapper_amdlaterunaptask ( } -AGESA_STATUS agesawrapper_amdinitresume(VOID) +AGESA_STATUS agesawrapper_amdinitresume(void) { AGESA_STATUS status; AMD_INTERFACE_PARAMS AmdParamStruct; @@ -456,7 +440,7 @@ AGESA_STATUS agesawrapper_amdinitresume(VOID) } #ifndef __PRE_RAM__ -AGESA_STATUS agesawrapper_fchs3earlyrestore (VOID) +AGESA_STATUS agesawrapper_fchs3earlyrestore (void) { AGESA_STATUS status = AGESA_SUCCESS; @@ -480,7 +464,7 @@ AGESA_STATUS agesawrapper_fchs3earlyrestore (VOID) } #endif -AGESA_STATUS agesawrapper_amds3laterestore (VOID) +AGESA_STATUS agesawrapper_amds3laterestore (void) { AGESA_STATUS Status; AMD_INTERFACE_PARAMS AmdInterfaceParams; @@ -523,7 +507,7 @@ AGESA_STATUS agesawrapper_amds3laterestore (VOID) extern UINT8 picr_data[0x54], intr_data[0x54]; -AGESA_STATUS agesawrapper_fchs3laterestore (VOID) +AGESA_STATUS agesawrapper_fchs3laterestore (void) { AGESA_STATUS status = AGESA_SUCCESS; @@ -560,7 +544,7 @@ AGESA_STATUS agesawrapper_fchs3laterestore (VOID) #ifndef __PRE_RAM__ -AGESA_STATUS agesawrapper_amdS3Save(VOID) +AGESA_STATUS agesawrapper_amdS3Save(void) { AGESA_STATUS Status; AMD_S3SAVE_PARAMS *AmdS3SaveParamsPtr; diff --git a/src/mainboard/amd/parmer/agesawrapper.h b/src/mainboard/amd/parmer/agesawrapper.h index f826d80..038895a 100644 --- a/src/mainboard/amd/parmer/agesawrapper.h +++ b/src/mainboard/amd/parmer/agesawrapper.h @@ -51,11 +51,11 @@ AGESA_STATUS agesawrapper_amdinitmmio (void); AGESA_STATUS agesawrapper_amdinitcpuio (void); void *agesawrapper_getlateinitptr (int pick); AGESA_STATUS agesawrapper_amdlaterunaptask (UINT32 Func, UINT32 Data, void *ConfigPtr); -AGESA_STATUS agesawrapper_amdS3Save(VOID); -AGESA_STATUS agesawrapper_amdinitresume (VOID); -AGESA_STATUS agesawrapper_amds3laterestore (VOID); +AGESA_STATUS agesawrapper_amdS3Save(void); +AGESA_STATUS agesawrapper_amdinitresume (void); +AGESA_STATUS agesawrapper_amds3laterestore (void); -AGESA_STATUS agesawrapper_fchs3earlyrestore (VOID); -AGESA_STATUS agesawrapper_fchs3laterestore (VOID); +AGESA_STATUS agesawrapper_fchs3earlyrestore (void); +AGESA_STATUS agesawrapper_fchs3laterestore (void); #endif /* _AGESAWRAPPER_H_ */ diff --git a/src/mainboard/amd/thatcher/agesawrapper.c b/src/mainboard/amd/thatcher/agesawrapper.c index 74a2321..1897dff 100644 --- a/src/mainboard/amd/thatcher/agesawrapper.c +++ b/src/mainboard/amd/thatcher/agesawrapper.c @@ -56,9 +56,7 @@ VOID *AcpiWheaCmc = NULL; VOID *AcpiAlib = NULL; VOID *AcpiIvrs = NULL; -AGESA_STATUS agesawrapper_amdinitcpuio ( - VOID - ) +AGESA_STATUS agesawrapper_amdinitcpuio (void) { AGESA_STATUS Status; UINT64 MsrReg; @@ -104,9 +102,7 @@ AGESA_STATUS agesawrapper_amdinitcpuio ( return Status; } -AGESA_STATUS agesawrapper_amdinitmmio ( - VOID - ) +AGESA_STATUS agesawrapper_amdinitmmio (void) { AGESA_STATUS Status; UINT64 MsrReg; @@ -143,9 +139,7 @@ AGESA_STATUS agesawrapper_amdinitmmio ( return Status; } -AGESA_STATUS agesawrapper_amdinitreset ( - VOID - ) +AGESA_STATUS agesawrapper_amdinitreset (void) { AGESA_STATUS status; AMD_INTERFACE_PARAMS AmdParamStruct; @@ -180,9 +174,7 @@ AGESA_STATUS agesawrapper_amdinitreset ( return status; } -AGESA_STATUS agesawrapper_amdinitearly ( - VOID - ) +AGESA_STATUS agesawrapper_amdinitearly (void) { AGESA_STATUS status; AMD_INTERFACE_PARAMS AmdParamStruct; @@ -211,9 +203,7 @@ AGESA_STATUS agesawrapper_amdinitearly ( return status; } -AGESA_STATUS agesawrapper_amdinitpost ( - VOID - ) +AGESA_STATUS agesawrapper_amdinitpost (void) { AGESA_STATUS status; AMD_INTERFACE_PARAMS AmdParamStruct; @@ -242,9 +232,7 @@ AGESA_STATUS agesawrapper_amdinitpost ( return status; } -AGESA_STATUS agesawrapper_amdinitenv ( - VOID - ) +AGESA_STATUS agesawrapper_amdinitenv (void) { AGESA_STATUS status; AMD_INTERFACE_PARAMS AmdParamStruct; @@ -301,9 +289,7 @@ agesawrapper_getlateinitptr ( } } -AGESA_STATUS agesawrapper_amdinitmid ( - VOID - ) +AGESA_STATUS agesawrapper_amdinitmid (void) { AGESA_STATUS status; AMD_INTERFACE_PARAMS AmdParamStruct; @@ -333,9 +319,7 @@ AGESA_STATUS agesawrapper_amdinitmid ( return status; } -AGESA_STATUS agesawrapper_amdinitlate ( - VOID - ) +AGESA_STATUS agesawrapper_amdinitlate (void) { AGESA_STATUS Status; AMD_INTERFACE_PARAMS AmdParamStruct; @@ -415,7 +399,7 @@ AGESA_STATUS agesawrapper_amdlaterunaptask ( } -AGESA_STATUS agesawrapper_amdinitresume(VOID) +AGESA_STATUS agesawrapper_amdinitresume(void) { AGESA_STATUS status; AMD_INTERFACE_PARAMS AmdParamStruct; @@ -455,7 +439,7 @@ AGESA_STATUS agesawrapper_amdinitresume(VOID) } #ifndef __PRE_RAM__ -AGESA_STATUS agesawrapper_fchs3earlyrestore (VOID) +AGESA_STATUS agesawrapper_fchs3earlyrestore (void) { AGESA_STATUS status = AGESA_SUCCESS; @@ -478,7 +462,7 @@ AGESA_STATUS agesawrapper_fchs3earlyrestore (VOID) } #endif -AGESA_STATUS agesawrapper_amds3laterestore (VOID) +AGESA_STATUS agesawrapper_amds3laterestore (void) { AGESA_STATUS Status; AMD_INTERFACE_PARAMS AmdInterfaceParams; @@ -523,7 +507,7 @@ AGESA_STATUS agesawrapper_amds3laterestore (VOID) extern UINT8 picr_data[0x54], intr_data[0x54]; -AGESA_STATUS agesawrapper_fchs3laterestore (VOID) +AGESA_STATUS agesawrapper_fchs3laterestore (void) { AGESA_STATUS status = AGESA_SUCCESS; @@ -559,7 +543,7 @@ AGESA_STATUS agesawrapper_fchs3laterestore (VOID) #ifndef __PRE_RAM__ -AGESA_STATUS agesawrapper_amdS3Save(VOID) +AGESA_STATUS agesawrapper_amdS3Save(void) { AGESA_STATUS Status; AMD_S3SAVE_PARAMS *AmdS3SaveParamsPtr; diff --git a/src/mainboard/amd/thatcher/agesawrapper.h b/src/mainboard/amd/thatcher/agesawrapper.h index f826d80..038895a 100644 --- a/src/mainboard/amd/thatcher/agesawrapper.h +++ b/src/mainboard/amd/thatcher/agesawrapper.h @@ -51,11 +51,11 @@ AGESA_STATUS agesawrapper_amdinitmmio (void); AGESA_STATUS agesawrapper_amdinitcpuio (void); void *agesawrapper_getlateinitptr (int pick); AGESA_STATUS agesawrapper_amdlaterunaptask (UINT32 Func, UINT32 Data, void *ConfigPtr); -AGESA_STATUS agesawrapper_amdS3Save(VOID); -AGESA_STATUS agesawrapper_amdinitresume (VOID); -AGESA_STATUS agesawrapper_amds3laterestore (VOID); +AGESA_STATUS agesawrapper_amdS3Save(void); +AGESA_STATUS agesawrapper_amdinitresume (void); +AGESA_STATUS agesawrapper_amds3laterestore (void); -AGESA_STATUS agesawrapper_fchs3earlyrestore (VOID); -AGESA_STATUS agesawrapper_fchs3laterestore (VOID); +AGESA_STATUS agesawrapper_fchs3earlyrestore (void); +AGESA_STATUS agesawrapper_fchs3laterestore (void); #endif /* _AGESAWRAPPER_H_ */ diff --git a/src/mainboard/asrock/imb-a180/agesawrapper.c b/src/mainboard/asrock/imb-a180/agesawrapper.c index fcb9827..1e0999e 100644 --- a/src/mainboard/asrock/imb-a180/agesawrapper.c +++ b/src/mainboard/asrock/imb-a180/agesawrapper.c @@ -85,9 +85,7 @@ VOID *AcpiIvrs = NULL; * L O C A L F U N C T I O N S *--------------------------------------------------------------------------------------- */ -AGESA_STATUS agesawrapper_amdinitcpuio ( - VOID - ) +AGESA_STATUS agesawrapper_amdinitcpuio (void) { AGESA_STATUS Status; UINT64 MsrReg; @@ -133,9 +131,7 @@ AGESA_STATUS agesawrapper_amdinitcpuio ( return Status; } -AGESA_STATUS agesawrapper_amdinitmmio ( - VOID - ) +AGESA_STATUS agesawrapper_amdinitmmio (void) { AGESA_STATUS Status; UINT64 MsrReg; @@ -172,9 +168,7 @@ AGESA_STATUS agesawrapper_amdinitmmio ( return Status; } -AGESA_STATUS agesawrapper_amdinitreset ( - VOID - ) +AGESA_STATUS agesawrapper_amdinitreset (void) { AGESA_STATUS status; AMD_INTERFACE_PARAMS AmdParamStruct; @@ -211,9 +205,7 @@ AGESA_STATUS agesawrapper_amdinitreset ( return status; } -AGESA_STATUS agesawrapper_amdinitearly ( - VOID - ) +AGESA_STATUS agesawrapper_amdinitearly (void) { AGESA_STATUS status; AMD_INTERFACE_PARAMS AmdParamStruct; @@ -242,9 +234,7 @@ AGESA_STATUS agesawrapper_amdinitearly ( return status; } -AGESA_STATUS agesawrapper_amdinitpost ( - VOID - ) +AGESA_STATUS agesawrapper_amdinitpost (void) { AGESA_STATUS status; AMD_INTERFACE_PARAMS AmdParamStruct; @@ -273,9 +263,7 @@ AGESA_STATUS agesawrapper_amdinitpost ( return status; } -AGESA_STATUS agesawrapper_amdinitenv ( - VOID - ) +AGESA_STATUS agesawrapper_amdinitenv (void) { AGESA_STATUS status; AMD_INTERFACE_PARAMS AmdParamStruct; @@ -332,9 +320,7 @@ agesawrapper_getlateinitptr ( } } -AGESA_STATUS agesawrapper_amdinitmid ( - VOID - ) +AGESA_STATUS agesawrapper_amdinitmid (void) { AGESA_STATUS status; AMD_INTERFACE_PARAMS AmdParamStruct; @@ -364,9 +350,7 @@ AGESA_STATUS agesawrapper_amdinitmid ( return status; } -AGESA_STATUS agesawrapper_amdinitlate ( - VOID - ) +AGESA_STATUS agesawrapper_amdinitlate (void) { AGESA_STATUS Status; AMD_INTERFACE_PARAMS AmdParamStruct; @@ -446,7 +430,7 @@ AGESA_STATUS agesawrapper_amdlaterunaptask ( } -AGESA_STATUS agesawrapper_amdinitresume(VOID) +AGESA_STATUS agesawrapper_amdinitresume(void) { AGESA_STATUS status; AMD_INTERFACE_PARAMS AmdParamStruct; @@ -484,7 +468,7 @@ AGESA_STATUS agesawrapper_amdinitresume(VOID) } #ifndef __PRE_RAM__ -AGESA_STATUS agesawrapper_fchs3earlyrestore (VOID) +AGESA_STATUS agesawrapper_fchs3earlyrestore (void) { AGESA_STATUS status = AGESA_SUCCESS; @@ -507,7 +491,7 @@ AGESA_STATUS agesawrapper_fchs3earlyrestore (VOID) } #endif -AGESA_STATUS agesawrapper_amds3laterestore (VOID) +AGESA_STATUS agesawrapper_amds3laterestore (void) { AGESA_STATUS Status; AMD_INTERFACE_PARAMS AmdInterfaceParams; @@ -550,7 +534,7 @@ AGESA_STATUS agesawrapper_amds3laterestore (VOID) extern UINT8 picr_data[0x54], intr_data[0x54]; -AGESA_STATUS agesawrapper_fchs3laterestore (VOID) +AGESA_STATUS agesawrapper_fchs3laterestore (void) { AGESA_STATUS status = AGESA_SUCCESS; @@ -586,7 +570,7 @@ AGESA_STATUS agesawrapper_fchs3laterestore (VOID) #ifndef __PRE_RAM__ -AGESA_STATUS agesawrapper_amdS3Save(VOID) +AGESA_STATUS agesawrapper_amdS3Save(void) { AGESA_STATUS Status; AMD_S3SAVE_PARAMS *AmdS3SaveParamsPtr; diff --git a/src/mainboard/asrock/imb-a180/agesawrapper.h b/src/mainboard/asrock/imb-a180/agesawrapper.h index 60ec551..97cb8c5 100644 --- a/src/mainboard/asrock/imb-a180/agesawrapper.h +++ b/src/mainboard/asrock/imb-a180/agesawrapper.h @@ -80,11 +80,11 @@ AGESA_STATUS agesawrapper_amdinitmmio (void); AGESA_STATUS agesawrapper_amdinitcpuio (void); void *agesawrapper_getlateinitptr (int pick); AGESA_STATUS agesawrapper_amdlaterunaptask (UINT32 Func, UINT32 Data, void *ConfigPtr); -AGESA_STATUS agesawrapper_amdS3Save(VOID); -AGESA_STATUS agesawrapper_amdinitresume (VOID); -AGESA_STATUS agesawrapper_amds3laterestore (VOID); +AGESA_STATUS agesawrapper_amdS3Save(void); +AGESA_STATUS agesawrapper_amdinitresume (void); +AGESA_STATUS agesawrapper_amds3laterestore (void); -AGESA_STATUS agesawrapper_fchs3earlyrestore (VOID); -AGESA_STATUS agesawrapper_fchs3laterestore (VOID); +AGESA_STATUS agesawrapper_fchs3earlyrestore (void); +AGESA_STATUS agesawrapper_fchs3laterestore (void); #endif diff --git a/src/mainboard/asus/f2a85-m/agesawrapper.c b/src/mainboard/asus/f2a85-m/agesawrapper.c index 46d24ad..897449e 100644 --- a/src/mainboard/asus/f2a85-m/agesawrapper.c +++ b/src/mainboard/asus/f2a85-m/agesawrapper.c @@ -76,9 +76,7 @@ VOID *AcpiIvrs = NULL; * L O C A L F U N C T I O N S *--------------------------------------------------------------------------------------- */ -AGESA_STATUS agesawrapper_amdinitcpuio ( - VOID - ) +AGESA_STATUS agesawrapper_amdinitcpuio (void) { AGESA_STATUS Status; UINT64 MsrReg; @@ -124,9 +122,7 @@ AGESA_STATUS agesawrapper_amdinitcpuio ( return Status; } -AGESA_STATUS agesawrapper_amdinitmmio ( - VOID - ) +AGESA_STATUS agesawrapper_amdinitmmio (void) { AGESA_STATUS Status; UINT64 MsrReg; @@ -156,9 +152,7 @@ AGESA_STATUS agesawrapper_amdinitmmio ( return Status; } -AGESA_STATUS agesawrapper_amdinitreset ( - VOID - ) +AGESA_STATUS agesawrapper_amdinitreset (void) { AGESA_STATUS status; AMD_INTERFACE_PARAMS AmdParamStruct; @@ -195,9 +189,7 @@ AGESA_STATUS agesawrapper_amdinitreset ( return status; } -AGESA_STATUS agesawrapper_amdinitearly ( - VOID - ) +AGESA_STATUS agesawrapper_amdinitearly (void) { AGESA_STATUS status; AMD_INTERFACE_PARAMS AmdParamStruct; @@ -226,9 +218,7 @@ AGESA_STATUS agesawrapper_amdinitearly ( return status; } -AGESA_STATUS agesawrapper_amdinitpost ( - VOID - ) +AGESA_STATUS agesawrapper_amdinitpost (void) { AGESA_STATUS status; AMD_INTERFACE_PARAMS AmdParamStruct; @@ -257,9 +247,7 @@ AGESA_STATUS agesawrapper_amdinitpost ( return status; } -AGESA_STATUS agesawrapper_amdinitenv ( - VOID - ) +AGESA_STATUS agesawrapper_amdinitenv (void) { AGESA_STATUS status; AMD_INTERFACE_PARAMS AmdParamStruct; @@ -316,9 +304,7 @@ agesawrapper_getlateinitptr ( } } -AGESA_STATUS agesawrapper_amdinitmid ( - VOID - ) +AGESA_STATUS agesawrapper_amdinitmid (void) { AGESA_STATUS status; AMD_INTERFACE_PARAMS AmdParamStruct; @@ -348,9 +334,7 @@ AGESA_STATUS agesawrapper_amdinitmid ( return status; } -AGESA_STATUS agesawrapper_amdinitlate ( - VOID - ) +AGESA_STATUS agesawrapper_amdinitlate (void) { AGESA_STATUS Status; AMD_INTERFACE_PARAMS AmdParamStruct; @@ -430,7 +414,7 @@ AGESA_STATUS agesawrapper_amdlaterunaptask ( } -AGESA_STATUS agesawrapper_amdinitresume(VOID) +AGESA_STATUS agesawrapper_amdinitresume(void) { AGESA_STATUS status; AMD_INTERFACE_PARAMS AmdParamStruct; @@ -470,7 +454,7 @@ AGESA_STATUS agesawrapper_amdinitresume(VOID) } #ifndef __PRE_RAM__ -AGESA_STATUS agesawrapper_fchs3earlyrestore (VOID) +AGESA_STATUS agesawrapper_fchs3earlyrestore (void) { AGESA_STATUS status = AGESA_SUCCESS; @@ -493,7 +477,7 @@ AGESA_STATUS agesawrapper_fchs3earlyrestore (VOID) } #endif -AGESA_STATUS agesawrapper_amds3laterestore (VOID) +AGESA_STATUS agesawrapper_amds3laterestore (void) { AGESA_STATUS Status; AMD_INTERFACE_PARAMS AmdInterfaceParams; @@ -538,7 +522,7 @@ AGESA_STATUS agesawrapper_amds3laterestore (VOID) extern UINT8 picr_data[0x54], intr_data[0x54]; -AGESA_STATUS agesawrapper_fchs3laterestore (VOID) +AGESA_STATUS agesawrapper_fchs3laterestore (void) { AGESA_STATUS status = AGESA_SUCCESS; @@ -574,7 +558,7 @@ AGESA_STATUS agesawrapper_fchs3laterestore (VOID) #ifndef __PRE_RAM__ -AGESA_STATUS agesawrapper_amdS3Save(VOID) +AGESA_STATUS agesawrapper_amdS3Save(void) { AGESA_STATUS Status; AMD_S3SAVE_PARAMS *AmdS3SaveParamsPtr; diff --git a/src/mainboard/asus/f2a85-m/agesawrapper.h b/src/mainboard/asus/f2a85-m/agesawrapper.h index 5294562..3db75e8 100644 --- a/src/mainboard/asus/f2a85-m/agesawrapper.h +++ b/src/mainboard/asus/f2a85-m/agesawrapper.h @@ -79,11 +79,11 @@ AGESA_STATUS agesawrapper_amdinitmmio (void); AGESA_STATUS agesawrapper_amdinitcpuio (void); void *agesawrapper_getlateinitptr (int pick); AGESA_STATUS agesawrapper_amdlaterunaptask (UINT32 Func, UINT32 Data, void *ConfigPtr); -AGESA_STATUS agesawrapper_amdS3Save(VOID); -AGESA_STATUS agesawrapper_amdinitresume (VOID); -AGESA_STATUS agesawrapper_amds3laterestore (VOID); +AGESA_STATUS agesawrapper_amdS3Save(void); +AGESA_STATUS agesawrapper_amdinitresume (void); +AGESA_STATUS agesawrapper_amds3laterestore (void); -AGESA_STATUS agesawrapper_fchs3earlyrestore (VOID); -AGESA_STATUS agesawrapper_fchs3laterestore (VOID); +AGESA_STATUS agesawrapper_fchs3earlyrestore (void); +AGESA_STATUS agesawrapper_fchs3laterestore (void); #endif diff --git a/src/mainboard/hp/pavilion_m6_1035dx/agesawrapper.c b/src/mainboard/hp/pavilion_m6_1035dx/agesawrapper.c index 1e010d2..1c56041 100644 --- a/src/mainboard/hp/pavilion_m6_1035dx/agesawrapper.c +++ b/src/mainboard/hp/pavilion_m6_1035dx/agesawrapper.c @@ -116,9 +116,7 @@ uint32_t agesawrapper_amdinitcpuio(void) return AGESA_SUCCESS; } -AGESA_STATUS agesawrapper_amdinitmmio ( - VOID - ) +AGESA_STATUS agesawrapper_amdinitmmio (void) { AGESA_STATUS Status; UINT64 MsrReg; @@ -155,9 +153,7 @@ AGESA_STATUS agesawrapper_amdinitmmio ( return Status; } -AGESA_STATUS agesawrapper_amdinitreset ( - VOID - ) +AGESA_STATUS agesawrapper_amdinitreset (void) { AGESA_STATUS status; AMD_INTERFACE_PARAMS AmdParamStruct; @@ -194,9 +190,7 @@ AGESA_STATUS agesawrapper_amdinitreset ( return status; } -AGESA_STATUS agesawrapper_amdinitearly ( - VOID - ) +AGESA_STATUS agesawrapper_amdinitearly (void) { AGESA_STATUS status; AMD_INTERFACE_PARAMS AmdParamStruct; @@ -225,9 +219,7 @@ AGESA_STATUS agesawrapper_amdinitearly ( return status; } -AGESA_STATUS agesawrapper_amdinitpost ( - VOID - ) +AGESA_STATUS agesawrapper_amdinitpost (void) { AGESA_STATUS status; AMD_INTERFACE_PARAMS AmdParamStruct; @@ -256,9 +248,7 @@ AGESA_STATUS agesawrapper_amdinitpost ( return status; } -AGESA_STATUS agesawrapper_amdinitenv ( - VOID - ) +AGESA_STATUS agesawrapper_amdinitenv (void) { AGESA_STATUS status; AMD_INTERFACE_PARAMS AmdParamStruct; @@ -315,9 +305,7 @@ agesawrapper_getlateinitptr ( } } -AGESA_STATUS agesawrapper_amdinitmid ( - VOID - ) +AGESA_STATUS agesawrapper_amdinitmid (void) { AGESA_STATUS status; AMD_INTERFACE_PARAMS AmdParamStruct; @@ -347,9 +335,7 @@ AGESA_STATUS agesawrapper_amdinitmid ( return status; } -AGESA_STATUS agesawrapper_amdinitlate ( - VOID - ) +AGESA_STATUS agesawrapper_amdinitlate (void) { AGESA_STATUS Status; AMD_INTERFACE_PARAMS AmdParamStruct; @@ -429,7 +415,7 @@ AGESA_STATUS agesawrapper_amdlaterunaptask ( } -AGESA_STATUS agesawrapper_amdinitresume(VOID) +AGESA_STATUS agesawrapper_amdinitresume(void) { AGESA_STATUS status; AMD_INTERFACE_PARAMS AmdParamStruct; @@ -467,7 +453,7 @@ AGESA_STATUS agesawrapper_amdinitresume(VOID) } #ifndef __PRE_RAM__ -AGESA_STATUS agesawrapper_fchs3earlyrestore (VOID) +AGESA_STATUS agesawrapper_fchs3earlyrestore (void) { AGESA_STATUS status = AGESA_SUCCESS; @@ -491,7 +477,7 @@ AGESA_STATUS agesawrapper_fchs3earlyrestore (VOID) } #endif -AGESA_STATUS agesawrapper_amds3laterestore (VOID) +AGESA_STATUS agesawrapper_amds3laterestore (void) { AGESA_STATUS Status; AMD_INTERFACE_PARAMS AmdInterfaceParams; @@ -534,7 +520,7 @@ AGESA_STATUS agesawrapper_amds3laterestore (VOID) extern UINT8 picr_data[0x54], intr_data[0x54]; -AGESA_STATUS agesawrapper_fchs3laterestore (VOID) +AGESA_STATUS agesawrapper_fchs3laterestore (void) { AGESA_STATUS status = AGESA_SUCCESS; @@ -571,7 +557,7 @@ AGESA_STATUS agesawrapper_fchs3laterestore (VOID) #ifndef __PRE_RAM__ -AGESA_STATUS agesawrapper_amdS3Save(VOID) +AGESA_STATUS agesawrapper_amdS3Save(void) { AGESA_STATUS Status; AMD_S3SAVE_PARAMS *AmdS3SaveParamsPtr; diff --git a/src/mainboard/hp/pavilion_m6_1035dx/agesawrapper.h b/src/mainboard/hp/pavilion_m6_1035dx/agesawrapper.h index 96ed141..3c07e58 100644 --- a/src/mainboard/hp/pavilion_m6_1035dx/agesawrapper.h +++ b/src/mainboard/hp/pavilion_m6_1035dx/agesawrapper.h @@ -79,11 +79,11 @@ AGESA_STATUS agesawrapper_amdinitmmio (void); uint32_t agesawrapper_amdinitcpuio (void); void *agesawrapper_getlateinitptr (int pick); AGESA_STATUS agesawrapper_amdlaterunaptask (UINT32 Func, UINT32 Data, void *ConfigPtr); -AGESA_STATUS agesawrapper_amdS3Save(VOID); -AGESA_STATUS agesawrapper_amdinitresume (VOID); -AGESA_STATUS agesawrapper_amds3laterestore (VOID); +AGESA_STATUS agesawrapper_amdS3Save(void); +AGESA_STATUS agesawrapper_amdinitresume (void); +AGESA_STATUS agesawrapper_amds3laterestore (void); -AGESA_STATUS agesawrapper_fchs3earlyrestore (VOID); -AGESA_STATUS agesawrapper_fchs3laterestore (VOID); +AGESA_STATUS agesawrapper_fchs3earlyrestore (void); +AGESA_STATUS agesawrapper_fchs3laterestore (void); #endif diff --git a/src/mainboard/supermicro/h8qgi/agesawrapper.c b/src/mainboard/supermicro/h8qgi/agesawrapper.c index 24e3ee7..9002858 100644 --- a/src/mainboard/supermicro/h8qgi/agesawrapper.c +++ b/src/mainboard/supermicro/h8qgi/agesawrapper.c @@ -78,7 +78,7 @@ VOID *AcpiAlib = NULL; */ extern VOID OemCustomizeInitEarly(IN OUT AMD_EARLY_PARAMS *InitEarly); -static AGESA_STATUS agesawrapper_amdinitcpuio(VOID) +static AGESA_STATUS agesawrapper_amdinitcpuio(void) { AGESA_STATUS Status; UINT32 PciData; @@ -172,7 +172,7 @@ static AGESA_STATUS agesawrapper_amdinitcpuio(VOID) return Status; } -AGESA_STATUS agesawrapper_amdinitmmio(VOID) +AGESA_STATUS agesawrapper_amdinitmmio(void) { AGESA_STATUS Status; UINT64 MsrReg; @@ -202,7 +202,7 @@ AGESA_STATUS agesawrapper_amdinitmmio(VOID) return Status; } -UINT32 agesawrapper_amdinitreset(VOID) +UINT32 agesawrapper_amdinitreset(void) { AGESA_STATUS status = AGESA_SUCCESS; AMD_INTERFACE_PARAMS AmdParamStruct; @@ -244,7 +244,7 @@ UINT32 agesawrapper_amdinitreset(VOID) return status; } -AGESA_STATUS agesawrapper_amdinitearly(VOID) +AGESA_STATUS agesawrapper_amdinitearly(void) { AGESA_STATUS status; AMD_INTERFACE_PARAMS AmdParamStruct; @@ -283,7 +283,7 @@ AGESA_STATUS agesawrapper_amdinitearly(VOID) return status; } -AGESA_STATUS agesawrapper_amdinitpost(VOID) +AGESA_STATUS agesawrapper_amdinitpost(void) { AGESA_STATUS status; AMD_INTERFACE_PARAMS AmdParamStruct; @@ -324,7 +324,7 @@ AGESA_STATUS agesawrapper_amdinitpost(VOID) return status; } -AGESA_STATUS agesawrapper_amdinitenv(VOID) +AGESA_STATUS agesawrapper_amdinitenv(void) { AGESA_STATUS status; AMD_INTERFACE_PARAMS AmdParamStruct; @@ -382,7 +382,7 @@ VOID * agesawrapper_getlateinitptr(int pick) return NULL; } -AGESA_STATUS agesawrapper_amdinitmid(VOID) +AGESA_STATUS agesawrapper_amdinitmid(void) { AGESA_STATUS status; AMD_INTERFACE_PARAMS AmdParamStruct; @@ -414,7 +414,7 @@ AGESA_STATUS agesawrapper_amdinitmid(VOID) return status; } -AGESA_STATUS agesawrapper_amdinitlate(VOID) +AGESA_STATUS agesawrapper_amdinitlate(void) { AGESA_STATUS Status; AMD_INTERFACE_PARAMS AmdParamStruct; diff --git a/src/mainboard/supermicro/h8scm/agesawrapper.c b/src/mainboard/supermicro/h8scm/agesawrapper.c index 9679fd9..369cc93 100644 --- a/src/mainboard/supermicro/h8scm/agesawrapper.c +++ b/src/mainboard/supermicro/h8scm/agesawrapper.c @@ -78,7 +78,7 @@ VOID *AcpiAlib = NULL; */ extern VOID OemCustomizeInitEarly(IN OUT AMD_EARLY_PARAMS *InitEarly); -static AGESA_STATUS agesawrapper_amdinitcpuio(VOID) +static AGESA_STATUS agesawrapper_amdinitcpuio(void) { AGESA_STATUS Status; UINT32 PciData; @@ -172,7 +172,7 @@ static AGESA_STATUS agesawrapper_amdinitcpuio(VOID) return Status; } -AGESA_STATUS agesawrapper_amdinitmmio(VOID) +AGESA_STATUS agesawrapper_amdinitmmio(void) { AGESA_STATUS Status; UINT64 MsrReg; @@ -202,7 +202,7 @@ AGESA_STATUS agesawrapper_amdinitmmio(VOID) return Status; } -UINT32 agesawrapper_amdinitreset(VOID) +UINT32 agesawrapper_amdinitreset(void) { AGESA_STATUS status = AGESA_SUCCESS; AMD_INTERFACE_PARAMS AmdParamStruct; @@ -244,7 +244,7 @@ UINT32 agesawrapper_amdinitreset(VOID) return status; } -AGESA_STATUS agesawrapper_amdinitearly(VOID) +AGESA_STATUS agesawrapper_amdinitearly(void) { AGESA_STATUS status; AMD_INTERFACE_PARAMS AmdParamStruct; @@ -283,7 +283,7 @@ AGESA_STATUS agesawrapper_amdinitearly(VOID) return status; } -AGESA_STATUS agesawrapper_amdinitpost(VOID) +AGESA_STATUS agesawrapper_amdinitpost(void) { AGESA_STATUS status; AMD_INTERFACE_PARAMS AmdParamStruct; @@ -324,7 +324,7 @@ AGESA_STATUS agesawrapper_amdinitpost(VOID) return status; } -AGESA_STATUS agesawrapper_amdinitenv(VOID) +AGESA_STATUS agesawrapper_amdinitenv(void) { AGESA_STATUS status; AMD_INTERFACE_PARAMS AmdParamStruct; @@ -382,7 +382,7 @@ VOID * agesawrapper_getlateinitptr(int pick) return NULL; } -AGESA_STATUS agesawrapper_amdinitmid(VOID) +AGESA_STATUS agesawrapper_amdinitmid(void) { AGESA_STATUS status; AMD_INTERFACE_PARAMS AmdParamStruct; @@ -414,7 +414,7 @@ AGESA_STATUS agesawrapper_amdinitmid(VOID) return status; } -AGESA_STATUS agesawrapper_amdinitlate(VOID) +AGESA_STATUS agesawrapper_amdinitlate(void) { AGESA_STATUS Status; AMD_INTERFACE_PARAMS AmdParamStruct; diff --git a/src/mainboard/tyan/s8226/agesawrapper.c b/src/mainboard/tyan/s8226/agesawrapper.c index 9f622be..08e10a7 100644 --- a/src/mainboard/tyan/s8226/agesawrapper.c +++ b/src/mainboard/tyan/s8226/agesawrapper.c @@ -78,7 +78,7 @@ VOID *AcpiAlib = NULL; */ extern VOID OemCustomizeInitEarly(IN OUT AMD_EARLY_PARAMS *InitEarly); -static AGESA_STATUS agesawrapper_amdinitcpuio(VOID) +static AGESA_STATUS agesawrapper_amdinitcpuio(void) { AGESA_STATUS Status; UINT32 PciData; @@ -172,9 +172,7 @@ static AGESA_STATUS agesawrapper_amdinitcpuio(VOID) return Status; } -AGESA_STATUS agesawrapper_amdinitmmio ( - VOID - ) +AGESA_STATUS agesawrapper_amdinitmmio (void) { AGESA_STATUS Status; UINT64 MsrReg; @@ -211,7 +209,7 @@ AGESA_STATUS agesawrapper_amdinitmmio ( return Status; } -UINT32 agesawrapper_amdinitreset(VOID) +UINT32 agesawrapper_amdinitreset(void) { AGESA_STATUS status = AGESA_SUCCESS; AMD_INTERFACE_PARAMS AmdParamStruct; @@ -253,7 +251,7 @@ UINT32 agesawrapper_amdinitreset(VOID) return status; } -AGESA_STATUS agesawrapper_amdinitearly(VOID) +AGESA_STATUS agesawrapper_amdinitearly(void) { AGESA_STATUS status; AMD_INTERFACE_PARAMS AmdParamStruct; @@ -292,7 +290,7 @@ AGESA_STATUS agesawrapper_amdinitearly(VOID) return status; } -AGESA_STATUS agesawrapper_amdinitpost(VOID) +AGESA_STATUS agesawrapper_amdinitpost(void) { AGESA_STATUS status; AMD_INTERFACE_PARAMS AmdParamStruct; @@ -333,7 +331,7 @@ AGESA_STATUS agesawrapper_amdinitpost(VOID) return status; } -AGESA_STATUS agesawrapper_amdinitenv(VOID) +AGESA_STATUS agesawrapper_amdinitenv(void) { AGESA_STATUS status; AMD_INTERFACE_PARAMS AmdParamStruct; @@ -391,7 +389,7 @@ VOID * agesawrapper_getlateinitptr(int pick) return NULL; } -AGESA_STATUS agesawrapper_amdinitmid(VOID) +AGESA_STATUS agesawrapper_amdinitmid(void) { AGESA_STATUS status; AMD_INTERFACE_PARAMS AmdParamStruct; @@ -423,7 +421,7 @@ AGESA_STATUS agesawrapper_amdinitmid(VOID) return status; } -AGESA_STATUS agesawrapper_amdinitlate(VOID) +AGESA_STATUS agesawrapper_amdinitlate(void) { AGESA_STATUS Status; AMD_INTERFACE_PARAMS AmdParamStruct;

1 0

Patch set updated for coreboot: bb22c2e mainboard: Add new board Google Panther
by Paul Menzel 06 Jul '14

06 Jul '14

Paul Menzel (paulepanter(a)users.sourceforge.net) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5990 -gerrit commit bb22c2e1e9262863d64a0ecf050de6236fbab27f Author: Mohammed Habibulla <moch(a)chromium.org> Date: Thu Oct 24 16:44:06 2013 -0700 mainboard: Add new board Google Panther (Panther clone of Ia41af8425ab6c24746253abd025acd3365dd5a18 by reinauer) BUG=chrome-os-partner:23563 TEST=emerge-panther chromeos-coreboot-panther [pg: Drop configs/, which is chromeos stuff, adapted libpayload's config.panther to work with upstream] [pm: Add HAVE_IFD_BIN and HAVE_ME_BIN Kconfig options] [pm: rebase to master branch of coreboot upstream] Change-Id: I50fd5c02da154e424dfefbe2020f4ce7ef9a4f8f Signed-off-by: Matt DeVillier <matt.devillier(a)gmail.com> Signed-off-by: Patrick Georgi <patrick(a)georgi-clan.de> Signed-off-by: Paul Menzel <paulepanter(a)users.sourceforge.net> Reviewed-on: https://chromium-review.googlesource.com/174555 Reviewed-by: Aaron Durbin <adurbin(a)chromium.org> Commit-Queue: Mohammed Habibulla <moch(a)chromium.org> Tested-by: Mohammed Habibulla <moch(a)chromium.org> --- payloads/libpayload/configs/config.panther | 71 +++++ src/mainboard/google/Kconfig | 3 + src/mainboard/google/panther/Kconfig | 57 ++++ src/mainboard/google/panther/Makefile.inc | 25 ++ src/mainboard/google/panther/acpi/chromeos.asl | 23 ++ src/mainboard/google/panther/acpi/ec.asl | 0 .../google/panther/acpi/haswell_pci_irqs.asl | 87 ++++++ src/mainboard/google/panther/acpi/mainboard.asl | 29 ++ src/mainboard/google/panther/acpi/platform.asl | 72 +++++ src/mainboard/google/panther/acpi/superio.asl | 36 +++ src/mainboard/google/panther/acpi/thermal.asl | 274 +++++++++++++++++++ src/mainboard/google/panther/acpi/video.asl | 43 +++ src/mainboard/google/panther/acpi_tables.c | 301 +++++++++++++++++++++ src/mainboard/google/panther/chromeos.c | 117 ++++++++ src/mainboard/google/panther/cmos.layout | 139 ++++++++++ src/mainboard/google/panther/devicetree.cb | 136 ++++++++++ src/mainboard/google/panther/dsdt.asl | 62 +++++ src/mainboard/google/panther/fadt.c | 156 +++++++++++ src/mainboard/google/panther/gpio.h | 124 +++++++++ src/mainboard/google/panther/hda_verb.h | 112 ++++++++ src/mainboard/google/panther/lan.c | 178 ++++++++++++ src/mainboard/google/panther/mainboard.c | 170 ++++++++++++ src/mainboard/google/panther/onboard.h | 9 + src/mainboard/google/panther/romstage.c | 154 +++++++++++ src/mainboard/google/panther/smihandler.c | 161 +++++++++++ src/mainboard/google/panther/thermal.h | 57 ++++ 26 files changed, 2596 insertions(+) diff --git a/payloads/libpayload/configs/config.panther b/payloads/libpayload/configs/config.panther new file mode 100644 index 0000000..005c6eb --- /dev/null +++ b/payloads/libpayload/configs/config.panther @@ -0,0 +1,71 @@ +# +# Automatically generated make config: don't edit +# libpayload version: 0.2.0 +# Thu May 2 16:10:03 2013 +# + +# +# Generic Options +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_OBSOLETE is not set +# CONFIG_DEVELOPER is not set +CONFIG_CHROMEOS=y + +# +# Architecture Options +# +# CONFIG_ARCH_ARMV7 is not set +# CONFIG_ARCH_POWERPC is not set +CONFIG_ARCH_X86=y +# CONFIG_MEMMAP_RAM_ONLY is not set +# CONFIG_MULTIBOOT is not set + +# +# Standard Libraries +# +CONFIG_LIBC=y +# CONFIG_CURSES is not set +CONFIG_CBFS=y +CONFIG_LZMA=y + +# +# Console Options +# +CONFIG_SKIP_CONSOLE_INIT=y +CONFIG_CBMEM_CONSOLE=y +CONFIG_SERIAL_CONSOLE=y +CONFIG_8250_SERIAL_CONSOLE=y +CONFIG_SERIAL_IOBASE=0x3f8 +# CONFIG_SERIAL_SET_SPEED is not set +# CONFIG_SERIAL_ACS_FALLBACK is not set +CONFIG_VIDEO_CONSOLE=y +# CONFIG_VGA_VIDEO_CONSOLE is not set +# CONFIG_GEODELX_VIDEO_CONSOLE is not set +CONFIG_COREBOOT_VIDEO_CONSOLE=y +CONFIG_PC_KEYBOARD=y +CONFIG_PC_KEYBOARD_LAYOUT_US=y +# CONFIG_PC_KEYBOARD_LAYOUT_DE is not set + +# +# Drivers +# +CONFIG_PCI=y +CONFIG_NVRAM=y +# CONFIG_RTC_PORT_EXTENDED_VIA is not set +# CONFIG_SPEAKER is not set +# CONFIG_STORAGE is not set +CONFIG_USB=y +# CONFIG_USB_UHCI is not set +# CONFIG_USB_OHCI is not set +# CONFIG_USB_EHCI is not set +CONFIG_USB_XHCI=y +CONFIG_USB_HID=y +CONFIG_USB_HUB=y +CONFIG_USB_MSC=y +CONFIG_USB_PCI=y +# CONFIG_USB_MEMORY is not set +# CONFIG_BIG_ENDIAN is not set +CONFIG_LITTLE_ENDIAN=y +CONFIG_IO_ADDRESS_SPACE=y +CONFIG_ARCH_SPECIFIC_OPTIONS=y diff --git a/src/mainboard/google/Kconfig b/src/mainboard/google/Kconfig index 85c8592..c456b5a 100644 --- a/src/mainboard/google/Kconfig +++ b/src/mainboard/google/Kconfig @@ -29,6 +29,8 @@ config BOARD_GOOGLE_FALCO bool "Falco" config BOARD_GOOGLE_LINK bool "Link" +config BOARD_GOOGLE_PANTHER + bool "Panther" config BOARD_GOOGLE_PARROT bool "Parrot" config BOARD_GOOGLE_PEPPY @@ -50,6 +52,7 @@ source "src/mainboard/google/bolt/Kconfig" source "src/mainboard/google/butterfly/Kconfig" source "src/mainboard/google/falco/Kconfig" source "src/mainboard/google/link/Kconfig" +source "src/mainboard/google/panther/Kconfig" source "src/mainboard/google/parrot/Kconfig" source "src/mainboard/google/peppy/Kconfig" source "src/mainboard/google/pit/Kconfig" diff --git a/src/mainboard/google/panther/Kconfig b/src/mainboard/google/panther/Kconfig new file mode 100644 index 0000000..4c507c7 --- /dev/null +++ b/src/mainboard/google/panther/Kconfig @@ -0,0 +1,57 @@ +if BOARD_GOOGLE_PANTHER + +config BOARD_SPECIFIC_OPTIONS # dummy + def_bool y + select CPU_INTEL_SOCKET_RPGA989 + select NORTHBRIDGE_INTEL_HASWELL + select SOUTHBRIDGE_INTEL_LYNXPOINT + select INTEL_LYNXPOINT_LP + select BOARD_ROMSIZE_KB_8192 + select SUPERIO_ITE_IT8772F + select VIRTUAL_DEV_SWITCH + select HAVE_ACPI_TABLES + select HAVE_OPTION_TABLE + select HAVE_ACPI_RESUME + select MMCONF_SUPPORT + select HAVE_SMI_HANDLER + select MAINBOARD_HAS_CHROMEOS + select EXTERNAL_MRC_BLOB + select MONOTONIC_TIMER_MSR + +config VBOOT_RAMSTAGE_INDEX + hex + default 0x2 + +config MAINBOARD_DIR + string + default google/panther + +config MAINBOARD_PART_NUMBER + string + default "Panther" + +config MMCONF_BASE_ADDRESS + hex + default 0xf0000000 + +config IRQ_SLOT_COUNT + int + default 18 + +config MAX_CPUS + int + default 8 + +config VGA_BIOS_FILE + string + default "pci8086,0166.rom" + +config HAVE_IFD_BIN + bool + default n + +config HAVE_ME_BIN + bool + default n + +endif diff --git a/src/mainboard/google/panther/Makefile.inc b/src/mainboard/google/panther/Makefile.inc new file mode 100644 index 0000000..1300be6 --- /dev/null +++ b/src/mainboard/google/panther/Makefile.inc @@ -0,0 +1,25 @@ +## +## This file is part of the coreboot project. +## +## Copyright (C) 2012 Google Inc. +## +## This program is free software; you can redistribute it and/or modify +## it under the terms of the GNU General Public License as published by +## the Free Software Foundation; version 2 of the License. +## +## This program is distributed in the hope that it will be useful, +## but WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +## GNU General Public License for more details. +## +## You should have received a copy of the GNU General Public License +## along with this program; if not, write to the Free Software +## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +## + +romstage-$(CONFIG_CHROMEOS) += chromeos.c +ramstage-$(CONFIG_CHROMEOS) += chromeos.c +ramstage-y += lan.c + +smm-$(CONFIG_HAVE_SMI_HANDLER) += smihandler.c + diff --git a/src/mainboard/google/panther/acpi/chromeos.asl b/src/mainboard/google/panther/acpi/chromeos.asl new file mode 100644 index 0000000..0189cfa --- /dev/null +++ b/src/mainboard/google/panther/acpi/chromeos.asl @@ -0,0 +1,23 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2012 Google Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +Name(OIPG, Package() { + Package () { 0x0001, 0, 12, "LynxPoint" }, // recovery button + Package () { 0x0003, 1, 58, "LynxPoint" }, // firmware write protect +}) diff --git a/src/mainboard/google/panther/acpi/ec.asl b/src/mainboard/google/panther/acpi/ec.asl new file mode 100644 index 0000000..e69de29 diff --git a/src/mainboard/google/panther/acpi/haswell_pci_irqs.asl b/src/mainboard/google/panther/acpi/haswell_pci_irqs.asl new file mode 100644 index 0000000..7ebd8e5 --- /dev/null +++ b/src/mainboard/google/panther/acpi/haswell_pci_irqs.asl @@ -0,0 +1,87 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2007-2009 coresystems GmbH + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +/* This is board specific information: IRQ routing for IvyBridge */ + +// PCI Interrupt Routing +Method(_PRT) +{ + If (PICM) { + Return (Package() { + // Onboard graphics (IGD) 0:2.0 + Package() { 0x0002ffff, 0, 0, 16 }, + // Mini-HD Audio 0:3.0 + Package() { 0x0003ffff, 0, 0, 16 }, + // High Definition Audio 0:1b.0 + Package() { 0x001bffff, 0, 0, 22 }, + // PCIe Root Ports 0:1c.x + Package() { 0x001cffff, 0, 0, 16 }, + Package() { 0x001cffff, 1, 0, 17 }, + Package() { 0x001cffff, 2, 0, 18 }, + Package() { 0x001cffff, 3, 0, 19 }, + // EHCI 0:1d.0 + Package() { 0x001dffff, 0, 0, 19 }, + // XHCI 0:14.0 + Package() { 0x0014ffff, 0, 0, 18 }, + // LPC devices 0:1f.0 + Package() { 0x001fffff, 0, 0, 22 }, + Package() { 0x001fffff, 1, 0, 18 }, + Package() { 0x001fffff, 2, 0, 17 }, + Package() { 0x001fffff, 3, 0, 16 }, + // Serial IO 0:15.0 + Package() { 0x0015ffff, 0, 0, 20 }, + Package() { 0x0015ffff, 1, 0, 21 }, + Package() { 0x0015ffff, 2, 0, 21 }, + Package() { 0x0015ffff, 3, 0, 21 }, + // SDIO 0:17.0 + Package() { 0x0017ffff, 0, 0, 23 }, + }) + } Else { + Return (Package() { + // Onboard graphics (IGD) 0:2.0 + Package() { 0x0002ffff, 0, \_SB.PCI0.LPCB.LNKA, 0 }, + // Mini-HD Audio 0:3.0 + Package() { 0x0003ffff, 0, \_SB.PCI0.LPCB.LNKA, 0 }, + // High Definition Audio 0:1b.0 + Package() { 0x001bffff, 0, \_SB.PCI0.LPCB.LNKG, 0 }, + // PCIe Root Ports 0:1c.x + Package() { 0x001cffff, 0, \_SB.PCI0.LPCB.LNKA, 0 }, + Package() { 0x001cffff, 1, \_SB.PCI0.LPCB.LNKB, 0 }, + Package() { 0x001cffff, 2, \_SB.PCI0.LPCB.LNKC, 0 }, + Package() { 0x001cffff, 3, \_SB.PCI0.LPCB.LNKD, 0 }, + // EHCI 0:1d.0 + Package() { 0x001dffff, 0, \_SB.PCI0.LPCB.LNKD, 0 }, + // XHCI 0:14.0 + Package() { 0x0014ffff, 0, \_SB.PCI0.LPCB.LNKC, 0 }, + // LPC device 0:1f.0 + Package() { 0x001fffff, 0, \_SB.PCI0.LPCB.LNKG, 0 }, + Package() { 0x001fffff, 1, \_SB.PCI0.LPCB.LNKC, 0 }, + Package() { 0x001fffff, 2, \_SB.PCI0.LPCB.LNKB, 0 }, + Package() { 0x001fffff, 3, \_SB.PCI0.LPCB.LNKA, 0 }, + // Serial IO 0:15.0 + Package() { 0x0015ffff, 0, \_SB.PCI0.LPCB.LNKE, 0 }, + Package() { 0x0015ffff, 1, \_SB.PCI0.LPCB.LNKF, 0 }, + Package() { 0x0015ffff, 2, \_SB.PCI0.LPCB.LNKF, 0 }, + Package() { 0x0015ffff, 3, \_SB.PCI0.LPCB.LNKF, 0 }, + // SDIO 0:17.0 + Package() { 0x0017ffff, 0, \_SB.PCI0.LPCB.LNKH, 0 }, + }) + } +} + diff --git a/src/mainboard/google/panther/acpi/mainboard.asl b/src/mainboard/google/panther/acpi/mainboard.asl new file mode 100644 index 0000000..59ed710 --- /dev/null +++ b/src/mainboard/google/panther/acpi/mainboard.asl @@ -0,0 +1,29 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2012 Google Inc. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; version 2 of + * the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, + * MA 02110-1301 USA + */ + +Scope (\_SB) +{ + Device (PWRB) + { + Name(_HID, EisaId("PNP0C0C")) + } + +} diff --git a/src/mainboard/google/panther/acpi/platform.asl b/src/mainboard/google/panther/acpi/platform.asl new file mode 100644 index 0000000..e6aaf75 --- /dev/null +++ b/src/mainboard/google/panther/acpi/platform.asl @@ -0,0 +1,72 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2007-2009 coresystems GmbH + * Copyright (C) 2012 Google Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +/* The APM port can be used for generating software SMIs */ + +OperationRegion (APMP, SystemIO, 0xb2, 2) +Field (APMP, ByteAcc, NoLock, Preserve) +{ + APMC, 8, // APM command + APMS, 8 // APM status +} + +/* Port 80 POST */ + +OperationRegion (POST, SystemIO, 0x80, 1) +Field (POST, ByteAcc, Lock, Preserve) +{ + DBG0, 8 +} + +/* SMI I/O Trap */ +Method(TRAP, 1, Serialized) +{ + Store (Arg0, SMIF) // SMI Function + Store (0, TRP0) // Generate trap + Return (SMIF) // Return value of SMI handler +} + +/* The _PIC method is called by the OS to choose between interrupt + * routing via the i8259 interrupt controller or the APIC. + * + * _PIC is called with a parameter of 0 for i8259 configuration and + * with a parameter of 1 for Local Apic/IOAPIC configuration. + */ + +Method(_PIC, 1) +{ + // Remember the OS' IRQ routing choice. + Store(Arg0, PICM) +} + +/* The _PTS method (Prepare To Sleep) is called before the OS is + * entering a sleep state. The sleep state number is passed in Arg0 + */ + +Method(_PTS,1) +{ +} + +/* The _WAK method is called on system wakeup */ + +Method(_WAK,1) +{ + Return(Package(){0,0}) +} diff --git a/src/mainboard/google/panther/acpi/superio.asl b/src/mainboard/google/panther/acpi/superio.asl new file mode 100644 index 0000000..e1c9d1c --- /dev/null +++ b/src/mainboard/google/panther/acpi/superio.asl @@ -0,0 +1,36 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2012 Google Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +/* Values should match those defined in devicetree.cb */ + +#undef SIO_ENABLE_FDC0 // pnp 2e.0: Disable Floppy Controller +#undef SIO_ENABLE_INFR // pnp 2e.a: Disable Consumer IR + +#define SIO_ENABLE_PS2K // pnp 2e.5: Enable PS/2 Keyboard +#define SIO_ENABLE_PS2M // pnp 2e.6: Enable PS/2 Mouse +#define SIO_ENABLE_COM1 // pnp 2e.1: Enable Serial Port 1 +#define SIO_ENABLE_ENVC // pnp 2e.4: Enable Environmental Controller +#define SIO_ENVC_IO0 0x700 // pnp 2e.4: io 0x60 +#define SIO_ENVC_IO1 0x710 // pnp 2e.4: io 0x62 +#define SIO_ENABLE_GPIO // pnp 2e.7: Enable GPIO +#define SIO_GPIO_IO0 0x720 // pnp 2e.7: io 0x60 +#define SIO_GPIO_IO1 0x730 // pnp 2e.7: io 0x60 + +#include "superio/ite/it8772f/acpi/superio.asl" + diff --git a/src/mainboard/google/panther/acpi/thermal.asl b/src/mainboard/google/panther/acpi/thermal.asl new file mode 100644 index 0000000..d96d955 --- /dev/null +++ b/src/mainboard/google/panther/acpi/thermal.asl @@ -0,0 +1,274 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2011 The Chromium OS Authors. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +// Thermal Zone + +Scope (\_TZ) +{ + ThermalZone (THRM) + { + Name (_TC1, 0x02) + Name (_TC2, 0x05) + + // Thermal zone polling frequency: 10 seconds + Name (_TZP, 100) + + // Thermal sampling period for passive cooling: 2 seconds + Name (_TSP, 20) + + // Convert from Degrees C to 1/10 Kelvin for ACPI + Method (CTOK, 1) { + // 10th of Degrees C + Multiply (Arg0, 10, Local0) + + // Convert to Kelvin + Add (Local0, 2732, Local0) + + Return (Local0) + } + + // Threshold for OS to shutdown + Method (_CRT, 0, Serialized) + { + Return (CTOK (\TCRT)) + } + + // Threshold for passive cooling + Method (_PSV, 0, Serialized) + { + Return (CTOK (\TPSV)) + } + + // Processors used for passive cooling + Method (_PSL, 0, Serialized) + { + Return (\PPKG ()) + } + + Method (_TMP, 0, Serialized) + { + // Get CPU Temperature from PECI via SuperIO TMPIN3 + Store (\_SB.PCI0.LPCB.SIO.ENVC.TIN3, Local0) + + // Check for invalid readings + If (LOr (LEqual (Local0, 255), LEqual (Local0, 0))) { + Return (CTOK (\F2ON)) + } + + // PECI raw value is an offset from Tj_max + Subtract (255, Local0, Local1) + + // Handle values greater than Tj_max + If (LGreaterEqual (Local1, \TMAX)) { + Return (CTOK (\TMAX)) + } + + // Subtract from Tj_max to get temperature + Subtract (\TMAX, Local1, Local0) + Return (CTOK (Local0)) + } + + Method (_AC0) { + If (LLessEqual (\FLVL, 0)) { + Return (CTOK (\F0OF)) + } Else { + Return (CTOK (\F0ON)) + } + } + + Method (_AC1) { + If (LLessEqual (\FLVL, 1)) { + Return (CTOK (\F1OF)) + } Else { + Return (CTOK (\F1ON)) + } + } + + Method (_AC2) { + If (LLessEqual (\FLVL, 2)) { + Return (CTOK (\F2OF)) + } Else { + Return (CTOK (\F2ON)) + } + } + + Method (_AC3) { + If (LLessEqual (\FLVL, 3)) { + Return (CTOK (\F3OF)) + } Else { + Return (CTOK (\F3ON)) + } + } + + Method (_AC4) { + If (LLessEqual (\FLVL, 4)) { + Return (CTOK (\F4OF)) + } Else { + Return (CTOK (\F4ON)) + } + } + + Name (_AL0, Package () { FAN0 }) + Name (_AL1, Package () { FAN1 }) + Name (_AL2, Package () { FAN2 }) + Name (_AL3, Package () { FAN3 }) + Name (_AL4, Package () { FAN4 }) + + PowerResource (FNP0, 0, 0) + { + Method (_STA) { + If (LLessEqual (\FLVL, 0)) { + Return (One) + } Else { + Return (Zero) + } + } + Method (_ON) { + Store (0, \FLVL) + Store (\F0PW, \_SB.PCI0.LPCB.SIO.ENVC.F3PS) + Notify (\_TZ.THRM, 0x81) + } + Method (_OFF) { + Store (1, \FLVL) + Store (\F1PW, \_SB.PCI0.LPCB.SIO.ENVC.F3PS) + Notify (\_TZ.THRM, 0x81) + } + } + + PowerResource (FNP1, 0, 0) + { + Method (_STA) { + If (LLessEqual (\FLVL, 1)) { + Return (One) + } Else { + Return (Zero) + } + } + Method (_ON) { + Store (1, \FLVL) + Store (\F1PW, \_SB.PCI0.LPCB.SIO.ENVC.F3PS) + Notify (\_TZ.THRM, 0x81) + } + Method (_OFF) { + Store (2, \FLVL) + Store (\F2PW, \_SB.PCI0.LPCB.SIO.ENVC.F3PS) + Notify (\_TZ.THRM, 0x81) + } + } + + PowerResource (FNP2, 0, 0) + { + Method (_STA) { + If (LLessEqual (\FLVL, 2)) { + Return (One) + } Else { + Return (Zero) + } + } + Method (_ON) { + Store (2, \FLVL) + Store (\F2PW, \_SB.PCI0.LPCB.SIO.ENVC.F3PS) + Notify (\_TZ.THRM, 0x81) + } + Method (_OFF) { + Store (3, \FLVL) + Store (\F3PW, \_SB.PCI0.LPCB.SIO.ENVC.F3PS) + Notify (\_TZ.THRM, 0x81) + } + } + + PowerResource (FNP3, 0, 0) + { + Method (_STA) { + If (LLessEqual (\FLVL, 3)) { + Return (One) + } Else { + Return (Zero) + } + } + Method (_ON) { + Store (3, \FLVL) + Store (\F3PW, \_SB.PCI0.LPCB.SIO.ENVC.F3PS) + Notify (\_TZ.THRM, 0x81) + } + Method (_OFF) { + Store (4, \FLVL) + Store (\F4PW, \_SB.PCI0.LPCB.SIO.ENVC.F3PS) + Notify (\_TZ.THRM, 0x81) + } + } + + PowerResource (FNP4, 0, 0) + { + Method (_STA) { + If (LLessEqual (\FLVL, 4)) { + Return (One) + } Else { + Return (Zero) + } + } + Method (_ON) { + Store (4, \FLVL) + Store (\F4PW, \_SB.PCI0.LPCB.SIO.ENVC.F3PS) + Notify (\_TZ.THRM, 0x81) + } + Method (_OFF) { + Store (4, \FLVL) + Store (\F4PW, \_SB.PCI0.LPCB.SIO.ENVC.F3PS) + Notify (\_TZ.THRM, 0x81) + } + } + + Device (FAN0) + { + Name (_HID, EISAID ("PNP0C0B")) + Name (_UID, 0) + Name (_PR0, Package () { FNP0 }) + } + + Device (FAN1) + { + Name (_HID, EISAID ("PNP0C0B")) + Name (_UID, 1) + Name (_PR0, Package () { FNP1 }) + } + + Device (FAN2) + { + Name (_HID, EISAID ("PNP0C0B")) + Name (_UID, 2) + Name (_PR0, Package () { FNP2 }) + } + + Device (FAN3) + { + Name (_HID, EISAID ("PNP0C0B")) + Name (_UID, 3) + Name (_PR0, Package () { FNP3 }) + } + + Device (FAN4) + { + Name (_HID, EISAID ("PNP0C0B")) + Name (_UID, 4) + Name (_PR0, Package () { FNP4 }) + } + } +} + diff --git a/src/mainboard/google/panther/acpi/video.asl b/src/mainboard/google/panther/acpi/video.asl new file mode 100644 index 0000000..3ececa9 --- /dev/null +++ b/src/mainboard/google/panther/acpi/video.asl @@ -0,0 +1,43 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2007-2009 coresystems GmbH + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +// Brightness write +Method (BRTW, 1, Serialized) +{ + // TODO +} + +// Hot Key Display Switch +Method (HKDS, 1, Serialized) +{ + // TODO +} + +// Lid Switch Display Switch +Method (LSDS, 1, Serialized) +{ + // TODO +} + +// Brightness Notification +Method(BRTN,1,Serialized) +{ + // TODO (no displays defined yet) +} + diff --git a/src/mainboard/google/panther/acpi_tables.c b/src/mainboard/google/panther/acpi_tables.c new file mode 100644 index 0000000..de67c22 --- /dev/null +++ b/src/mainboard/google/panther/acpi_tables.c @@ -0,0 +1,301 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2012 Google Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include <types.h> +#include <string.h> +#include <cbmem.h> +#include <console/console.h> +#include <arch/acpi.h> +#include <arch/ioapic.h> +#include <arch/acpigen.h> +#include <arch/smp/mpspec.h> +#include <device/device.h> +#include <device/pci.h> +#include <device/pci_ids.h> +#include <cpu/cpu.h> +#include <cpu/x86/msr.h> +#include <vendorcode/google/chromeos/gnvs.h> +#include <ec/google/chromeec/ec.h> + +extern const unsigned char AmlCode[]; +#if CONFIG_HAVE_ACPI_SLIC +unsigned long acpi_create_slic(unsigned long current); +#endif + +#include <southbridge/intel/lynxpoint/pch.h> +#include <southbridge/intel/lynxpoint/nvs.h> +#include "thermal.h" + +static void acpi_update_thermal_table(global_nvs_t *gnvs) +{ + gnvs->f4of = FAN4_THRESHOLD_OFF; + gnvs->f4on = FAN4_THRESHOLD_ON; + gnvs->f4pw = FAN4_PWM; + + gnvs->f3of = FAN3_THRESHOLD_OFF; + gnvs->f3on = FAN3_THRESHOLD_ON; + gnvs->f3pw = FAN3_PWM; + + gnvs->f2of = FAN2_THRESHOLD_OFF; + gnvs->f2on = FAN2_THRESHOLD_ON; + gnvs->f2pw = FAN2_PWM; + + gnvs->f1of = FAN1_THRESHOLD_OFF; + gnvs->f1on = FAN1_THRESHOLD_ON; + gnvs->f1pw = FAN1_PWM; + + gnvs->f0of = FAN0_THRESHOLD_OFF; + gnvs->f0on = FAN0_THRESHOLD_ON; + gnvs->f0pw = FAN0_PWM; + + gnvs->tcrt = CRITICAL_TEMPERATURE; + gnvs->tpsv = PASSIVE_TEMPERATURE; + gnvs->tmax = MAX_TEMPERATURE; + gnvs->flvl = 5; +} + +static void acpi_create_gnvs(global_nvs_t *gnvs) +{ + gnvs->apic = 1; + gnvs->mpen = 1; /* Enable Multi Processing */ + gnvs->pcnt = dev_count_cpu(); + + /* Enable USB ports in S3 */ + gnvs->s3u0 = 1; + gnvs->s3u1 = 1; + + /* Disable USB ports in S5 */ + gnvs->s5u0 = 0; + gnvs->s5u1 = 0; + + /* TPM Present */ + gnvs->tpmp = 1; + + /* IGD Displays */ + gnvs->ndid = 3; + gnvs->did[0] = 0x80000100; + gnvs->did[1] = 0x80000240; + gnvs->did[2] = 0x80000410; + gnvs->did[3] = 0x80000410; + gnvs->did[4] = 0x00000005; + +#if CONFIG_CHROMEOS + // TODO(reinauer) this could move elsewhere? + chromeos_init_vboot(&(gnvs->chromeos)); + + // SuperIO is always RO + gnvs->chromeos.vbt2 = ACTIVE_ECFW_RO; +#endif + + /* Update the mem console pointer. */ + gnvs->cbmc = (u32)cbmem_find(CBMEM_ID_CONSOLE); + + acpi_update_thermal_table(gnvs); +} + +unsigned long acpi_fill_madt(unsigned long current) +{ + /* Local APICs */ + current = acpi_create_madt_lapics(current); + + /* IOAPIC */ + current += acpi_create_madt_ioapic((acpi_madt_ioapic_t *) current, + 2, IO_APIC_ADDR, 0); + + /* INT_SRC_OVR */ + current += acpi_create_madt_irqoverride((acpi_madt_irqoverride_t *) + current, 0, 0, 2, 0); + current += acpi_create_madt_irqoverride((acpi_madt_irqoverride_t *) + current, 0, 9, 9, MP_IRQ_TRIGGER_LEVEL | MP_IRQ_POLARITY_HIGH); + + return current; +} + +unsigned long acpi_fill_ssdt_generator(unsigned long current, + const char *oem_table_id) +{ + generate_cpu_entries(); + return (unsigned long) (acpigen_get_current()); +} + +unsigned long acpi_fill_slit(unsigned long current) +{ + // Not implemented + return current; +} + +unsigned long acpi_fill_srat(unsigned long current) +{ + /* No NUMA, no SRAT */ + return current; +} + +#define ALIGN_CURRENT current = (ALIGN(current, 16)) +unsigned long write_acpi_tables(unsigned long start) +{ + unsigned long current; + int i; + acpi_rsdp_t *rsdp; + acpi_rsdt_t *rsdt; + acpi_xsdt_t *xsdt; + acpi_hpet_t *hpet; + acpi_madt_t *madt; + acpi_mcfg_t *mcfg; + acpi_fadt_t *fadt; + acpi_facs_t *facs; +#if CONFIG_HAVE_ACPI_SLIC + acpi_header_t *slic; +#endif + acpi_header_t *ssdt; + acpi_header_t *dsdt; + global_nvs_t *gnvs; + + current = start; + + /* Align ACPI tables to 16byte */ + ALIGN_CURRENT; + + printk(BIOS_INFO, "ACPI: Writing ACPI tables at %lx.\n", start); + + /* We need at least an RSDP and an RSDT Table */ + rsdp = (acpi_rsdp_t *) current; + current += sizeof(acpi_rsdp_t); + ALIGN_CURRENT; + rsdt = (acpi_rsdt_t *) current; + current += sizeof(acpi_rsdt_t); + ALIGN_CURRENT; + xsdt = (acpi_xsdt_t *) current; + current += sizeof(acpi_xsdt_t); + ALIGN_CURRENT; + + /* clear all table memory */ + memset((void *) start, 0, current - start); + + acpi_write_rsdp(rsdp, rsdt, xsdt); + acpi_write_rsdt(rsdt); + acpi_write_xsdt(xsdt); + + printk(BIOS_DEBUG, "ACPI: * FACS\n"); + facs = (acpi_facs_t *) current; + current += sizeof(acpi_facs_t); + ALIGN_CURRENT; + acpi_create_facs(facs); + + printk(BIOS_DEBUG, "ACPI: * DSDT\n"); + dsdt = (acpi_header_t *) current; + memcpy(dsdt, &AmlCode, sizeof(acpi_header_t)); + current += dsdt->length; + memcpy(dsdt, &AmlCode, dsdt->length); + + ALIGN_CURRENT; + + printk(BIOS_DEBUG, "ACPI: * FADT\n"); + fadt = (acpi_fadt_t *) current; + current += sizeof(acpi_fadt_t); + ALIGN_CURRENT; + + acpi_create_fadt(fadt, facs, dsdt); + acpi_add_table(rsdp, fadt); + + /* + * We explicitly add these tables later on: + */ + printk(BIOS_DEBUG, "ACPI: * HPET\n"); + + hpet = (acpi_hpet_t *) current; + current += sizeof(acpi_hpet_t); + ALIGN_CURRENT; + acpi_create_intel_hpet(hpet); + acpi_add_table(rsdp, hpet); + + /* If we want to use HPET Timers Linux wants an MADT */ + printk(BIOS_DEBUG, "ACPI: * MADT\n"); + + madt = (acpi_madt_t *) current; + acpi_create_madt(madt); + current += madt->header.length; + ALIGN_CURRENT; + acpi_add_table(rsdp, madt); + + printk(BIOS_DEBUG, "ACPI: * MCFG\n"); + mcfg = (acpi_mcfg_t *) current; + acpi_create_mcfg(mcfg); + current += mcfg->header.length; + ALIGN_CURRENT; + acpi_add_table(rsdp, mcfg); + + /* Update GNVS pointer into CBMEM */ + gnvs = cbmem_find(CBMEM_ID_ACPI_GNVS); + if (!gnvs) { + printk(BIOS_DEBUG, "ACPI: Could not find CBMEM GNVS\n"); + gnvs = (global_nvs_t *)current; + } + + for (i=0; i < dsdt->length; i++) { + if (*(u32*)(((u32)dsdt) + i) == 0xC0DEBABE) { + printk(BIOS_DEBUG, "ACPI: Patching up global NVS in " + "DSDT at offset 0x%04x -> %p\n", i, gnvs); + *(u32*)(((u32)dsdt) + i) = (unsigned long)gnvs; + acpi_save_gnvs((unsigned long)gnvs); + break; + } + } + + /* And fill it */ + acpi_create_gnvs(gnvs); + + /* And tell SMI about it */ + smm_setup_structures(gnvs, NULL, NULL); + + current += sizeof(global_nvs_t); + ALIGN_CURRENT; + + /* We patched up the DSDT, so we need to recalculate the checksum */ + dsdt->checksum = 0; + dsdt->checksum = acpi_checksum((void *)dsdt, dsdt->length); + + printk(BIOS_DEBUG, "ACPI: * DSDT @ %p Length %x\n", dsdt, + dsdt->length); + +#if CONFIG_HAVE_ACPI_SLIC + printk(BIOS_DEBUG, "ACPI: * SLIC\n"); + slic = (acpi_header_t *)current; + current += acpi_create_slic(current); + ALIGN_CURRENT; + acpi_add_table(rsdp, slic); +#endif + + printk(BIOS_DEBUG, "ACPI: * SSDT\n"); + ssdt = (acpi_header_t *)current; + acpi_create_ssdt_generator(ssdt, ACPI_TABLE_CREATOR); + current += ssdt->length; + acpi_add_table(rsdp, ssdt); + ALIGN_CURRENT; + + printk(BIOS_DEBUG, "ACPI: * SSDT2\n"); + ssdt = (acpi_header_t *)current; + acpi_create_serialio_ssdt(ssdt); + current += ssdt->length; + acpi_add_table(rsdp, ssdt); + ALIGN_CURRENT; + + printk(BIOS_DEBUG, "current = %lx\n", current); + printk(BIOS_INFO, "ACPI: done.\n"); + return current; +} diff --git a/src/mainboard/google/panther/chromeos.c b/src/mainboard/google/panther/chromeos.c new file mode 100644 index 0000000..074f648 --- /dev/null +++ b/src/mainboard/google/panther/chromeos.c @@ -0,0 +1,117 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2012 Google Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include <string.h> +#include <vendorcode/google/chromeos/chromeos.h> +#include <arch/io.h> +#include <device/device.h> +#include <device/pci.h> +#include <southbridge/intel/lynxpoint/pch.h> + +#define GPIO_SPI_WP 58 +#define GPIO_REC_MODE 12 + +#define FLAG_SPI_WP 0 +#define FLAG_REC_MODE 1 +#define FLAG_DEV_MODE 2 + +#ifndef __PRE_RAM__ +#include <boot/coreboot_tables.h> + +#define GPIO_COUNT 6 +#define ACTIVE_LOW 0 +#define ACTIVE_HIGH 1 + +static void fill_lb_gpio(struct lb_gpio *gpio, int num, + int polarity, const char *name, int force) +{ + memset(gpio, 0, sizeof(*gpio)); + gpio->port = num; + gpio->polarity = polarity; + if (force >= 0) + gpio->value = force; + else if (num >= 0) + gpio->value = get_gpio(num); + strncpy((char *)gpio->name, name, GPIO_MAX_NAME_LENGTH); +} + +void fill_lb_gpios(struct lb_gpios *gpios) +{ + struct lb_gpio *gpio; + + gpios->size = sizeof(*gpios) + (GPIO_COUNT * sizeof(struct lb_gpio)); + gpios->count = GPIO_COUNT; + + gpio = gpios->gpios; + fill_lb_gpio(gpio++, GPIO_SPI_WP, ACTIVE_HIGH, "write protect", 0); + fill_lb_gpio(gpio++, GPIO_REC_MODE, ACTIVE_LOW, "recovery", + get_recovery_mode_switch()); + fill_lb_gpio(gpio++, -1, ACTIVE_HIGH, "developer", + get_developer_mode_switch()); + fill_lb_gpio(gpio++, -1, ACTIVE_HIGH, "lid", 1); + fill_lb_gpio(gpio++, -1, ACTIVE_HIGH, "power", 0); + fill_lb_gpio(gpio++, -1, ACTIVE_HIGH, "oprom", oprom_is_loaded); +} +#endif + +int get_write_protect_state(void) +{ + device_t dev; +#ifdef __PRE_RAM__ + dev = PCI_DEV(0, 0x1f, 2); +#else + dev = dev_find_slot(0, PCI_DEVFN(0x1f, 2)); +#endif + return (pci_read_config32(dev, SATA_SP) >> FLAG_SPI_WP) & 1; +} + +int get_developer_mode_switch(void) +{ + return 0; +} + +int get_recovery_mode_switch(void) +{ + device_t dev; +#ifdef __PRE_RAM__ + dev = PCI_DEV(0, 0x1f, 2); +#else + dev = dev_find_slot(0, PCI_DEVFN(0x1f, 2)); +#endif + return (pci_read_config32(dev, SATA_SP) >> FLAG_REC_MODE) & 1; +} + +#ifdef __PRE_RAM__ +void save_chromeos_gpios(void) +{ + u32 flags = 0; + + /* Write Protect: GPIO58 = GPIO_SPI_WP, active high */ + if (get_gpio(GPIO_SPI_WP)) + flags |= (1 << FLAG_SPI_WP); + + /* Recovery: GPIO12 = RECOVERY_L, active low */ + if (!get_gpio(GPIO_REC_MODE)) + flags |= (1 << FLAG_REC_MODE); + + /* Developer: Virtual */ + + pci_write_config32(PCI_DEV(0, 0x1f, 2), SATA_SP, flags); +} +#endif diff --git a/src/mainboard/google/panther/cmos.layout b/src/mainboard/google/panther/cmos.layout new file mode 100644 index 0000000..afdd3c6 --- /dev/null +++ b/src/mainboard/google/panther/cmos.layout @@ -0,0 +1,139 @@ +## +## This file is part of the coreboot project. +## +## Copyright (C) 2007-2008 coresystems GmbH +## +## This program is free software; you can redistribute it and/or modify +## it under the terms of the GNU General Public License as published by +## the Free Software Foundation; version 2 of the License. +## +## This program is distributed in the hope that it will be useful, +## but WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +## GNU General Public License for more details. +## +## You should have received a copy of the GNU General Public License +## along with this program; if not, write to the Free Software +## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +## + +# ----------------------------------------------------------------- +entries + +#start-bit length config config-ID name +#0 8 r 0 seconds +#8 8 r 0 alarm_seconds +#16 8 r 0 minutes +#24 8 r 0 alarm_minutes +#32 8 r 0 hours +#40 8 r 0 alarm_hours +#48 8 r 0 day_of_week +#56 8 r 0 day_of_month +#64 8 r 0 month +#72 8 r 0 year +# ----------------------------------------------------------------- +# Status Register A +#80 4 r 0 rate_select +#84 3 r 0 REF_Clock +#87 1 r 0 UIP +# ----------------------------------------------------------------- +# Status Register B +#88 1 r 0 auto_switch_DST +#89 1 r 0 24_hour_mode +#90 1 r 0 binary_values_enable +#91 1 r 0 square-wave_out_enable +#92 1 r 0 update_finished_enable +#93 1 r 0 alarm_interrupt_enable +#94 1 r 0 periodic_interrupt_enable +#95 1 r 0 disable_clock_updates +# ----------------------------------------------------------------- +# Status Register C +#96 4 r 0 status_c_rsvd +#100 1 r 0 uf_flag +#101 1 r 0 af_flag +#102 1 r 0 pf_flag +#103 1 r 0 irqf_flag +# ----------------------------------------------------------------- +# Status Register D +#104 7 r 0 status_d_rsvd +#111 1 r 0 valid_cmos_ram +# ----------------------------------------------------------------- +# Diagnostic Status Register +#112 8 r 0 diag_rsvd1 + +# ----------------------------------------------------------------- +0 120 r 0 reserved_memory +#120 264 r 0 unused + +# ----------------------------------------------------------------- +# RTC_BOOT_BYTE (coreboot hardcoded) +384 1 e 4 boot_option +385 1 e 4 last_boot +388 4 r 0 reboot_bits +#390 2 r 0 unused? + +# ----------------------------------------------------------------- +# coreboot config options: console +392 3 e 5 baud_rate +395 4 e 6 debug_level +#399 1 r 0 unused + +# coreboot config options: cpu +400 1 e 2 hyper_threading +#401 7 r 0 unused + +# coreboot config options: southbridge +408 1 e 1 nmi +409 2 e 7 power_on_after_fail +#411 5 r 0 unused + +# coreboot config options: bootloader +#Used by ChromeOS: +416 128 r 0 vbnv +#544 440 r 0 unused + +# SandyBridge MRC Scrambler Seed values +896 32 r 0 mrc_scrambler_seed +928 32 r 0 mrc_scrambler_seed_s3 + +# coreboot config options: check sums +984 16 h 0 check_sum +#1000 24 r 0 amd_reserved + +# ----------------------------------------------------------------- + +enumerations + +#ID value text +1 0 Disable +1 1 Enable +2 0 Enable +2 1 Disable +4 0 Fallback +4 1 Normal +5 0 115200 +5 1 57600 +5 2 38400 +5 3 19200 +5 4 9600 +5 5 4800 +5 6 2400 +5 7 1200 +6 1 Emergency +6 2 Alert +6 3 Critical +6 4 Error +6 5 Warning +6 6 Notice +6 7 Info +6 8 Debug +6 9 Spew +7 0 Disable +7 1 Enable +7 2 Keep +# ----------------------------------------------------------------- +checksums + +checksum 392 415 984 + + diff --git a/src/mainboard/google/panther/devicetree.cb b/src/mainboard/google/panther/devicetree.cb new file mode 100644 index 0000000..95f1084 --- /dev/null +++ b/src/mainboard/google/panther/devicetree.cb @@ -0,0 +1,136 @@ +chip northbridge/intel/haswell + + # Disable eDP Hotplug + register "gpu_dp_d_hotplug" = "0x00" + + # Enable DisplayPort C Hotplug with 6ms pulse + register "gpu_dp_c_hotplug" = "0x06" + + # Enable HDMI Hotplug with 6ms pulse + register "gpu_dp_b_hotplug" = "0x06" + + device cpu_cluster 0 on + chip cpu/intel/socket_rPGA989 + device lapic 0 on end + end + chip cpu/intel/haswell + # Magic APIC ID to locate this chip + device lapic 0xACAC off end + + register "c1_battery" = "2" # ACPI(C1) = MWAIT(C1E) + register "c2_battery" = "3" # ACPI(C2) = MWAIT(C3) + register "c3_battery" = "9" # ACPI(C3) = MWAIT(C7S) + + register "c1_acpower" = "2" # ACPI(C1) = MWAIT(C1E) + register "c2_acpower" = "3" # ACPI(C2) = MWAIT(C3) + register "c3_acpower" = "9" # ACPI(C3) = MWAIT(C7S) + end + end + + device domain 0 on + subsystemid 0x1ae0 0xc000 inherit + device pci 00.0 on end # host bridge + device pci 02.0 on end # vga controller + device pci 03.0 on end # mini-hd audio + + chip southbridge/intel/lynxpoint + register "pirqa_routing" = "0x8b" + register "pirqb_routing" = "0x8a" + register "pirqc_routing" = "0x8b" + register "pirqd_routing" = "0x8b" + register "pirqe_routing" = "0x80" + register "pirqf_routing" = "0x80" + register "pirqg_routing" = "0x80" + register "pirqh_routing" = "0x80" + + # SuperIO range is 0x700-0x73f + register "gen2_dec" = "0x003c0701" + + # EC_SMI is GPIO34 + register "alt_gp_smi_en" = "0x0004" + register "gpe0_en_1" = "0x00000000" + # EC_SCI is GPIO36 + register "gpe0_en_2" = "0x00000010" + register "gpe0_en_3" = "0x00000000" + register "gpe0_en_4" = "0x00000000" + + register "ide_legacy_combined" = "0x0" + register "sata_ahci" = "0x1" + register "sata_port_map" = "0x1" + + register "sio_acpi_mode" = "0" + register "sio_i2c0_voltage" = "0" # 3.3V + register "sio_i2c1_voltage" = "0" # 3.3V + + # Enable port coalescing + register "pcie_port_coalesce" = "1" + + # Disable PCIe CLKOUT 1,5 and CLKOUT_XDP + register "icc_clock_disable" = "0x01220000" + + # Route all USB ports to XHCI per default + register "xhci_default" = "1" + + device pci 13.0 off end # Smart Sound Audio DSP + device pci 14.0 on end # USB3 XHCI + device pci 15.0 on end # Serial I/O DMA + device pci 15.1 on end # I2C0 + device pci 15.2 on end # I2C1 + device pci 15.3 off end # GSPI0 + device pci 15.4 off end # GSPI1 + device pci 15.5 off end # UART0 + device pci 15.6 off end # UART1 + device pci 16.0 on end # Management Engine Interface 1 + device pci 16.1 off end # Management Engine Interface 2 + device pci 16.2 off end # Management Engine IDE-R + device pci 16.3 off end # Management Engine KT + device pci 17.0 off end # SDIO + device pci 19.0 off end # GbE + device pci 1b.0 on end # High Definition Audio + device pci 1c.0 off end # PCIe Port #1 + device pci 1c.1 off end # PCIe Port #2 + device pci 1c.2 on end # PCIe Port #3 + device pci 1c.3 on end # PCIe Port #4 + device pci 1c.4 on end # PCIe Port #5 + device pci 1c.5 off end # PCIe Port #6 + device pci 1d.0 on end # USB2 EHCI + device pci 1e.0 off end # PCI bridge + device pci 1f.0 on + chip superio/ite/it8772f + # Skip keyboard init + register "skip_keyboard" = "1" + # Enable PECI on TMPIN3 + register "peci_tmpin" = "3" + # Enable FAN2 + register "fan2_enable" = "1" + + device pnp 2e.0 off end # FDC + device pnp 2e.1 on # Serial Port 1 + io 0x60 = 0x3f8 + irq 0x70 = 4 + end + device pnp 2e.4 on # Environment Controller + io 0x60 = 0x700 + io 0x62 = 0x710 + end + device pnp 2e.7 on # GPIO + io 0x60 = 0x720 + io 0x62 = 0x730 + end + device pnp 2e.5 on + io 0x60 = 0x60 + io 0x62 = 0x64 + irq 0x70 = 1 + end # Keyboard + device pnp 2e.6 on + irq 0x70 = 12 + end # Mouse + device pnp 2e.a off end # IR + end + end # LPC bridge + device pci 1f.2 on end # SATA Controller + device pci 1f.3 on end # SMBus + device pci 1f.6 on end # Thermal + end + end +end diff --git a/src/mainboard/google/panther/dsdt.asl b/src/mainboard/google/panther/dsdt.asl new file mode 100644 index 0000000..1316ebf --- /dev/null +++ b/src/mainboard/google/panther/dsdt.asl @@ -0,0 +1,62 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2007-2009 coresystems GmbH + * Copyright (C) 2012 Google Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#define ENABLE_TPM + +DefinitionBlock( + "dsdt.aml", + "DSDT", + 0x02, // DSDT revision: ACPI v2.0 + "COREv4", // OEM id + "COREBOOT", // OEM table id + 0x20110725 // OEM revision +) +{ + // Some generic macros + #include "acpi/platform.asl" + #include "acpi/mainboard.asl" + + // global NVS and variables + #include <southbridge/intel/lynxpoint/acpi/globalnvs.asl> + + // General Purpose Events + //#include "acpi/gpe.asl" + + // CPU + #include <cpu/intel/haswell/acpi/cpu.asl> + + Scope (\_SB) { + Device (PCI0) + { + #include <northbridge/intel/haswell/acpi/haswell.asl> + #include <southbridge/intel/lynxpoint/acpi/pch.asl> + } + } + + // Thermal handler + #include "acpi/thermal.asl" + + // Chrome OS specific + #include "acpi/chromeos.asl" + #include <vendorcode/google/chromeos/acpi/chromeos.asl> + + // Chipset specific sleep states + #include <southbridge/intel/lynxpoint/acpi/sleepstates.asl> +} diff --git a/src/mainboard/google/panther/fadt.c b/src/mainboard/google/panther/fadt.c new file mode 100644 index 0000000..7afbbfa --- /dev/null +++ b/src/mainboard/google/panther/fadt.c @@ -0,0 +1,156 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2007-2009 coresystems GmbH + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include <string.h> +#include <device/pci.h> +#include <arch/acpi.h> +#include <cpu/x86/smm.h> +#include <southbridge/intel/lynxpoint/pch.h> + +void acpi_create_fadt(acpi_fadt_t * fadt, acpi_facs_t * facs, void *dsdt) +{ + acpi_header_t *header = &(fadt->header); + u16 pmbase = get_pmbase(); + + memset((void *) fadt, 0, sizeof(acpi_fadt_t)); + memcpy(header->signature, "FACP", 4); + header->length = sizeof(acpi_fadt_t); + header->revision = 3; + memcpy(header->oem_id, OEM_ID, 6); + memcpy(header->oem_table_id, ACPI_TABLE_CREATOR, 8); + memcpy(header->asl_compiler_id, ASLC, 4); + header->asl_compiler_revision = 1; + + fadt->firmware_ctrl = (unsigned long) facs; + fadt->dsdt = (unsigned long) dsdt; + fadt->model = 1; + fadt->preferred_pm_profile = PM_MOBILE; + + fadt->sci_int = 0x9; + fadt->smi_cmd = APM_CNT; + fadt->acpi_enable = APM_CNT_ACPI_ENABLE; + fadt->acpi_disable = APM_CNT_ACPI_DISABLE; + fadt->s4bios_req = 0x0; + fadt->pstate_cnt = 0; + + fadt->pm1a_evt_blk = pmbase; + fadt->pm1b_evt_blk = 0x0; + fadt->pm1a_cnt_blk = pmbase + 0x4; + fadt->pm1b_cnt_blk = 0x0; + fadt->pm2_cnt_blk = pmbase + 0x50; + fadt->pm_tmr_blk = pmbase + 0x8; + fadt->gpe0_blk = pmbase + 0x80; + fadt->gpe1_blk = 0; + + fadt->pm1_evt_len = 4; + fadt->pm1_cnt_len = 2; + fadt->pm2_cnt_len = 1; + fadt->pm_tmr_len = 4; + fadt->gpe0_blk_len = 32; + fadt->gpe1_blk_len = 0; + fadt->gpe1_base = 0; + fadt->cst_cnt = 0; + fadt->p_lvl2_lat = 1; + fadt->p_lvl3_lat = 87; + fadt->flush_size = 1024; + fadt->flush_stride = 16; + fadt->duty_offset = 1; + fadt->duty_width = 0; + fadt->day_alrm = 0xd; + fadt->mon_alrm = 0x00; + fadt->century = 0x00; + fadt->iapc_boot_arch = ACPI_FADT_LEGACY_DEVICES | ACPI_FADT_8042; + + fadt->flags = ACPI_FADT_WBINVD | ACPI_FADT_C1_SUPPORTED | + ACPI_FADT_C2_MP_SUPPORTED | ACPI_FADT_SLEEP_BUTTON | + ACPI_FADT_RESET_REGISTER | ACPI_FADT_SEALED_CASE | + ACPI_FADT_S4_RTC_WAKE | ACPI_FADT_PLATFORM_CLOCK; + + fadt->reset_reg.space_id = 1; + fadt->reset_reg.bit_width = 8; + fadt->reset_reg.bit_offset = 0; + fadt->reset_reg.resv = 0; + fadt->reset_reg.addrl = 0xcf9; + fadt->reset_reg.addrh = 0; + + fadt->reset_value = 6; + fadt->x_firmware_ctl_l = (unsigned long)facs; + fadt->x_firmware_ctl_h = 0; + fadt->x_dsdt_l = (unsigned long)dsdt; + fadt->x_dsdt_h = 0; + + fadt->x_pm1a_evt_blk.space_id = 1; + fadt->x_pm1a_evt_blk.bit_width = 32; + fadt->x_pm1a_evt_blk.bit_offset = 0; + fadt->x_pm1a_evt_blk.resv = 0; + fadt->x_pm1a_evt_blk.addrl = pmbase; + fadt->x_pm1a_evt_blk.addrh = 0x0; + + fadt->x_pm1b_evt_blk.space_id = 1; + fadt->x_pm1b_evt_blk.bit_width = 0; + fadt->x_pm1b_evt_blk.bit_offset = 0; + fadt->x_pm1b_evt_blk.resv = 0; + fadt->x_pm1b_evt_blk.addrl = 0x0; + fadt->x_pm1b_evt_blk.addrh = 0x0; + + fadt->x_pm1a_cnt_blk.space_id = 1; + fadt->x_pm1a_cnt_blk.bit_width = 16; + fadt->x_pm1a_cnt_blk.bit_offset = 0; + fadt->x_pm1a_cnt_blk.resv = 0; + fadt->x_pm1a_cnt_blk.addrl = pmbase + 0x4; + fadt->x_pm1a_cnt_blk.addrh = 0x0; + + fadt->x_pm1b_cnt_blk.space_id = 1; + fadt->x_pm1b_cnt_blk.bit_width = 0; + fadt->x_pm1b_cnt_blk.bit_offset = 0; + fadt->x_pm1b_cnt_blk.resv = 0; + fadt->x_pm1b_cnt_blk.addrl = 0x0; + fadt->x_pm1b_cnt_blk.addrh = 0x0; + + fadt->x_pm2_cnt_blk.space_id = 1; + fadt->x_pm2_cnt_blk.bit_width = 8; + fadt->x_pm2_cnt_blk.bit_offset = 0; + fadt->x_pm2_cnt_blk.resv = 0; + fadt->x_pm2_cnt_blk.addrl = pmbase + 0x50; + fadt->x_pm2_cnt_blk.addrh = 0x0; + + fadt->x_pm_tmr_blk.space_id = 1; + fadt->x_pm_tmr_blk.bit_width = 32; + fadt->x_pm_tmr_blk.bit_offset = 0; + fadt->x_pm_tmr_blk.resv = 0; + fadt->x_pm_tmr_blk.addrl = pmbase + 0x8; + fadt->x_pm_tmr_blk.addrh = 0x0; + + fadt->x_gpe0_blk.space_id = 0; + fadt->x_gpe0_blk.bit_width = 0; + fadt->x_gpe0_blk.bit_offset = 0; + fadt->x_gpe0_blk.resv = 0; + fadt->x_gpe0_blk.addrl = 0; + fadt->x_gpe0_blk.addrh = 0x0; + + fadt->x_gpe1_blk.space_id = 1; + fadt->x_gpe1_blk.bit_width = 0; + fadt->x_gpe1_blk.bit_offset = 0; + fadt->x_gpe1_blk.resv = 0; + fadt->x_gpe1_blk.addrl = 0x0; + fadt->x_gpe1_blk.addrh = 0x0; + + header->checksum = + acpi_checksum((void *) fadt, header->length); +} diff --git a/src/mainboard/google/panther/gpio.h b/src/mainboard/google/panther/gpio.h new file mode 100644 index 0000000..620acef --- /dev/null +++ b/src/mainboard/google/panther/gpio.h @@ -0,0 +1,124 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2012 Google Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#ifndef FALCO_GPIO_H +#define FALCO_GPIO_H + +struct pch_lp_gpio_map; + +const struct pch_lp_gpio_map mainboard_gpio_map[] = { + LP_GPIO_UNUSED, /* 0: UNUSED */ + LP_GPIO_UNUSED, /* 1: UNUSED */ + LP_GPIO_UNUSED, /* 2: UNUSED */ + LP_GPIO_UNUSED, /* 3: UNUSED */ + LP_GPIO_NATIVE, /* 4: NATIVE: I2C0_SDA_GPIO4 */ + LP_GPIO_NATIVE, /* 5: NATIVE: I2C0_SCL_GPIO5 */ + LP_GPIO_NATIVE, /* 6: NATIVE: I2C1_SDA_GPIO6 */ + LP_GPIO_NATIVE, /* 7: NATIVE: I2C1_SCL_GPIO7 */ + LP_GPIO_ACPI_SCI, /* 8: LAN_WAKE_L_Q */ + LP_GPIO_OUT_HIGH, /* 9: PP3300_WLAN_EN */ + LP_GPIO_ACPI_SCI, /* 10: WLAN_WAKE_L_Q */ + LP_GPIO_UNUSED, /* 11: SMBALERT */ + LP_GPIO_INPUT_INVERT, /* 12: RECOVERY_L */ + LP_GPIO_UNUSED, /* 13: UNUSED */ + LP_GPIO_UNUSED, /* 14: UNUSED */ + LP_GPIO_UNUSED, /* 15: UNUSED (STRAP) */ + LP_GPIO_UNUSED, /* 16: UNUSED */ + LP_GPIO_OUT_HIGH, /* 17: PP3300_VP8_EN */ + LP_GPIO_UNUSED, /* 18: UNUSED */ + LP_GPIO_UNUSED, /* 19: UNUSED */ + LP_GPIO_NATIVE, /* 20: NATIVE: CLK_PCIE_REQ2# */ + LP_GPIO_NATIVE, /* 21: NATIVE: CLK_PCIE_REQ3# */ + LP_GPIO_NATIVE, /* 22: NATIVE: CLK_PCIE_REQ4# */ + LP_GPIO_UNUSED, /* 23: UNUSED */ + LP_GPIO_OUT_HIGH, /* 24: WLAN_OFF_L */ + LP_GPIO_UNUSED, /* 25: UNUSED */ + LP_GPIO_OUT_HIGH, /* 26: USB_CTL_1 */ + LP_GPIO_UNUSED, /* 27: UNUSED */ + LP_GPIO_OUT_HIGH, /* 28: USB_ILIM_SEL */ + LP_GPIO_UNUSED, /* 29: UNUSED */ + LP_GPIO_NATIVE, /* 30: NATIVE: PCH_SUSPWRACK_L */ + LP_GPIO_NATIVE, /* 31: NATIVE: PCH_ACPRESENT */ + LP_GPIO_NATIVE, /* 32: NATIVE: CLKRUN# */ + LP_GPIO_NATIVE, /* 33: NATIVE: DEVSLP0 */ + LP_GPIO_ACPI_SMI, /* 34: EC_SMI_L */ + LP_GPIO_ACPI_SMI, /* 35: PCH_NMI_DBG_L (route in NMI_EN) */ + LP_GPIO_ACPI_SCI, /* 36: EC_SCI_L */ + LP_GPIO_UNUSED, /* 37: UNUSED */ + LP_GPIO_UNUSED, /* 38: UNUSED */ + LP_GPIO_UNUSED, /* 39: UNUSED */ + LP_GPIO_NATIVE, /* 40: NATIVE: USB_OC0# */ + LP_GPIO_NATIVE, /* 41: NATIVE: USB_OC1# */ + LP_GPIO_NATIVE, /* 42: NATIVE: USB_OC2# */ + LP_GPIO_NATIVE, /* 43: NATIVE: USB_OC3# */ + LP_GPIO_UNUSED, /* 44: UNUSED */ + LP_GPIO_OUT_HIGH, /* 45: PP5000_CODEC_EN */ + LP_GPIO_OUT_HIGH, /* 46: BT_DISABLE_L */ + LP_GPIO_OUT_HIGH, /* 47: USB1_PWR_EN */ + LP_GPIO_UNUSED, /* 48: UNUSED */ + LP_GPIO_UNUSED, /* 49: UNUSED */ + LP_GPIO_OUT_HIGH, /* 50: VP8_DISABLE_L */ + LP_GPIO_UNUSED, /* 51: UNUSED */ + LP_GPIO_UNUSED, /* 52: UNUSED */ + LP_GPIO_UNUSED, /* 53: UNUSED */ + LP_GPIO_UNUSED, /* 54: UNUSED */ + LP_GPIO_UNUSED, /* 55: UNUSED */ + LP_GPIO_OUT_HIGH, /* 56: USB2_PWR_EN */ + LP_GPIO_OUT_HIGH, /* 57: USB3_PWR_EN */ + LP_GPIO_INPUT, /* 58: PCH_SPI_WP_D */ + LP_GPIO_OUT_HIGH, /* 59: PP3300_LAN_EN */ + LP_GPIO_NATIVE, /* 60: NATIVE: SMB0ALERT# */ + LP_GPIO_UNUSED, /* 61: UNUSED */ + LP_GPIO_UNUSED, /* 62: UNUSED */ + LP_GPIO_NATIVE, /* 63: NATIVE: PCH_SLP_S5_L */ + LP_GPIO_UNUSED, /* 64: UNUSED */ + LP_GPIO_UNUSED, /* 65: UNUSED */ + LP_GPIO_UNUSED, /* 66: UNUSED (STRAP) */ + LP_GPIO_UNUSED, /* 67: UNUSED */ + LP_GPIO_UNUSED, /* 68: UNUSED */ + LP_GPIO_UNUSED, /* 69: UNUSED */ + LP_GPIO_UNUSED, /* 70: UNUSED */ + LP_GPIO_NATIVE, /* 71: NATIVE: MODPHY_EN */ + LP_GPIO_UNUSED, /* 72: UNUSED */ + LP_GPIO_UNUSED, /* 73: UNUSED */ + LP_GPIO_NATIVE, /* 74: NATIVE: SMB_ME1_DAT */ + LP_GPIO_NATIVE, /* 75: NATIVE: SMB_ME1_CLK */ + LP_GPIO_UNUSED, /* 76: UNUSED */ + LP_GPIO_UNUSED, /* 77: UNUSED */ + LP_GPIO_UNUSED, /* 78: UNUSED */ + LP_GPIO_UNUSED, /* 79: UNUSED */ + LP_GPIO_UNUSED, /* 80: UNUSED */ + LP_GPIO_NATIVE, /* 81: NATIVE: SPKR */ + LP_GPIO_NATIVE, /* 82: NATIVE: EC_RCIN_L */ + LP_GPIO_UNUSED, /* 83: UNUSED */ + LP_GPIO_UNUSED, /* 84: UNUSED */ + LP_GPIO_UNUSED, /* 85: UNUSED */ + LP_GPIO_UNUSED, /* 86: UNUSED (STRAP) */ + LP_GPIO_UNUSED, /* 87: UNUSED */ + LP_GPIO_UNUSED, /* 88: UNUSED */ + LP_GPIO_UNUSED, /* 89: UNUSED */ + LP_GPIO_UNUSED, /* 90: UNUSED */ + LP_GPIO_UNUSED, /* 91: UNUSED */ + LP_GPIO_UNUSED, /* 92: UNUSED */ + LP_GPIO_UNUSED, /* 93: UNUSED */ + LP_GPIO_UNUSED, /* 94: UNUSED */ + LP_GPIO_END +}; + +#endif diff --git a/src/mainboard/google/panther/hda_verb.h b/src/mainboard/google/panther/hda_verb.h new file mode 100644 index 0000000..ba0da1c --- /dev/null +++ b/src/mainboard/google/panther/hda_verb.h @@ -0,0 +1,112 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2013 Google Inc. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +static const u32 mainboard_cim_verb_data[] = { + /* coreboot specific header */ + 0x10ec0283, // Codec Vendor / Device ID: Realtek ALC283 + 0x10ec0283, // Subsystem ID + 0x0000000c, // Number of jacks (NID entries) + + /* NID 0x01, HDA Codec Subsystem ID Verb Table: 0x10ec0283 */ + 0x00172083, + 0x00172102, + 0x001722ec, + 0x00172310, + + /* Pin Widget Verb Table */ + + /* Pin Complex (NID 0x12) DMIC - interior mobile lid */ + 0x01271c10, + 0x01271d10, + 0x01271ea6, + 0x01271fb7, + + /* Pin Complex (NID 0x14) SPKR-OUT PORTD */ + 0x01471c10, // group 1, front left/right + 0x01471d01, // no connector, no jack detect + 0x01471e17, // speaker out, analog + 0x01471f90, // fixed function, internal + + /* Pin Complex (NID 0x17) */ + 0x01771cf0, + 0x01771d11, + 0x01771e11, + 0x01771f41, + + /* Pin Complex (NID 0x18) MIC1 PORTB */ + 0x01971c11, // group 1, cap 1 + 0x01971d10, // black, jack detect + 0x01971ea7, // mic in, analog + 0x01971f03, // connector, left panel + + /* Pin Complex (NID 0x19) MIC2 PORTF */ + 0x01871cf0, + 0x01871d11, + 0x01871e11, + 0x01871f41, + + /* Pin Complex (NID 0x1A) LINE1 PORTC */ + 0x01a71cf0, + 0x01a71d11, + 0x01a71e11, + 0x01a71f41, + + /* Pin Complex (NID 0x1B) LINE2 PORTE */ + 0x01a71cf0, + 0x01a71d11, + 0x01a71e11, + 0x01a71f41, + + /* Pin Complex (NID 0x1d) PCBeep */ + 0x01d71c2d, // eapd low on ex-amp, laptop, custom enable + 0x01d71d81, // mute spkr on hpout + 0x01d71e15, // pcbeep en able, checksum + 0x01d71f40, // no physical, internal + + /* Pin Complex (NID 0x1E) SPDIF-OUT */ + 0x01e71cf0, + 0x01e71d11, + 0x01e71e11, + 0x01e71f41, + + /* Pin Complex (NID 0x21) HPOUT PORT-I */ + 0x02171c1f, // group1, + 0x02171d10, // black, jack detect + 0x02171e21, // HPOut, 1/8 stereo + 0x02171f03, // connector, left panel + + /* Undocumented settings from Realtek (needed for beep_gen) */ + /* Widget node 0x20 */ + 0x02050010, + 0x02040c20, + 0x0205001b, + 0x0204081b, +}; + +static const u32 mainboard_pc_beep_verbs[] = { + 0x00170500, /* power up everything (codec, dac, adc, mixers) */ + 0x01470740, /* enable speaker out */ + 0x01470c02, /* set speaker EAPD pin */ + 0x0143b01f, /* unmute speaker */ + 0x00c37100, /* unmute mixer nid 0xc input 1 */ + 0x00b37410, /* unmute mixer nid 0xb beep input and set volume */ +}; + +static const u32 mainboard_pc_beep_verbs_size = + sizeof(mainboard_pc_beep_verbs) / sizeof(mainboard_pc_beep_verbs[0]); diff --git a/src/mainboard/google/panther/lan.c b/src/mainboard/google/panther/lan.c new file mode 100644 index 0000000..64f53f3 --- /dev/null +++ b/src/mainboard/google/panther/lan.c @@ -0,0 +1,178 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2012 Google Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include <types.h> +#include <string.h> +#include <arch/io.h> +#include <console/console.h> +#include <device/device.h> +#include <device/pci.h> +#include <southbridge/intel/bd82x6x/pch.h> +#include <vendorcode/google/chromeos/fmap.h> +#include "onboard.h" + +static unsigned int search(char *p, char *a, unsigned int lengthp, + unsigned int lengtha) +{ + int i, j; + + /* Searching */ + for (j = 0; j <= lengtha - lengthp; j++) { + for (i = 0; i < lengthp && p[i] == a[i + j]; i++) ; + if (i >= lengthp) + return j; + } + return lengtha; +} + +static unsigned char get_hex_digit(char *offset) +{ + unsigned char retval = 0; + + retval = *offset - '0'; + if (retval > 0x09) { + retval = *offset - 'A' + 0x0A; + if (retval > 0x0F) + retval = *offset - 'a' + 0x0a; + } + if (retval > 0x0F) { + printk(BIOS_DEBUG, "Error: Invalid Hex digit found: %c - 0x%02x\n", + *offset, (unsigned char)*offset); + retval = 0; + } + + return retval; +} + +static int get_mac_address(u32 *high_dword, u32 *low_dword, + u32 search_address, u32 search_length) +{ + char key[] = "ethernet_mac"; + unsigned int offset; + int i; + + offset = search(key, (char *)search_address, + sizeof(key) - 1, search_length); + if (offset == search_length) { + printk(BIOS_DEBUG, + "Error: Could not locate '%s' in VPD\n", key); + return 0; + } + printk(BIOS_DEBUG, "Located '%s' in VPD\n", key); + + offset += sizeof(key); /* move to next character */ + *high_dword = 0; + + /* Fetch the MAC address and put the octets in the correct order to + * be programmed. + * + * From RTL8105E_Series_EEPROM-Less_App_Note_1.1 + * If the MAC address is 001122334455h: + * Write 33221100h to I/O register offset 0x00 via double word access + * Write 00005544h to I/O register offset 0x04 via double word access + */ + + for (i = 0; i < 4; i++) { + *high_dword |= (get_hex_digit((char *)(search_address + offset)) + << (4 + (i * 8))); + *high_dword |= (get_hex_digit((char *)(search_address + offset + 1)) + << (i * 8)); + offset += 3; + } + + *low_dword = 0; + for (i = 0; i < 2; i++) { + *low_dword |= (get_hex_digit((char *)(search_address + offset)) + << (4 + (i * 8))); + *low_dword |= (get_hex_digit((char *)(search_address + offset + 1)) + << (i * 8)); + offset += 3; + } + + return *high_dword | *low_dword; +} + +static void program_mac_address(u16 io_base, u32 search_address, + u32 search_length) +{ + /* Default MAC Address of A0:00:BA:D0:0B:AD */ + u32 high_dword = 0xD0BA00A0; /* high dword of mac address */ + u32 low_dword = 0x0000AD0B; /* low word of mac address as a dword */ + + if (search_length != -1) + get_mac_address(&high_dword, &low_dword, search_address, + search_length); + + if (io_base) { + printk(BIOS_DEBUG, "Realtek NIC io_base = 0x%04x\n", io_base); + printk(BIOS_DEBUG, "Programming MAC Address\n"); + + outb(0xc0, io_base + 0x50); /* Disable register protection */ + outl(high_dword, io_base); + outl(low_dword, io_base + 0x04); + outb(0x60, io_base + 54); + outb(0x00, io_base + 0x50); /* Enable register protection again */ + } +} + +void lan_init(void) +{ + char **vpd_region_ptr = NULL; + u32 search_length = find_fmap_entry("RO_VPD", (void **)vpd_region_ptr); + u32 search_address = (unsigned long)(*vpd_region_ptr); + u16 io_base = 0; + struct device *ethernet_dev = NULL; + + /* Get NIC's IO base address */ + ethernet_dev = dev_find_device(PANTHER_NIC_VENDOR_ID, + PANTHER_NIC_DEVICE_ID, 0); + if (ethernet_dev != NULL) { + io_base = pci_read_config16(ethernet_dev, 0x10) & 0xfffe; + + /* + * Battery life time - LAN PCIe should enter ASPM L1 to save + * power when LAN connection is idle. + * enable CLKREQ: LAN pci config space 0x81h=01 + */ + pci_write_config8(ethernet_dev, 0x81, 0x01); + } + + if (io_base) { + /* Program MAC address based on VPD data */ + program_mac_address(io_base, search_address, search_length); + + /* + * Program NIC LEDS + * + * RTL8105E Series EEPROM-Less Application Note, + * Section 5.6 LED Mode Configuration + * + * Step1: Write C0h to I/O register 0x50 via byte access to + * disable 'register protection' + * Step2: Write xx001111b to I/O register 0x52 via byte access + * (bit7 is LEDS1 and bit6 is LEDS0) + * Step3: Write 0x00 to I/O register 0x50 via byte access to + * enable 'register protection' + */ + outb(0xc0, io_base + 0x50); /* Disable protection */ + outb((PANTHER_NIC_LED_MODE << 6) | 0x0f, io_base + 0x52); + outb(0x00, io_base + 0x50); /* Enable register protection */ + } +} + diff --git a/src/mainboard/google/panther/mainboard.c b/src/mainboard/google/panther/mainboard.c new file mode 100644 index 0000000..afa6526 --- /dev/null +++ b/src/mainboard/google/panther/mainboard.c @@ -0,0 +1,170 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2007-2009 coresystems GmbH + * Copyright (C) 2012 Google Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include <types.h> +#include <string.h> +#include <smbios.h> +#include <device/device.h> +#include <device/device.h> +#include <device/pci_def.h> +#include <device/pci_ops.h> +#include <console/console.h> +#if CONFIG_VGA_ROM_RUN +#include <x86emu/x86emu.h> +#endif +#include <pc80/mc146818rtc.h> +#include <arch/acpi.h> +#include <arch/io.h> +#include <arch/interrupt.h> +#include <boot/coreboot_tables.h> +#include "hda_verb.h" +#include "onboard.h" +#include <southbridge/intel/lynxpoint/pch.h> + +void mainboard_suspend_resume(void) +{ + /* Call SMM finalize() handlers before resume */ + outb(0xcb, 0xb2); +} + +#if CONFIG_VGA_ROM_RUN +static int int15_handler(void) +{ + int res = 0; + + printk(BIOS_DEBUG, "%s: AX=%04x BX=%04x CX=%04x DX=%04x\n", + __func__, X86_AX, X86_BX, X86_CX, X86_DX); + + switch (X86_AX) { + case 0x5f34: + /* + * Set Panel Fitting Hook: + * bit 2 = Graphics Stretching + * bit 1 = Text Stretching + * bit 0 = Centering (do not set with bit1 or bit2) + * 0 = video bios default + */ + X86_AX = 0x005f; + X86_CX = 0x0001; + res = 1; + break; + case 0x5f35: + /* + * Boot Display Device Hook: + * bit 0 = CRT + * bit 1 = TV (eDP) * + * bit 2 = EFP * + * bit 3 = LFP + * bit 4 = CRT2 + * bit 5 = TV2 (eDP) * + * bit 6 = EFP2 * + * bit 7 = LFP2 + */ + X86_AX = 0x005f; + X86_CX = 0x0000; + res = 1; + break; + case 0x5f51: + /* + * Hook to select active LFP configuration: + * 00h = No LVDS, VBIOS does not enable LVDS + * 01h = Int-LVDS, LFP driven by integrated LVDS decoder + * 02h = SVDO-LVDS, LFP driven by SVDO decoder + * 03h = eDP, LFP Driven by Int-DisplayPort encoder + */ + X86_AX = 0x005f; + X86_CX = 0x0003; + res = 1; + break; + case 0x5f70: + switch ((X86_CX >> 8) & 0xff) { + case 0: + /* Get Mux */ + X86_AX = 0x005f; + X86_CX = 0x0000; + res = 1; + break; + case 1: + /* Set Mux */ + X86_AX = 0x005f; + X86_CX = 0x0000; + res = 1; + break; + case 2: + /* Get SG/Non-SG mode */ + X86_AX = 0x005f; + X86_CX = 0x0000; + res = 1; + break; + default: + /* Interrupt was not handled */ + printk(BIOS_DEBUG, + "Unknown INT15 5f70 function: 0x%02x\n", + ((X86_CX >> 8) & 0xff)); + break; + } + break; + + default: + printk(BIOS_DEBUG, "Unknown INT15 function %04x!\n", X86_AX); + break; + } + return res; +} +#endif + +/* Audio Setup */ + +extern const u32 * cim_verb_data; +extern u32 cim_verb_data_size; +extern const u32 * pc_beep_verbs; +extern u32 pc_beep_verbs_size; + +static void verb_setup(void) +{ + cim_verb_data = mainboard_cim_verb_data; + cim_verb_data_size = sizeof(mainboard_cim_verb_data); + pc_beep_verbs = mainboard_pc_beep_verbs; + pc_beep_verbs_size = mainboard_pc_beep_verbs_size; + +} + +static void mainboard_init(device_t dev) +{ + lan_init(); +} + +// mainboard_enable is executed as first thing after +// enumerate_buses(). + +static void mainboard_enable(device_t dev) +{ + dev->ops->init = mainboard_init; +#if CONFIG_VGA_ROM_RUN + /* Install custom int15 handler for VGA OPROM */ + mainboard_interrupt_handlers(0x15, &int15_handler); +#endif + verb_setup(); +} + +struct chip_operations mainboard_ops = { + .enable_dev = mainboard_enable, +}; + diff --git a/src/mainboard/google/panther/onboard.h b/src/mainboard/google/panther/onboard.h new file mode 100644 index 0000000..794dd8d --- /dev/null +++ b/src/mainboard/google/panther/onboard.h @@ -0,0 +1,9 @@ +void lan_init(void); + +/* defines for programming the MAC address */ +#define PANTHER_NIC_VENDOR_ID 0x10EC +#define PANTHER_NIC_DEVICE_ID 0x8168 + +/* 0x00: White LINK LED and Amber ACTIVE LED */ +#define PANTHER_NIC_LED_MODE 0x00 + diff --git a/src/mainboard/google/panther/romstage.c b/src/mainboard/google/panther/romstage.c new file mode 100644 index 0000000..3496b53 --- /dev/null +++ b/src/mainboard/google/panther/romstage.c @@ -0,0 +1,154 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2007-2010 coresystems GmbH + * Copyright (C) 2012 Google Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include <stdint.h> +#include <stdlib.h> +#include <string.h> +#include <cbfs.h> +#include <console/console.h> +#include <cpu/intel/haswell/haswell.h> +#include <northbridge/intel/haswell/haswell.h> +#include <northbridge/intel/haswell/raminit.h> +#include <southbridge/intel/lynxpoint/pch.h> +#include <southbridge/intel/lynxpoint/lp_gpio.h> +#include "gpio.h" +#include "superio/ite/it8772f/it8772f.h" +#include "superio/ite/it8772f/early_serial.c" +#include "superio/ite/common/ite.h" + +#define SERIAL_DEV PNP_DEV(0x2e, IT8772F_SP1) +#define GPIO_DEV PNP_DEV(0x2e, IT8772F_GPIO) + + +const struct rcba_config_instruction rcba_config[] = { + + /* + * GFX INTA -> PIRQA (MSI) + * D28IP_P1IP PCIE INTA -> PIRQA + * D29IP_E1P EHCI INTA -> PIRQD + * D20IP_XHCI XHCI INTA -> PIRQC (MSI) + * D31IP_SIP SATA INTA -> PIRQF (MSI) + * D31IP_SMIP SMBUS INTB -> PIRQG + * D31IP_TTIP THRT INTC -> PIRQA + * D27IP_ZIP HDA INTA -> PIRQG (MSI) + */ + + /* Device interrupt pin register (board specific) */ + RCBA_SET_REG_32(D31IP, (INTC << D31IP_TTIP) | (NOINT << D31IP_SIP2) | + (INTB << D31IP_SMIP) | (INTA << D31IP_SIP)), + RCBA_SET_REG_32(D29IP, (INTA << D29IP_E1P)), + RCBA_SET_REG_32(D28IP, (INTA << D28IP_P1IP) | (INTC << D28IP_P3IP) | + (INTB << D28IP_P4IP)), + RCBA_SET_REG_32(D27IP, (INTA << D27IP_ZIP)), + RCBA_SET_REG_32(D26IP, (INTA << D26IP_E2P)), + RCBA_SET_REG_32(D22IP, (NOINT << D22IP_MEI1IP)), + RCBA_SET_REG_32(D20IP, (INTA << D20IP_XHCI)), + + /* Device interrupt route registers */ + RCBA_SET_REG_32(D31IR, DIR_ROUTE(PIRQG, PIRQC, PIRQB, PIRQA)),/* LPC */ + RCBA_SET_REG_32(D29IR, DIR_ROUTE(PIRQD, PIRQD, PIRQD, PIRQD)),/* EHCI */ + RCBA_SET_REG_32(D28IR, DIR_ROUTE(PIRQA, PIRQB, PIRQC, PIRQD)),/* PCIE */ + RCBA_SET_REG_32(D27IR, DIR_ROUTE(PIRQG, PIRQG, PIRQG, PIRQG)),/* HDA */ + RCBA_SET_REG_32(D22IR, DIR_ROUTE(PIRQA, PIRQA, PIRQA, PIRQA)),/* ME */ + RCBA_SET_REG_32(D21IR, DIR_ROUTE(PIRQE, PIRQF, PIRQF, PIRQF)),/* SIO */ + RCBA_SET_REG_32(D20IR, DIR_ROUTE(PIRQC, PIRQC, PIRQC, PIRQC)),/* XHCI */ + RCBA_SET_REG_32(D23IR, DIR_ROUTE(PIRQH, PIRQH, PIRQH, PIRQH)),/* SDIO */ + + /* Disable unused devices (board specific) */ + RCBA_RMW_REG_32(FD, ~0, PCH_DISABLE_ALWAYS), + + RCBA_END_CONFIG, +}; + +void mainboard_romstage_entry(unsigned long bist) +{ + struct pei_data pei_data = { + pei_version: PEI_VERSION, + mchbar: DEFAULT_MCHBAR, + dmibar: DEFAULT_DMIBAR, + epbar: DEFAULT_EPBAR, + pciexbar: DEFAULT_PCIEXBAR, + smbusbar: SMBUS_IO_BASE, + wdbbar: 0x4000000, + wdbsize: 0x1000, + hpet_address: HPET_ADDR, + rcba: DEFAULT_RCBA, + pmbase: DEFAULT_PMBASE, + gpiobase: DEFAULT_GPIOBASE, + temp_mmio_base: 0xfed08000, + system_type: 5, /* ULT */ + tseg_size: CONFIG_SMM_TSEG_SIZE, + spd_addresses: { 0xa0, 0x00, 0xa4, 0x00 }, + ec_present: 0, + // 0 = leave channel enabled + // 1 = disable dimm 0 on channel + // 2 = disable dimm 1 on channel + // 3 = disable dimm 0+1 on channel + dimm_channel0_disabled: 2, + dimm_channel1_disabled: 2, + // Enable 2x refresh mode + ddr_refresh_2x: 1, + dq_pins_interleaved: 1, + max_ddr3_freq: 1600, + usb_xhci_on_resume: 1, + usb2_ports: { + /* Length, Enable, OCn#, Location */ + { 0x0064, 1, 0, /* P0: VP8 */ + USB_PORT_MINI_PCIE }, + { 0x0040, 1, 0, /* P1: Port A, CN22 */ + USB_PORT_INTERNAL }, + { 0x0040, 1, 1, /* P2: Port B, CN23 */ + USB_PORT_INTERNAL }, + { 0x0040, 1, USB_OC_PIN_SKIP, /* P3: WLAN */ + USB_PORT_INTERNAL }, + { 0x0040, 1, 2, /* P4: Port C, CN25 */ + USB_PORT_INTERNAL }, + { 0x0040, 1, 2, /* P5: Port D, CN25 */ + USB_PORT_INTERNAL }, + { 0x0040, 1, USB_OC_PIN_SKIP, /* P6: Card Reader */ + USB_PORT_INTERNAL }, + { 0x0000, 0, 0, /* P7: N/C */ + USB_PORT_SKIP }, + }, + usb3_ports: { + /* Enable, OCn# */ + { 1, 0 }, /* P1; CN22 */ + { 1, 1 }, /* P2; CN23 */ + { 1, 2 }, /* P3; CN25 */ + { 1, 2 }, /* P4; CN25 */ + }, + }; + + struct romstage_params romstage_params = { + .pei_data = &pei_data, + .gpio_map = &mainboard_gpio_map, + .rcba_config = &rcba_config[0], + .bist = bist, + }; + + /* Early SuperIO setup */ + ite_kill_watchdog(GPIO_DEV); + it8772f_ac_resume_southbridge(); + pch_enable_lpc(); + ite_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); + + /* Call into the real romstage main with this board's attributes. */ + romstage_common(&romstage_params); +} diff --git a/src/mainboard/google/panther/smihandler.c b/src/mainboard/google/panther/smihandler.c new file mode 100644 index 0000000..2ad2498 --- /dev/null +++ b/src/mainboard/google/panther/smihandler.c @@ -0,0 +1,161 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2008-2009 coresystems GmbH + * Copyright 2012 Google Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include <arch/io.h> +#include <console/console.h> +#include <cpu/x86/smm.h> +#include <southbridge/intel/lynxpoint/nvs.h> +#include <southbridge/intel/lynxpoint/pch.h> +#include <southbridge/intel/lynxpoint/me.h> +#include <northbridge/intel/haswell/haswell.h> +#include <cpu/intel/haswell/haswell.h> +#include <elog.h> + +/* GPIO46 controls the WLAN_DISABLE_L signal. */ +#define GPIO_WLAN_DISABLE_L 46 +#define GPIO_LTE_DISABLE_L 59 + +int mainboard_io_trap_handler(int smif) +{ + switch (smif) { + case 0x99: + printk(BIOS_DEBUG, "Sample\n"); + smm_get_gnvs()->smif = 0; + break; + default: + return 0; + } + + /* On success, the IO Trap Handler returns 0 + * On failure, the IO Trap Handler returns a value != 0 + * + * For now, we force the return value to 0 and log all traps to + * see what's going on. + */ + //gnvs->smif = 0; + return 1; +} + +#if 0 +static u8 mainboard_smi_ec(void) +{ + u8 cmd = 0;// google_chromeec_get_event(); + +#if CONFIG_ELOG_GSMI + /* Log this event */ + if (cmd) + elog_add_event_byte(ELOG_TYPE_EC_EVENT, cmd); +#endif + + return cmd; +} +#endif + +/* gpi_sts is GPIO 47:32 */ +void mainboard_smi_gpi(u32 gpi_sts) +{ +#if 0 + if (gpi_sts & (1 << (EC_SMI_GPI - 32))) { + /* Process all pending events */ + while (mainboard_smi_ec() != 0); + } +#endif +} + +void mainboard_smi_sleep(u8 slp_typ) +{ + /* Disable USB charging if required */ + switch (slp_typ) { + case 3: + //if (smm_get_gnvs()->s3u0 == 0) + // google_chromeec_set_usb_charge_mode( + // 0, USB_CHARGE_MODE_DISABLED); + //if (smm_get_gnvs()->s3u1 == 0) + // google_chromeec_set_usb_charge_mode( + // 1, USB_CHARGE_MODE_DISABLED); + + /* Prevent leak from standby rail to WLAN rail in S3. */ + //set_gpio(GPIO_WLAN_DISABLE_L, 0); + /* Disable LTE */ + //set_gpio(GPIO_LTE_DISABLE_L, 0); + + /* Enable wake events */ + //google_chromeec_set_wake_mask(MAINBOARD_EC_S3_WAKE_EVENTS); + break; + case 5: + //if (smm_get_gnvs()->s5u0 == 0) + // google_chromeec_set_usb_charge_mode( + // 0, USB_CHARGE_MODE_DISABLED); + //if (smm_get_gnvs()->s5u1 == 0) + // google_chromeec_set_usb_charge_mode( + // 1, USB_CHARGE_MODE_DISABLED); + + /* Prevent leak from standby rail to WLAN rail in S5. */ + //set_gpio(GPIO_WLAN_DISABLE_L, 0); + /* Disable LTE */ + //set_gpio(GPIO_LTE_DISABLE_L, 0); + + /* Enable wake events */ + //google_chromeec_set_wake_mask(MAINBOARD_EC_S5_WAKE_EVENTS); + break; + } + + /* Disable SCI and SMI events */ + //google_chromeec_set_smi_mask(0); + //google_chromeec_set_sci_mask(0); + + /* Clear pending events that may trigger immediate wake */ + //while (google_chromeec_get_event() != 0); +} + +#define APMC_FINALIZE 0xcb + +static int mainboard_finalized = 0; + +int mainboard_smi_apmc(u8 apmc) +{ + switch (apmc) { + case APMC_FINALIZE: + if (mainboard_finalized) { + printk(BIOS_DEBUG, "SMI#: Already finalized\n"); + return 0; + } + + intel_pch_finalize_smm(); + intel_northbridge_haswell_finalize_smm(); + intel_cpu_haswell_finalize_smm(); + + mainboard_finalized = 1; + break; + case APM_CNT_ACPI_ENABLE: + //google_chromeec_set_smi_mask(0); + /* Clear all pending events */ + //while (google_chromeec_get_event() != 0); + //google_chromeec_set_sci_mask(MAINBOARD_EC_SCI_EVENTS); + break; + case APM_CNT_ACPI_DISABLE: + //google_chromeec_set_sci_mask(0); + /* Clear all pending events */ + //while (google_chromeec_get_event() != 0); + //google_chromeec_set_smi_mask(MAINBOARD_EC_SMI_EVENTS);; + break; + } + return 0; +} diff --git a/src/mainboard/google/panther/thermal.h b/src/mainboard/google/panther/thermal.h new file mode 100644 index 0000000..794065e --- /dev/null +++ b/src/mainboard/google/panther/thermal.h @@ -0,0 +1,57 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2012 Google Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#ifndef THERMAL_H +#define THERMAL_H + +/* Fan is OFF */ +#define FAN4_THRESHOLD_OFF 0 +#define FAN4_THRESHOLD_ON 0 +#define FAN4_PWM 0x00 + +/* Fan is at LOW speed */ +#define FAN3_THRESHOLD_OFF 48 +#define FAN3_THRESHOLD_ON 55 +#define FAN3_PWM 0x40 + +/* Fan is at MEDIUM speed */ +#define FAN2_THRESHOLD_OFF 52 +#define FAN2_THRESHOLD_ON 64 +#define FAN2_PWM 0x80 + +/* Fan is at HIGH speed */ +#define FAN1_THRESHOLD_OFF 60 +#define FAN1_THRESHOLD_ON 68 +#define FAN1_PWM 0xb0 + +/* Fan is at FULL speed */ +#define FAN0_THRESHOLD_OFF 66 +#define FAN0_THRESHOLD_ON 78 +#define FAN0_PWM 0xff + +/* Temperature which OS will shutdown at */ +#define CRITICAL_TEMPERATURE 100 + +/* Temperature which OS will throttle CPU */ +#define PASSIVE_TEMPERATURE 90 + +/* Tj_max value for calculating PECI CPU temperature */ +#define MAX_TEMPERATURE 100 + +#endif

1 0

Patch set updated for coreboot: 4446a38 google/panther: Fix thermal zone to use SIO PWM/TACH port 2
by Paul Menzel 06 Jul '14

06 Jul '14

Paul Menzel (paulepanter(a)users.sourceforge.net) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5991 -gerrit commit 4446a3801d19ef7e4a83c73c71fc44c1e6e630eb Author: Mohammed Habibulla <moch(a)chromium.org> Date: Tue Oct 29 11:02:30 2013 -0700 google/panther: Fix thermal zone to use SIO PWM/TACH port 2 Fan is attached to port 2 instead of 3. (panther port of I9878063a24b0b908c74522580f776a4ce7d03d75) BUG=chrome-os-partner:23563 TEST=none BRANCH=panther Change-Id: I028e0e5a748fa0a20d34e27e870e14ed8c75e4d1 Signed-off-by: Matt DeVillier <matt.devillier(a)gmail.com> Signed-off-by: Paul Menzel <paulepanter(a)users.sourceforge.net> Reviewed-on: https://chromium-review.googlesource.com/174984 Reviewed-by: Duncan Laurie <dlaurie(a)chromium.org> Commit-Queue: Mohammed Habibulla <moch(a)chromium.org> Tested-by: Mohammed Habibulla <moch(a)chromium.org> --- src/mainboard/google/panther/acpi/thermal.asl | 20 ++++++++++---------- 1 file changed, 10 insertions(+), 10 deletions(-) diff --git a/src/mainboard/google/panther/acpi/thermal.asl b/src/mainboard/google/panther/acpi/thermal.asl index d96d955..d5b1290 100644 --- a/src/mainboard/google/panther/acpi/thermal.asl +++ b/src/mainboard/google/panther/acpi/thermal.asl @@ -141,12 +141,12 @@ Scope (\_TZ) } Method (_ON) { Store (0, \FLVL) - Store (\F0PW, \_SB.PCI0.LPCB.SIO.ENVC.F3PS) + Store (\F0PW, \_SB.PCI0.LPCB.SIO.ENVC.F2PS) Notify (\_TZ.THRM, 0x81) } Method (_OFF) { Store (1, \FLVL) - Store (\F1PW, \_SB.PCI0.LPCB.SIO.ENVC.F3PS) + Store (\F1PW, \_SB.PCI0.LPCB.SIO.ENVC.F2PS) Notify (\_TZ.THRM, 0x81) } } @@ -162,12 +162,12 @@ Scope (\_TZ) } Method (_ON) { Store (1, \FLVL) - Store (\F1PW, \_SB.PCI0.LPCB.SIO.ENVC.F3PS) + Store (\F1PW, \_SB.PCI0.LPCB.SIO.ENVC.F2PS) Notify (\_TZ.THRM, 0x81) } Method (_OFF) { Store (2, \FLVL) - Store (\F2PW, \_SB.PCI0.LPCB.SIO.ENVC.F3PS) + Store (\F2PW, \_SB.PCI0.LPCB.SIO.ENVC.F2PS) Notify (\_TZ.THRM, 0x81) } } @@ -183,12 +183,12 @@ Scope (\_TZ) } Method (_ON) { Store (2, \FLVL) - Store (\F2PW, \_SB.PCI0.LPCB.SIO.ENVC.F3PS) + Store (\F2PW, \_SB.PCI0.LPCB.SIO.ENVC.F2PS) Notify (\_TZ.THRM, 0x81) } Method (_OFF) { Store (3, \FLVL) - Store (\F3PW, \_SB.PCI0.LPCB.SIO.ENVC.F3PS) + Store (\F3PW, \_SB.PCI0.LPCB.SIO.ENVC.F2PS) Notify (\_TZ.THRM, 0x81) } } @@ -204,12 +204,12 @@ Scope (\_TZ) } Method (_ON) { Store (3, \FLVL) - Store (\F3PW, \_SB.PCI0.LPCB.SIO.ENVC.F3PS) + Store (\F3PW, \_SB.PCI0.LPCB.SIO.ENVC.F2PS) Notify (\_TZ.THRM, 0x81) } Method (_OFF) { Store (4, \FLVL) - Store (\F4PW, \_SB.PCI0.LPCB.SIO.ENVC.F3PS) + Store (\F4PW, \_SB.PCI0.LPCB.SIO.ENVC.F2PS) Notify (\_TZ.THRM, 0x81) } } @@ -225,12 +225,12 @@ Scope (\_TZ) } Method (_ON) { Store (4, \FLVL) - Store (\F4PW, \_SB.PCI0.LPCB.SIO.ENVC.F3PS) + Store (\F4PW, \_SB.PCI0.LPCB.SIO.ENVC.F2PS) Notify (\_TZ.THRM, 0x81) } Method (_OFF) { Store (4, \FLVL) - Store (\F4PW, \_SB.PCI0.LPCB.SIO.ENVC.F3PS) + Store (\F4PW, \_SB.PCI0.LPCB.SIO.ENVC.F2PS) Notify (\_TZ.THRM, 0x81) } }

1 0

Patch set updated for coreboot: c9e3642 google/panther: Use ISO C99 syntax for designated initializers
by Paul Menzel 06 Jul '14

06 Jul '14

Paul Menzel (paulepanter(a)users.sourceforge.net) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/6024 -gerrit commit c9e3642780cd78a105bd611a244b4e923e6b4d21 Author: Matt DeVillier <matt.devillier(a)gmail.com> Date: Thu Jun 12 12:21:07 2014 -0500 google/panther: Use ISO C99 syntax for designated initializers In C99 we defined a syntax for this. GCC’s old syntax is deprecated. Modelled after commit 8089f178 (mainboard/lenovo/x230 Fix usage of GNU field designator extension) [1]. [1] http://review.coreboot.org/5392 Change-Id: I51c72252800be64b9420d845e330fc0481c66470 Signed-off-by: Matt DeVillier <matt.devillier(a)gmail.com> --- src/mainboard/google/panther/romstage.c | 50 ++++++++++++++++----------------- 1 file changed, 25 insertions(+), 25 deletions(-) diff --git a/src/mainboard/google/panther/romstage.c b/src/mainboard/google/panther/romstage.c index 3496b53..c367968 100644 --- a/src/mainboard/google/panther/romstage.c +++ b/src/mainboard/google/panther/romstage.c @@ -80,35 +80,35 @@ const struct rcba_config_instruction rcba_config[] = { void mainboard_romstage_entry(unsigned long bist) { struct pei_data pei_data = { - pei_version: PEI_VERSION, - mchbar: DEFAULT_MCHBAR, - dmibar: DEFAULT_DMIBAR, - epbar: DEFAULT_EPBAR, - pciexbar: DEFAULT_PCIEXBAR, - smbusbar: SMBUS_IO_BASE, - wdbbar: 0x4000000, - wdbsize: 0x1000, - hpet_address: HPET_ADDR, - rcba: DEFAULT_RCBA, - pmbase: DEFAULT_PMBASE, - gpiobase: DEFAULT_GPIOBASE, - temp_mmio_base: 0xfed08000, - system_type: 5, /* ULT */ - tseg_size: CONFIG_SMM_TSEG_SIZE, - spd_addresses: { 0xa0, 0x00, 0xa4, 0x00 }, - ec_present: 0, + .pei_version = PEI_VERSION, + .mchbar = DEFAULT_MCHBAR, + .dmibar = DEFAULT_DMIBAR, + .epbar = DEFAULT_EPBAR, + .pciexbar = DEFAULT_PCIEXBAR, + .smbusbar = SMBUS_IO_BASE, + .wdbbar = 0x4000000, + .wdbsize = 0x1000, + .hpet_address = HPET_ADDR, + .rcba = DEFAULT_RCBA, + .pmbase = DEFAULT_PMBASE, + .gpiobase = DEFAULT_GPIOBASE, + .temp_mmio_base = 0xfed08000, + .system_type = 5, /* ULT */ + .tseg_size = CONFIG_SMM_TSEG_SIZE, + .spd_addresses = { 0xa0, 0x00, 0xa4, 0x00 }, + .ec_present = 0, // 0 = leave channel enabled // 1 = disable dimm 0 on channel // 2 = disable dimm 1 on channel // 3 = disable dimm 0+1 on channel - dimm_channel0_disabled: 2, - dimm_channel1_disabled: 2, + .dimm_channel0_disabled = 2, + .dimm_channel1_disabled = 2, // Enable 2x refresh mode - ddr_refresh_2x: 1, - dq_pins_interleaved: 1, - max_ddr3_freq: 1600, - usb_xhci_on_resume: 1, - usb2_ports: { + .ddr_refresh_2x = 1, + .dq_pins_interleaved = 1, + .max_ddr3_freq = 1600, + .usb_xhci_on_resume = 1, + .usb2_ports = { /* Length, Enable, OCn#, Location */ { 0x0064, 1, 0, /* P0: VP8 */ USB_PORT_MINI_PCIE }, @@ -127,7 +127,7 @@ void mainboard_romstage_entry(unsigned long bist) { 0x0000, 0, 0, /* P7: N/C */ USB_PORT_SKIP }, }, - usb3_ports: { + .usb3_ports = { /* Enable, OCn# */ { 1, 0 }, /* P1; CN22 */ { 1, 1 }, /* P2; CN23 */

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Patch set updated for coreboot: f147197 google/panther: Add ACPI code to support wake-on-lan
by Paul Menzel 06 Jul '14

06 Jul '14

Paul Menzel (paulepanter(a)users.sourceforge.net) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5998 -gerrit commit f1471970f0e324c4f8e13dcf97d7193740a17b6d Author: Stefan Reinauer <reinauer(a)chromium.org> Date: Tue Jan 7 09:53:06 2014 -0800 google/panther: Add ACPI code to support wake-on-lan There needs to be an ACPI linkage to provide the power resource needed to wake this device so the kernel will enable the SCI before going to suspend. A link is added for both NIC and WLAN, but it is only tested on the NIC. This is a forward port from Duncan's beltino patch. BUG=chrome-os-partner:24657 BRANCH=panther TEST=build and boot on panther, suspend and wake with etherwake Change-Id: I2804d2e904e26d6e34f5a177f0dabc1aaa3f0288 Signed-off-by: Duncan Laurie <dlaurie(a)chromium.org> Signed-off-by: Stefan Reinauer <reinauer(a)chromium.org> Reviewed-by: Stefan Reinauer <reinauer(a)chromium.org> Reviewed-on: https://chromium-review.googlesource.com/181752 Commit-Queue: Stefan Reinauer <reinauer(a)chromium.org> Tested-by: Stefan Reinauer <reinauer(a)chromium.org> --- src/mainboard/google/panther/acpi/mainboard.asl | 45 +++++++++++++++++++++++++ src/mainboard/google/panther/dsdt.asl | 4 ++- src/mainboard/google/panther/onboard.h | 12 +++++++ 3 files changed, 60 insertions(+), 1 deletion(-) diff --git a/src/mainboard/google/panther/acpi/mainboard.asl b/src/mainboard/google/panther/acpi/mainboard.asl index 59ed710..867c1e0 100644 --- a/src/mainboard/google/panther/acpi/mainboard.asl +++ b/src/mainboard/google/panther/acpi/mainboard.asl @@ -19,11 +19,56 @@ * MA 02110-1301 USA */ +#include <mainboard/google/panther/onboard.h> + Scope (\_SB) { Device (PWRB) { Name(_HID, EisaId("PNP0C0C")) } +} + +/* + * LAN connected to Root Port 3, becomes Root Port 1 after coalesce + */ +Scope (\_SB.PCI0.RP01) +{ + Device (ETH0) + { + Name (_ADR, 0x00000000) + Name (_PRW, Package() { PANTHER_NIC_WAKE_GPIO, 3 }) + + Method (_DSW, 3, NotSerialized) + { + Store (PANTHER_NIC_WAKE_GPIO, Local0) + + If (LEqual (Arg0, 1)) { + // Enable GPIO as wake source + \_SB.PCI0.LPCB.GWAK (Local0) + } + } + } +} +/* + * WLAN connected to Root Port 4, becomes Root Port 2 after coalesce + */ +Scope (\_SB.PCI0.RP02) +{ + Device (WLAN) + { + Name (_ADR, 0x00000000) + Name (_PRW, Package() { PANTHER_WLAN_WAKE_GPIO, 3 }) + + Method (_DSW, 3, NotSerialized) + { + Store (PANTHER_WLAN_WAKE_GPIO, Local0) + + If (LEqual (Arg0, 1)) { + // Enable GPIO as wake source + \_SB.PCI0.LPCB.GWAK (Local0) + } + } + } } diff --git a/src/mainboard/google/panther/dsdt.asl b/src/mainboard/google/panther/dsdt.asl index 1316ebf..87076fe 100644 --- a/src/mainboard/google/panther/dsdt.asl +++ b/src/mainboard/google/panther/dsdt.asl @@ -31,7 +31,6 @@ DefinitionBlock( { // Some generic macros #include "acpi/platform.asl" - #include "acpi/mainboard.asl" // global NVS and variables #include <southbridge/intel/lynxpoint/acpi/globalnvs.asl> @@ -50,6 +49,9 @@ DefinitionBlock( } } + // Mainboard devices + #include "acpi/mainboard.asl" + // Thermal handler #include "acpi/thermal.asl" diff --git a/src/mainboard/google/panther/onboard.h b/src/mainboard/google/panther/onboard.h index 794dd8d..0b67017 100644 --- a/src/mainboard/google/panther/onboard.h +++ b/src/mainboard/google/panther/onboard.h @@ -1,4 +1,9 @@ +#ifndef __MAINBOARD_ONBOARD_H +#define __MAINBOARD_ONBOARD_H + +#ifndef __ACPI__ void lan_init(void); +#endif /* defines for programming the MAC address */ #define PANTHER_NIC_VENDOR_ID 0x10EC @@ -7,3 +12,10 @@ void lan_init(void); /* 0x00: White LINK LED and Amber ACTIVE LED */ #define PANTHER_NIC_LED_MODE 0x00 +/* NIC wake is GPIO 8 */ +#define PANTHER_NIC_WAKE_GPIO 8 + +/* WLAN wake is GPIO 10 */ +#define PANTHER_WLAN_WAKE_GPIO 10 + +#endif

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Patch set updated for coreboot: ed5a5bc google/panther: Disable DEVSLP for SATA
by Paul Menzel 06 Jul '14

06 Jul '14

Paul Menzel (paulepanter(a)users.sourceforge.net) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5999 -gerrit commit ed5a5bc513d8b13950893498c7ab1af3653fb652 Author: Stefan Reinauer <reinauer(a)chromium.org> Date: Wed Jan 8 15:20:59 2014 -0800 google/panther: Disable DEVSLP for SATA Some SSD modules don't support DEVSLP correctly due to their firmware. Since the power savings are minimal, don't use DEVSLP to prevent potential problems. Some of the symptoms are that sometimes this causes USB devices to not work properly. BUG=chrome-os-partner:23186, BRANCH=panther TEST=Boot tested on Panther Change-Id: Iba3f721c73e0e760b6a9861ca23480ddb923df40 Signed-off-by: Stefan Reinauer <reinauer(a)google.com> Signed-off-by: Stefan Reinauer <reinauer(a)chromium.org> Reviewed-on: https://chromium-review.googlesource.com/181957 Reviewed-by: Duncan Laurie <dlaurie(a)chromium.org> --- src/mainboard/google/panther/devicetree.cb | 1 + 1 file changed, 1 insertion(+) diff --git a/src/mainboard/google/panther/devicetree.cb b/src/mainboard/google/panther/devicetree.cb index f461c58..9fbe8e6 100644 --- a/src/mainboard/google/panther/devicetree.cb +++ b/src/mainboard/google/panther/devicetree.cb @@ -55,6 +55,7 @@ chip northbridge/intel/haswell register "ide_legacy_combined" = "0x0" register "sata_ahci" = "0x1" register "sata_port_map" = "0x1" + register "sata_devslp_disable" = "0x1" register "sio_acpi_mode" = "0" register "sio_i2c0_voltage" = "0" # 3.3V

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coreboot-gerrit July 2014