Matt DeVillier (matt.devillier(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/6021
-gerrit
commit c0dc62045bd31a9bc5ad5f7338fe0e6bec5d8a95
Author: Matt DeVillier <matt.devillier(a)gmail.com>
Date: Thu Jun 12 12:07:16 2014 -0500
panther: fix comment typo
Add missing double quote at end of comment
Change-Id: Ia3f27910d996e84ccf3250b4bdc8008ca27474d0
Signed-off-by: Matt DeVillier <matt.devillier(a)gmail.com>
---
src/mainboard/google/panther/acpi/thermal.asl | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/mainboard/google/panther/acpi/thermal.asl b/src/mainboard/google/panther/acpi/thermal.asl
index d4f030a..ddf4473 100644
--- a/src/mainboard/google/panther/acpi/thermal.asl
+++ b/src/mainboard/google/panther/acpi/thermal.asl
@@ -74,7 +74,7 @@ Scope (\_TZ)
// Get CPU Temperature from PECI via SuperIO TMPIN3
Store (\_SB.PCI0.LPCB.SIO.ENVC.TIN3, Local0)
- // Check for "no reading available
+ // Check for "no reading available"
If (LEqual (Local0, 0x80)) {
Return (CTOK (\F2ON))
}
Matt DeVillier (matt.devillier(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/6023
-gerrit
commit a19da546923e2657e33b610aac58aa3b76e2ac3c
Author: Matt DeVillier <matt.devillier(a)gmail.com>
Date: Thu Jun 12 12:12:44 2014 -0500
panther: adjust critical temp
Set critical temp to match newer devices
Change-Id: I11f32297a9b8c9a3554821b5d1cd723d8d9e2b69
Signed-off-by: Matt DeVillier <matt.devillier(a)gmail.com>
---
src/mainboard/google/panther/thermal.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/mainboard/google/panther/thermal.h b/src/mainboard/google/panther/thermal.h
index 5b6d318..c5f9718 100644
--- a/src/mainboard/google/panther/thermal.h
+++ b/src/mainboard/google/panther/thermal.h
@@ -46,7 +46,7 @@
#define FAN0_PWM 0xff
/* Temperature which OS will shutdown at */
-#define CRITICAL_TEMPERATURE 100
+#define CRITICAL_TEMPERATURE 98
/* Temperature which OS will throttle CPU */
#define PASSIVE_TEMPERATURE 90
Matt DeVillier (matt.devillier(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/4132
-gerrit
commit fd5262b7908933db3698525c8e7201017e75b6c9
Author: Duncan Laurie <dlaurie(a)chromium.org>
Date: Fri Apr 19 11:03:40 2013 -0700
lynxpoint: Build intermediate step to add LynxPoint ME image
This is needed to successfully build fox_wtm2 from external repo.
BUG=chrome-os-partner:18638
BRANCH=none
TEST=manual: successfully compile coreboot for fox_wtm2 and
create an image with chromeos-bootimage/cros_bundle_firmware
Change-Id: Iaa4e9983faa1d86c2b29d8fd4f577be035497e38
Signed-off-by: Matt DeVillier <matt.devillier(a)gmail.com>
Signed-off-by: Duncan Laurie <dlaurie(a)chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/48676
Reviewed-by: Aaron Durbin <adurbin(a)chromium.org>
---
src/southbridge/intel/lynxpoint/Makefile.inc | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/src/southbridge/intel/lynxpoint/Makefile.inc b/src/southbridge/intel/lynxpoint/Makefile.inc
index ce948f4..f0b6a7a 100644
--- a/src/southbridge/intel/lynxpoint/Makefile.inc
+++ b/src/southbridge/intel/lynxpoint/Makefile.inc
@@ -20,8 +20,7 @@
# Run an intermediate step when producing coreboot.rom
# that adds additional components to the final firmware
# image outside of CBFS
-# FIXME, uncomment as soon as we have ME firmware in the blobs repo
-# INTERMEDIATE:=lynxpoint_add_me
+INTERMEDIATE:=lynxpoint_add_me
ramstage-y += pch.c
ramstage-y += azalia.c