coreboot-gerrit February 2014

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Patch set updated for coreboot: 29028e3 uart8250: Split register definitions
by Kyösti Mälkki 15 Feb '14

15 Feb '14

Kyösti Mälkki (kyosti.malkki(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5233 -gerrit commit 29028e309c8f6cfc8c81fbb411006d532b13b230 Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Date: Fri Feb 14 06:59:51 2014 +0200 uart8250: Split register definitions Change-Id: Ideb7f55f329e1ae037debc156d3cb4a5b95bde22 Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- src/cpu/allwinner/a10/uart.c | 7 +-- src/drivers/uart/uart8250reg.h | 108 +++++++++++++++++++++++++++++++++++++++++ src/include/uart8250.h | 85 -------------------------------- src/lib/uart8250.c | 1 + src/lib/uart8250mem.c | 1 + 5 files changed, 111 insertions(+), 91 deletions(-) diff --git a/src/cpu/allwinner/a10/uart.c b/src/cpu/allwinner/a10/uart.c index dc98bff..83f677a 100644 --- a/src/cpu/allwinner/a10/uart.c +++ b/src/cpu/allwinner/a10/uart.c @@ -7,12 +7,7 @@ #include "uart.h" #include <arch/io.h> - -/* Give me my 8250 UART definitions!!!! */ -/* TODO: Clean this up when uart8250mem works on ARM */ -#undef CONFIG_CONSOLE_SERIAL8250MEM -#define CONFIG_CONSOLE_SERIAL8250MEM 1 -#include <uart8250.h> +#include "drivers/uart8250/uart8250reg.h" /** * \brief Configure line control settings for UART diff --git a/src/drivers/uart/uart8250reg.h b/src/drivers/uart/uart8250reg.h new file mode 100644 index 0000000..cdfbb1b --- /dev/null +++ b/src/drivers/uart/uart8250reg.h @@ -0,0 +1,108 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2003 Eric Biederman + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#ifndef UART8250REG_H +#define UART8250REG_H + +/* Data */ +#define UART_RBR 0x00 +#define UART_TBR 0x00 + +/* Control */ +#define UART_IER 0x01 +#define UART_IER_MSI 0x08 /* Enable Modem status interrupt */ +#define UART_IER_RLSI 0x04 /* Enable receiver line status interrupt */ +#define UART_IER_THRI 0x02 /* Enable Transmitter holding register int. */ +#define UART_IER_RDI 0x01 /* Enable receiver data interrupt */ + +#define UART_IIR 0x02 +#define UART_IIR_NO_INT 0x01 /* No interrupts pending */ +#define UART_IIR_ID 0x06 /* Mask for the interrupt ID */ + +#define UART_IIR_MSI 0x00 /* Modem status interrupt */ +#define UART_IIR_THRI 0x02 /* Transmitter holding register empty */ +#define UART_IIR_RDI 0x04 /* Receiver data interrupt */ +#define UART_IIR_RLSI 0x06 /* Receiver line status interrupt */ + +#define UART_FCR 0x02 +#define UART_FCR_FIFO_EN 0x01 /* Fifo enable */ +#define UART_FCR_CLEAR_RCVR 0x02 /* Clear the RCVR FIFO */ +#define UART_FCR_CLEAR_XMIT 0x04 /* Clear the XMIT FIFO */ +#define UART_FCR_DMA_SELECT 0x08 /* For DMA applications */ +#define UART_FCR_TRIGGER_MASK 0xC0 /* Mask for the FIFO trigger range */ +#define UART_FCR_TRIGGER_1 0x00 /* Mask for trigger set at 1 */ +#define UART_FCR_TRIGGER_4 0x40 /* Mask for trigger set at 4 */ +#define UART_FCR_TRIGGER_8 0x80 /* Mask for trigger set at 8 */ +#define UART_FCR_TRIGGER_14 0xC0 /* Mask for trigger set at 14 */ + +#define UART_FCR_RXSR 0x02 /* Receiver soft reset */ +#define UART_FCR_TXSR 0x04 /* Transmitter soft reset */ + +#define UART_LCR 0x03 +#define UART_LCR_WLS_MSK 0x03 /* character length select mask */ +#define UART_LCR_WLS_5 0x00 /* 5 bit character length */ +#define UART_LCR_WLS_6 0x01 /* 6 bit character length */ +#define UART_LCR_WLS_7 0x02 /* 7 bit character length */ +#define UART_LCR_WLS_8 0x03 /* 8 bit character length */ +#define UART_LCR_STB 0x04 /* Number of stop Bits, off = 1, on = 1.5 or 2) */ +#define UART_LCR_PEN 0x08 /* Parity enable */ +#define UART_LCR_EPS 0x10 /* Even Parity Select */ +#define UART_LCR_STKP 0x20 /* Stick Parity */ +#define UART_LCR_SBRK 0x40 /* Set Break */ +#define UART_LCR_BKSE 0x80 /* Bank select enable */ +#define UART_LCR_DLAB 0x80 /* Divisor latch access bit */ + +#define UART_MCR 0x04 +#define UART_MCR_DTR 0x01 /* DTR */ +#define UART_MCR_RTS 0x02 /* RTS */ +#define UART_MCR_OUT1 0x04 /* Out 1 */ +#define UART_MCR_OUT2 0x08 /* Out 2 */ +#define UART_MCR_LOOP 0x10 /* Enable loopback test mode */ + +#define UART_MCR_DMA_EN 0x04 +#define UART_MCR_TX_DFR 0x08 + +#define UART_DLL 0x00 +#define UART_DLM 0x01 + +/* Status */ +#define UART_LSR 0x05 +#define UART_LSR_DR 0x01 /* Data ready */ +#define UART_LSR_OE 0x02 /* Overrun */ +#define UART_LSR_PE 0x04 /* Parity error */ +#define UART_LSR_FE 0x08 /* Framing error */ +#define UART_LSR_BI 0x10 /* Break */ +#define UART_LSR_THRE 0x20 /* Xmit holding register empty */ +#define UART_LSR_TEMT 0x40 /* Xmitter empty */ +#define UART_LSR_ERR 0x80 /* Error */ + +#define UART_MSR 0x06 +#define UART_MSR_DCD 0x80 /* Data Carrier Detect */ +#define UART_MSR_RI 0x40 /* Ring Indicator */ +#define UART_MSR_DSR 0x20 /* Data Set Ready */ +#define UART_MSR_CTS 0x10 /* Clear to Send */ +#define UART_MSR_DDCD 0x08 /* Delta DCD */ +#define UART_MSR_TERI 0x04 /* Trailing edge ring indicator */ +#define UART_MSR_DDSR 0x02 /* Delta DSR */ +#define UART_MSR_DCTS 0x01 /* Delta CTS */ + +#define UART_SCR 0x07 +#define UART_SPR 0x07 + +#endif /* UART8250REG_H */ diff --git a/src/include/uart8250.h b/src/include/uart8250.h index 598cdfa..a214ce1 100644 --- a/src/include/uart8250.h +++ b/src/include/uart8250.h @@ -22,91 +22,6 @@ #if CONFIG_CONSOLE_SERIAL8250 || CONFIG_CONSOLE_SERIAL8250MEM -/* Data */ -#define UART_RBR 0x00 -#define UART_TBR 0x00 - -/* Control */ -#define UART_IER 0x01 -#define UART_IER_MSI 0x08 /* Enable Modem status interrupt */ -#define UART_IER_RLSI 0x04 /* Enable receiver line status interrupt */ -#define UART_IER_THRI 0x02 /* Enable Transmitter holding register int. */ -#define UART_IER_RDI 0x01 /* Enable receiver data interrupt */ - -#define UART_IIR 0x02 -#define UART_IIR_NO_INT 0x01 /* No interrupts pending */ -#define UART_IIR_ID 0x06 /* Mask for the interrupt ID */ - -#define UART_IIR_MSI 0x00 /* Modem status interrupt */ -#define UART_IIR_THRI 0x02 /* Transmitter holding register empty */ -#define UART_IIR_RDI 0x04 /* Receiver data interrupt */ -#define UART_IIR_RLSI 0x06 /* Receiver line status interrupt */ - -#define UART_FCR 0x02 -#define UART_FCR_FIFO_EN 0x01 /* Fifo enable */ -#define UART_FCR_CLEAR_RCVR 0x02 /* Clear the RCVR FIFO */ -#define UART_FCR_CLEAR_XMIT 0x04 /* Clear the XMIT FIFO */ -#define UART_FCR_DMA_SELECT 0x08 /* For DMA applications */ -#define UART_FCR_TRIGGER_MASK 0xC0 /* Mask for the FIFO trigger range */ -#define UART_FCR_TRIGGER_1 0x00 /* Mask for trigger set at 1 */ -#define UART_FCR_TRIGGER_4 0x40 /* Mask for trigger set at 4 */ -#define UART_FCR_TRIGGER_8 0x80 /* Mask for trigger set at 8 */ -#define UART_FCR_TRIGGER_14 0xC0 /* Mask for trigger set at 14 */ - -#define UART_FCR_RXSR 0x02 /* Receiver soft reset */ -#define UART_FCR_TXSR 0x04 /* Transmitter soft reset */ - -#define UART_LCR 0x03 -#define UART_LCR_WLS_MSK 0x03 /* character length select mask */ -#define UART_LCR_WLS_5 0x00 /* 5 bit character length */ -#define UART_LCR_WLS_6 0x01 /* 6 bit character length */ -#define UART_LCR_WLS_7 0x02 /* 7 bit character length */ -#define UART_LCR_WLS_8 0x03 /* 8 bit character length */ -#define UART_LCR_STB 0x04 /* Number of stop Bits, off = 1, on = 1.5 or 2) */ -#define UART_LCR_PEN 0x08 /* Parity enable */ -#define UART_LCR_EPS 0x10 /* Even Parity Select */ -#define UART_LCR_STKP 0x20 /* Stick Parity */ -#define UART_LCR_SBRK 0x40 /* Set Break */ -#define UART_LCR_BKSE 0x80 /* Bank select enable */ -#define UART_LCR_DLAB 0x80 /* Divisor latch access bit */ - -#define UART_MCR 0x04 -#define UART_MCR_DTR 0x01 /* DTR */ -#define UART_MCR_RTS 0x02 /* RTS */ -#define UART_MCR_OUT1 0x04 /* Out 1 */ -#define UART_MCR_OUT2 0x08 /* Out 2 */ -#define UART_MCR_LOOP 0x10 /* Enable loopback test mode */ - -#define UART_MCR_DMA_EN 0x04 -#define UART_MCR_TX_DFR 0x08 - -#define UART_DLL 0x00 -#define UART_DLM 0x01 - -/* Status */ -#define UART_LSR 0x05 -#define UART_LSR_DR 0x01 /* Data ready */ -#define UART_LSR_OE 0x02 /* Overrun */ -#define UART_LSR_PE 0x04 /* Parity error */ -#define UART_LSR_FE 0x08 /* Framing error */ -#define UART_LSR_BI 0x10 /* Break */ -#define UART_LSR_THRE 0x20 /* Xmit holding register empty */ -#define UART_LSR_TEMT 0x40 /* Xmitter empty */ -#define UART_LSR_ERR 0x80 /* Error */ - -#define UART_MSR 0x06 -#define UART_MSR_DCD 0x80 /* Data Carrier Detect */ -#define UART_MSR_RI 0x40 /* Ring Indicator */ -#define UART_MSR_DSR 0x20 /* Data Set Ready */ -#define UART_MSR_CTS 0x10 /* Clear to Send */ -#define UART_MSR_DDCD 0x08 /* Delta DCD */ -#define UART_MSR_TERI 0x04 /* Trailing edge ring indicator */ -#define UART_MSR_DDSR 0x02 /* Delta DSR */ -#define UART_MSR_DCTS 0x01 /* Delta CTS */ - -#define UART_SCR 0x07 -#define UART_SPR 0x07 - #if ((115200 % CONFIG_TTYS0_BAUD) != 0) #error Bad ttyS0 baud rate #endif diff --git a/src/lib/uart8250.c b/src/lib/uart8250.c index bcb137a..4d2cb63 100644 --- a/src/lib/uart8250.c +++ b/src/lib/uart8250.c @@ -21,6 +21,7 @@ #include <arch/io.h> #include <uart8250.h> #include <trace.h> +#include "drivers/uart/uart8250reg.h" /* Should support 8250, 16450, 16550, 16550A type UARTs */ diff --git a/src/lib/uart8250mem.c b/src/lib/uart8250mem.c index 26c83fa..cff67d7 100644 --- a/src/lib/uart8250mem.c +++ b/src/lib/uart8250mem.c @@ -22,6 +22,7 @@ #include <uart8250.h> #include <device/device.h> #include <delay.h> +#include "drivers/uart/uart8250reg.h" /* Should support 8250, 16450, 16550, 16550A type UARTs */

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Patch set updated for coreboot: 95879c3 uart8250io: Unify calls with generic UART
by Kyösti Mälkki 15 Feb '14

15 Feb '14

Kyösti Mälkki (kyosti.malkki(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5234 -gerrit commit 95879c32a09950b4310e548a780bdb69a7a8b044 Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Date: Sat Feb 15 07:53:18 2014 +0200 uart8250io: Unify calls with generic UART Change-Id: I6d56648e56f2177e1d5332497321e718df18300c Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- src/arch/x86/lib/romcc_console.c | 8 +++----- src/arch/x86/lib/romstage_console.c | 6 +++--- src/console/uart8250_console.c | 10 +++++----- src/include/uart8250.h | 10 ---------- src/lib/uart8250.c | 31 ++++++++++++++++++++++++------- 5 files changed, 35 insertions(+), 30 deletions(-) diff --git a/src/arch/x86/lib/romcc_console.c b/src/arch/x86/lib/romcc_console.c index 0f0e017..5a88146 100644 --- a/src/arch/x86/lib/romcc_console.c +++ b/src/arch/x86/lib/romcc_console.c @@ -20,6 +20,7 @@ #include <stdint.h> #include <console/loglevel.h> #include <console/post_codes.h> +#include <console/uart.h> #include <console/ne2k.h> /* __PRE_RAM__ */ @@ -28,9 +29,6 @@ * we could use the same code on all architectures. */ #define console_loglevel CONFIG_DEFAULT_CONSOLE_LOGLEVEL -#if CONFIG_CONSOLE_SERIAL8250 -#include <uart8250.h> -#endif #include <console/util.c> @@ -44,7 +42,7 @@ static void __console_tx_byte(unsigned char byte) { #if CONFIG_CONSOLE_SERIAL8250 - uart8250_tx_byte(CONFIG_TTYS0_BASE, byte); + uart_tx_byte(byte); #endif #if CONFIG_CONSOLE_NE2K ne2k_append_data_byte(byte, CONFIG_CONSOLE_NE2K_IO_PORT); @@ -65,7 +63,7 @@ static void __console_tx_char(int loglevel, unsigned char byte) { if (console_loglevel >= loglevel) { #if CONFIG_CONSOLE_SERIAL8250 - uart8250_tx_byte(CONFIG_TTYS0_BASE, byte); + uart_tx_byte(byte); #endif #if CONFIG_CONSOLE_NE2K ne2k_append_data_byte(byte, CONFIG_CONSOLE_NE2K_IO_PORT); diff --git a/src/arch/x86/lib/romstage_console.c b/src/arch/x86/lib/romstage_console.c index 4981f39..89d7f82 100644 --- a/src/arch/x86/lib/romstage_console.c +++ b/src/arch/x86/lib/romstage_console.c @@ -26,7 +26,7 @@ #include <console/spkmodem.h> #include <console/vtxprintf.h> -#if CONFIG_CONSOLE_SERIAL8250 || CONFIG_CONSOLE_SERIAL8250MEM +#if CONFIG_CONSOLE_SERIAL8250MEM #include <uart8250.h> #endif @@ -42,7 +42,7 @@ void console_tx_byte(unsigned char byte) } #endif #if CONFIG_CONSOLE_SERIAL8250 - uart8250_tx_byte(CONFIG_TTYS0_BASE, byte); + uart_tx_byte(byte); #endif #if CONFIG_USBDEBUG && (CONFIG_USBDEBUG_IN_ROMSTAGE || !defined(__PRE_RAM__)) usb_tx_byte(0, byte); @@ -64,7 +64,7 @@ void console_tx_flush(void) uart8250_mem_tx_flush(CONFIG_OXFORD_OXPCIE_BASE_ADDRESS + 0x1000); #endif #if CONFIG_CONSOLE_SERIAL8250 - uart8250_tx_flush(CONFIG_TTYS0_BASE); + uart_tx_flush(); #endif #if CONFIG_CONSOLE_NE2K ne2k_transmit(CONFIG_CONSOLE_NE2K_IO_PORT); diff --git a/src/console/uart8250_console.c b/src/console/uart8250_console.c index 196412c..52f59f6 100644 --- a/src/console/uart8250_console.c +++ b/src/console/uart8250_console.c @@ -18,7 +18,7 @@ */ #include <console/console.h> -#include <uart8250.h> +#include <console/uart.h> static void ttyS0_init(void) { @@ -27,22 +27,22 @@ static void ttyS0_init(void) static void ttyS0_tx_byte(unsigned char data) { - uart8250_tx_byte(CONFIG_TTYS0_BASE, data); + uart_tx_byte(data); } static void ttyS0_tx_flush(void) { - uart8250_tx_flush(CONFIG_TTYS0_BASE); + uart_tx_flush(); } static unsigned char ttyS0_rx_byte(void) { - return uart8250_rx_byte(CONFIG_TTYS0_BASE); + return uart_rx_byte(); } static int ttyS0_tst_byte(void) { - return uart8250_can_rx_byte(CONFIG_TTYS0_BASE); + return uart_can_rx_byte(); } static const struct console_driver uart8250_console __console = { diff --git a/src/include/uart8250.h b/src/include/uart8250.h index a214ce1..4d7ebcc 100644 --- a/src/include/uart8250.h +++ b/src/include/uart8250.h @@ -26,16 +26,6 @@ #error Bad ttyS0 baud rate #endif -#if CONFIG_CONSOLE_SERIAL8250 -unsigned char uart8250_rx_byte(unsigned base_port); -int uart8250_can_rx_byte(unsigned base_port); -void uart8250_tx_byte(unsigned base_port, unsigned char data); -void uart8250_tx_flush(unsigned base_port); -/* Yes it is silly to have three different uart init functions. But we used to - * have three different sets of uart code, so it's an improvement. - */ -void uart8250_init(unsigned base_port, unsigned divisor); -#endif #if CONFIG_CONSOLE_SERIAL8250MEM void uartmem_init(void); diff --git a/src/lib/uart8250.c b/src/lib/uart8250.c index 4d2cb63..75caa06 100644 --- a/src/lib/uart8250.c +++ b/src/lib/uart8250.c @@ -19,7 +19,7 @@ */ #include <arch/io.h> -#include <uart8250.h> +#include <console/uart.h> #include <trace.h> #include "drivers/uart/uart8250reg.h" @@ -51,23 +51,23 @@ static inline void uart8250_wait_until_sent(unsigned base_port) while (i-- && !(inb(base_port + UART_LSR) & UART_LSR_TEMT)); } -void uart8250_tx_byte(unsigned base_port, unsigned char data) +static void uart8250_tx_byte(unsigned base_port, unsigned char data) { uart8250_wait_to_tx_byte(base_port); outb(data, base_port + UART_TBR); } -void uart8250_tx_flush(unsigned base_port) +static void uart8250_tx_flush(unsigned base_port) { uart8250_wait_until_sent(base_port); } -int uart8250_can_rx_byte(unsigned base_port) +static int uart8250_can_rx_byte(unsigned base_port) { return inb(base_port + UART_LSR) & UART_LSR_DR; } -unsigned char uart8250_rx_byte(unsigned base_port) +static unsigned char uart8250_rx_byte(unsigned base_port) { unsigned long int i = SINGLE_CHAR_TIMEOUT; while (i-- && !uart8250_can_rx_byte(base_port)); @@ -78,7 +78,7 @@ unsigned char uart8250_rx_byte(unsigned base_port) return 0x0; } -void uart8250_init(unsigned base_port, unsigned divisor) +static void uart8250_init(unsigned base_port, unsigned divisor) { DISABLE_TRACE; /* Disable interrupts */ @@ -101,8 +101,25 @@ void uart8250_init(unsigned base_port, unsigned divisor) ENABLE_TRACE; } +static const unsigned base = CONFIG_TTYS0_BASE; + void uart_init(void) { unsigned int div = uart_divisor(115200); - uart8250_init(CONFIG_TTYS0_BASE, div); + uart8250_init(base, div); +} + +void uart_tx_byte(unsigned char data) +{ + uart8250_tx_byte(base, data); +} + +unsigned char uart_rx_byte(void) +{ + return uart8250_rx_byte(base); +} + +void uart_tx_flush(void) +{ + uart8250_tx_flush(base); }

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Patch set updated for coreboot: 1cb8f04 console: Fix includes
by Kyösti Mälkki 15 Feb '14

15 Feb '14

Kyösti Mälkki (kyosti.malkki(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5232 -gerrit commit 1cb8f042fb5a58bac3f128e9c557c4267311605b Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Date: Fri Feb 14 06:11:01 2014 +0200 console: Fix includes Change-Id: Icbc9cd3e5bdfdab85d7dccd7c3827bba35248fb8 Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- src/arch/x86/lib/romcc_console.c | 1 + src/arch/x86/lib/romstage_console.c | 14 +++++--------- src/console/console.c | 6 ++++++ src/include/console/console.h | 16 ---------------- src/lib/cbmem.c | 1 + src/lib/cbmem_console.c | 1 + src/northbridge/intel/sandybridge/raminit.c | 1 + 7 files changed, 15 insertions(+), 25 deletions(-) diff --git a/src/arch/x86/lib/romcc_console.c b/src/arch/x86/lib/romcc_console.c index e517428..0f0e017 100644 --- a/src/arch/x86/lib/romcc_console.c +++ b/src/arch/x86/lib/romcc_console.c @@ -20,6 +20,7 @@ #include <stdint.h> #include <console/loglevel.h> #include <console/post_codes.h> +#include <console/ne2k.h> /* __PRE_RAM__ */ /* Using a global varible can cause problems when we reset the stack diff --git a/src/arch/x86/lib/romstage_console.c b/src/arch/x86/lib/romstage_console.c index 4ef702f..4981f39 100644 --- a/src/arch/x86/lib/romstage_console.c +++ b/src/arch/x86/lib/romstage_console.c @@ -19,20 +19,16 @@ #include <smp/node.h> #include <console/console.h> +#include <console/cbmem_console.h> +#include <console/uart.h> +#include <console/usb.h> +#include <console/ne2k.h> +#include <console/spkmodem.h> #include <console/vtxprintf.h> #if CONFIG_CONSOLE_SERIAL8250 || CONFIG_CONSOLE_SERIAL8250MEM #include <uart8250.h> #endif -#if CONFIG_USBDEBUG -#include <console/usb.h> -#endif -#if CONFIG_CONSOLE_NE2K -#include <console/ne2k.h> -#endif -#if CONFIG_SPKMODEM -#include <console/spkmodem.h> -#endif void console_tx_byte(unsigned char byte) { diff --git a/src/console/console.c b/src/console/console.c index 081113c..334e140 100644 --- a/src/console/console.c +++ b/src/console/console.c @@ -18,6 +18,12 @@ */ #include <console/console.h> +#include <console/cbmem_console.h> +#include <console/uart.h> +#include <console/usb.h> +#include <console/ne2k.h> +#include <console/spkmodem.h> + #include <build.h> #include <arch/hlt.h> #include <arch/io.h> diff --git a/src/include/console/console.h b/src/include/console/console.h index 4df8cb6..a089729 100644 --- a/src/include/console/console.h +++ b/src/include/console/console.h @@ -24,22 +24,6 @@ #include <console/loglevel.h> #include <console/post_codes.h> -#if CONFIG_CONSOLE_SERIAL -#include <console/uart.h> -#endif -#if CONFIG_USBDEBUG && !defined(__ROMCC__) -#include <console/usb.h> -#endif -#if CONFIG_CONSOLE_NE2K -#include <console/ne2k.h> -#endif -#if CONFIG_CONSOLE_CBMEM -#include <console/cbmem_console.h> -#endif -#if CONFIG_SPKMODEM -#include <console/spkmodem.h> -#endif - #ifndef __PRE_RAM__ unsigned char console_rx_byte(void); int console_tst_byte(void); diff --git a/src/lib/cbmem.c b/src/lib/cbmem.c index d97f6af..3fea49a 100644 --- a/src/lib/cbmem.c +++ b/src/lib/cbmem.c @@ -23,6 +23,7 @@ #include <cbmem.h> #include <boot/coreboot_tables.h> #include <console/console.h> +#include <console/cbmem_console.h> #include <arch/early_variables.h> #if CONFIG_HAVE_ACPI_RESUME && !defined(__PRE_RAM__) #include <arch/acpi.h> diff --git a/src/lib/cbmem_console.c b/src/lib/cbmem_console.c index 83d44e3..9d5419a 100644 --- a/src/lib/cbmem_console.c +++ b/src/lib/cbmem_console.c @@ -18,6 +18,7 @@ */ #include <console/console.h> +#include <console/cbmem_console.h> #include <cbmem.h> #include <arch/early_variables.h> #include <string.h> diff --git a/src/northbridge/intel/sandybridge/raminit.c b/src/northbridge/intel/sandybridge/raminit.c index b9c3839..bfb4033 100644 --- a/src/northbridge/intel/sandybridge/raminit.c +++ b/src/northbridge/intel/sandybridge/raminit.c @@ -18,6 +18,7 @@ */ #include <console/console.h> +#include <console/usb.h> #include <string.h> #include <arch/hlt.h> #include <arch/io.h>

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Patch set updated for coreboot: 9f1dd92 pl011 UART: Move under drivers/uart
by Kyösti Mälkki 15 Feb '14

15 Feb '14

Kyösti Mälkki (kyosti.malkki(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5162 -gerrit commit 9f1dd927dae40157bfe2102f2f16831594e9479c Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Date: Mon Feb 10 23:21:14 2014 +0200 pl011 UART: Move under drivers/uart Currently this is only a minimal stub to get console on qemu-armv7. Change-Id: I3f20b7f944bc7d0e5ace9d22198d4c16a3839d2c Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- src/drivers/uart/Kconfig | 4 ++ src/drivers/uart/Makefile.inc | 9 ++++ src/drivers/uart/pl011.c | 51 +++++++++++++++++++++ src/mainboard/emulation/qemu-armv7/Kconfig | 8 +++- src/mainboard/emulation/qemu-armv7/Makefile.inc | 4 -- src/mainboard/emulation/qemu-armv7/uart.c | 60 ------------------------- 6 files changed, 70 insertions(+), 66 deletions(-) diff --git a/src/drivers/uart/Kconfig b/src/drivers/uart/Kconfig index c1c3090..5c9a9d1 100644 --- a/src/drivers/uart/Kconfig +++ b/src/drivers/uart/Kconfig @@ -12,3 +12,7 @@ config HAVE_UART_SPECIAL bool default n +config DRIVERS_UART_PL011 + bool + default n + select HAVE_UART_SPECIAL diff --git a/src/drivers/uart/Makefile.inc b/src/drivers/uart/Makefile.inc new file mode 100644 index 0000000..9a8121e --- /dev/null +++ b/src/drivers/uart/Makefile.inc @@ -0,0 +1,9 @@ +ifeq ($(CONFIG_CONSOLE_SERIAL_UART),y) + +ifeq ($(CONFIG_DRIVERS_UART_PL011),y) +bootblock-$(CONFIG_BOOTBLOCK_CONSOLE) += pl011.c +romstage-$(CONFIG_EARLY_CONSOLE) += pl011.c +ramstage-y += pl011.c +endif + +endif diff --git a/src/drivers/uart/pl011.c b/src/drivers/uart/pl011.c new file mode 100644 index 0000000..a880c77 --- /dev/null +++ b/src/drivers/uart/pl011.c @@ -0,0 +1,51 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2013 Google, Inc. + * + * This software is licensed under the terms of the GNU General Public + * License version 2, as published by the Free Software Foundation, and + * may be copied, distributed, and modified under those terms. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <console/console.h> +#include <console/uart.h> + +static const uint32_t uart_base = CONFIG_CONSOLE_SERIAL_UART_ADDRESS; + +static void pl011_uart_tx_byte(unsigned int *tx_fifo, unsigned char data) +{ + *tx_fifo = (unsigned int)data; +} + +#if !defined(__PRE_RAM__) + +static const struct console_driver pl011_uart_console __console = { + .init = pl011_init_dev, + .tx_byte = pl011_uart_tx_byte, + .tx_flush = pl011_uart_tx_flush, +}; + +uint32_t uartmem_getbaseaddr(void) +{ + return VEXPRESS_UART0_IO_ADDRESS; +} +#else +void uart_init(void) +{ +} + +void uart_tx_byte(unsigned char data) +{ + pl011_uart_tx_byte((unsigned int *)uart_base, data); +} + +void uart_tx_flush(void) +{ +} +#endif diff --git a/src/mainboard/emulation/qemu-armv7/Kconfig b/src/mainboard/emulation/qemu-armv7/Kconfig index 9ab9767..edba627 100644 --- a/src/mainboard/emulation/qemu-armv7/Kconfig +++ b/src/mainboard/emulation/qemu-armv7/Kconfig @@ -25,8 +25,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy def_bool y select ARCH_ARMV7 select CPU_ARMLTD_CORTEX_A9 - select HAVE_UART_MEMORY_MAPPED - select HAVE_UART_SPECIAL + select DRIVERS_UART_PL011 select BOARD_ROMSIZE_KB_4096 config MAINBOARD_DIR @@ -49,6 +48,11 @@ config DRAM_SIZE_MB int default 1024 +config CONSOLE_SERIAL_UART_ADDRESS + hex + depends on CONSOLE_SERIAL_UART + default 0x10009000 + # Memory map for qemu vexpress-a9: # # 0x0000_0000: jump instruction (by qemu) diff --git a/src/mainboard/emulation/qemu-armv7/Makefile.inc b/src/mainboard/emulation/qemu-armv7/Makefile.inc index 431d9ab..d15495f 100644 --- a/src/mainboard/emulation/qemu-armv7/Makefile.inc +++ b/src/mainboard/emulation/qemu-armv7/Makefile.inc @@ -21,7 +21,3 @@ ramstage-y += media.c bootblock-y += timer.c romstage-y += timer.c ramstage-y += timer.c - -bootblock-$(CONFIG_BOOTBLOCK_CONSOLE) += uart.c -romstage-$(CONFIG_EARLY_CONSOLE) += uart.c -ramstage-y += uart.c diff --git a/src/mainboard/emulation/qemu-armv7/uart.c b/src/mainboard/emulation/qemu-armv7/uart.c deleted file mode 100644 index 0be1cf9..0000000 --- a/src/mainboard/emulation/qemu-armv7/uart.c +++ /dev/null @@ -1,60 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2013 Google, Inc. - * - * This software is licensed under the terms of the GNU General Public - * License version 2, as published by the Free Software Foundation, and - * may be copied, distributed, and modified under those terms. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#include <console/console.h> -#include <console/uart.h> - -#define VEXPRESS_UART0_IO_ADDRESS (0x10009000) - -static void pl011_init_dev(void) { -} - -static void pl011_uart_tx_byte(unsigned char data) { - static volatile unsigned int *uart0_address = - (unsigned int *)VEXPRESS_UART0_IO_ADDRESS; - - *uart0_address = (unsigned int)data; -} - -static void pl011_uart_tx_flush(void) { -} - -#if !defined(__PRE_RAM__) - -static const struct console_driver pl011_uart_console __console = { - .init = pl011_init_dev, - .tx_byte = pl011_uart_tx_byte, - .tx_flush = pl011_uart_tx_flush, -}; - -uint32_t uartmem_getbaseaddr(void) -{ - return VEXPRESS_UART0_IO_ADDRESS; -} -#else -void uart_init(void) -{ - pl011_init_dev(); -} - -void uart_tx_byte(unsigned char data) -{ - pl011_uart_tx_byte(data); -} - -void uart_tx_flush(void) { - pl011_uart_tx_flush(); -} -#endif

1 0

Patch set updated for coreboot: ded94c0 console: Add drivers/uart
by Kyösti Mälkki 15 Feb '14

15 Feb '14

Kyösti Mälkki (kyosti.malkki(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5230 -gerrit commit ded94c0b2a03b00bbdd77a021c3ce0dac0f4bf65 Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Date: Sat Feb 15 13:58:01 2014 +0200 console: Add drivers/uart Also move UART related Kconfig options from top-level file. Change-Id: I4e407977cff6f6506f991600c98d6d264676d3f8 Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- src/Kconfig | 14 -------- src/console/util.c | 2 +- src/cpu/allwinner/a10/uart_console.c | 2 +- src/cpu/samsung/exynos5250/uart.c | 2 +- src/cpu/samsung/exynos5420/uart.c | 2 +- src/cpu/ti/am335x/uart.c | 2 +- src/drivers/Kconfig | 1 + src/drivers/Makefile.inc | 1 + src/drivers/uart/Kconfig | 14 ++++++++ src/include/console/console.h | 2 +- src/include/console/uart.h | 9 ++++++ src/include/uart.h | 44 -------------------------- src/include/uart8250.h | 3 -- src/mainboard/cubietech/cubieboard/bootblock.c | 2 +- src/mainboard/emulation/qemu-armv7/uart.c | 2 +- src/mainboard/ti/beaglebone/bootblock.c | 2 +- 16 files changed, 34 insertions(+), 70 deletions(-) diff --git a/src/Kconfig b/src/Kconfig index 94fea2d..bb25afd 100644 --- a/src/Kconfig +++ b/src/Kconfig @@ -292,20 +292,6 @@ config MMCONF_SUPPORT source src/console/Kconfig -# This should default to N and be set by SuperI/O drivers that have an UART -config HAVE_UART_IO_MAPPED - bool - default y if ARCH_X86 - default n if ARCH_ARMV7 - -config HAVE_UART_MEMORY_MAPPED - bool - default n - -config HAVE_UART_SPECIAL - bool - default n - config HAVE_ACPI_RESUME bool default n diff --git a/src/console/util.c b/src/console/util.c index 405657d..741a0d4 100644 --- a/src/console/util.c +++ b/src/console/util.c @@ -16,7 +16,7 @@ */ #include <console/console.h> -#include <uart8250.h> +#include <console/uart.h> #if CONFIG_USE_OPTION_TABLE #include <option.h> #include "option_table.h" diff --git a/src/cpu/allwinner/a10/uart_console.c b/src/cpu/allwinner/a10/uart_console.c index 58930dd..94ab7f7 100644 --- a/src/cpu/allwinner/a10/uart_console.c +++ b/src/cpu/allwinner/a10/uart_console.c @@ -8,7 +8,7 @@ #include <config.h> #include <types.h> -#include <uart.h> +#include <console/uart.h> #include <arch/io.h> #include <console/console.h> diff --git a/src/cpu/samsung/exynos5250/uart.c b/src/cpu/samsung/exynos5250/uart.c index dbf7202..80e9f4e 100644 --- a/src/cpu/samsung/exynos5250/uart.c +++ b/src/cpu/samsung/exynos5250/uart.c @@ -18,7 +18,7 @@ */ #include <console/console.h> /* for __console definition */ -#include <uart.h> +#include <console/uart.h> #include <arch/io.h> #include "uart.h" #include "clk.h" diff --git a/src/cpu/samsung/exynos5420/uart.c b/src/cpu/samsung/exynos5420/uart.c index c5c8a8c..ac01488 100644 --- a/src/cpu/samsung/exynos5420/uart.c +++ b/src/cpu/samsung/exynos5420/uart.c @@ -18,7 +18,7 @@ */ #include <console/console.h> /* for __console definition */ -#include <uart.h> +#include <console/uart.h> #include <arch/io.h> #include "uart.h" #include "clk.h" diff --git a/src/cpu/ti/am335x/uart.c b/src/cpu/ti/am335x/uart.c index bd2ff44..448b1c2 100644 --- a/src/cpu/ti/am335x/uart.c +++ b/src/cpu/ti/am335x/uart.c @@ -18,7 +18,7 @@ #include <config.h> #include <types.h> -#include <uart.h> +#include <console/uart.h> #include <arch/io.h> #include <console/console.h> /* for __console definition */ diff --git a/src/drivers/Kconfig b/src/drivers/Kconfig index 8da7b05..01bed21 100644 --- a/src/drivers/Kconfig +++ b/src/drivers/Kconfig @@ -37,4 +37,5 @@ source src/drivers/sil/Kconfig source src/drivers/spi/Kconfig source src/drivers/ti/Kconfig source src/drivers/trident/Kconfig +source src/drivers/uart/Kconfig source src/drivers/xpowers/Kconfig diff --git a/src/drivers/Makefile.inc b/src/drivers/Makefile.inc index eb86a4c..197a900 100644 --- a/src/drivers/Makefile.inc +++ b/src/drivers/Makefile.inc @@ -30,6 +30,7 @@ subdirs-y += parade subdirs-y += realtek subdirs-y += sil subdirs-y += trident +subdirs-y += uart subdirs-y += usb subdirs-y += ics subdirs-y += spi diff --git a/src/drivers/uart/Kconfig b/src/drivers/uart/Kconfig new file mode 100644 index 0000000..c1c3090 --- /dev/null +++ b/src/drivers/uart/Kconfig @@ -0,0 +1,14 @@ +# This should default to N and be set by SuperI/O drivers that have an UART +config HAVE_UART_IO_MAPPED + bool + depends on !ARCH_ARMV7 + default y if ARCH_X86 + +config HAVE_UART_MEMORY_MAPPED + bool + default n + +config HAVE_UART_SPECIAL + bool + default n + diff --git a/src/include/console/console.h b/src/include/console/console.h index 451a46a..4df8cb6 100644 --- a/src/include/console/console.h +++ b/src/include/console/console.h @@ -25,7 +25,7 @@ #include <console/post_codes.h> #if CONFIG_CONSOLE_SERIAL -#include <uart.h> +#include <console/uart.h> #endif #if CONFIG_USBDEBUG && !defined(__ROMCC__) #include <console/usb.h> diff --git a/src/include/console/uart.h b/src/include/console/uart.h index c4079b3..6cd3beb 100644 --- a/src/include/console/uart.h +++ b/src/include/console/uart.h @@ -20,7 +20,16 @@ #ifndef CONSOLE_UART_H #define CONSOLE_UART_H +void uart_init(void); +void uart_tx_byte(unsigned char data); +void uart_tx_flush(void); +unsigned char uart_rx_byte(void); + + unsigned uart_divisor(unsigned basefreq); unsigned uart_platform_divisor(void); + +uint32_t uartmem_getbaseaddr(void); + #endif /* CONSOLE_UART_H */ diff --git a/src/include/uart.h b/src/include/uart.h deleted file mode 100644 index 9601bfa..0000000 --- a/src/include/uart.h +++ /dev/null @@ -1,44 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2012 The ChromiumOS Authors. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -/* madness. Uarts are a mess. If you include this file, it - * includes ALL uart implementations which may be needed. - * No need to include them separately, and include this file FIRST. - * At least one (but at most one) of the files needs to define - * uart_init(). - */ -#ifndef UART_H -#define UART_H - -#if CONFIG_CONSOLE_SERIAL8250 || CONFIG_CONSOLE_SERIAL8250MEM -#include <uart8250.h> -#endif - -#if CONFIG_CONSOLE_SERIAL_UART -unsigned char uart_rx_byte(void); -void uart_tx_byte(unsigned char data); -void uart_tx_flush(void); -void uart_init(void); -#endif - -#if CONFIG_HAVE_UART_MEMORY_MAPPED -uint32_t uartmem_getbaseaddr(void); -#endif - -#endif /* UART_H */ diff --git a/src/include/uart8250.h b/src/include/uart8250.h index 996a854..598cdfa 100644 --- a/src/include/uart8250.h +++ b/src/include/uart8250.h @@ -120,7 +120,6 @@ void uart8250_tx_flush(unsigned base_port); * have three different sets of uart code, so it's an improvement. */ void uart8250_init(unsigned base_port, unsigned divisor); -void uart_init(void); #endif #if CONFIG_CONSOLE_SERIAL8250MEM void uartmem_init(void); @@ -136,8 +135,6 @@ u32 uart_mem_init(void); #if defined(__PRE_RAM__) && CONFIG_DRIVERS_OXFORD_OXPCIE /* and special init for OXPCIe based cards */ extern int oxford_oxpcie_present; - -void oxford_init(void); #endif #endif diff --git a/src/mainboard/cubietech/cubieboard/bootblock.c b/src/mainboard/cubietech/cubieboard/bootblock.c index 2e5929c..e22c1d8 100644 --- a/src/mainboard/cubietech/cubieboard/bootblock.c +++ b/src/mainboard/cubietech/cubieboard/bootblock.c @@ -7,7 +7,7 @@ */ #include <arch/io.h> -#include <uart.h> +#include <console/uart.h> #include <console/console.h> #include <delay.h> #include <cpu/allwinner/a10/gpio.h> diff --git a/src/mainboard/emulation/qemu-armv7/uart.c b/src/mainboard/emulation/qemu-armv7/uart.c index dfe5d0a..0be1cf9 100644 --- a/src/mainboard/emulation/qemu-armv7/uart.c +++ b/src/mainboard/emulation/qemu-armv7/uart.c @@ -14,7 +14,7 @@ */ #include <console/console.h> -#include <uart.h> +#include <console/uart.h> #define VEXPRESS_UART0_IO_ADDRESS (0x10009000) diff --git a/src/mainboard/ti/beaglebone/bootblock.c b/src/mainboard/ti/beaglebone/bootblock.c index dd46040..9e0a62e 100644 --- a/src/mainboard/ti/beaglebone/bootblock.c +++ b/src/mainboard/ti/beaglebone/bootblock.c @@ -19,7 +19,7 @@ #include <arch/io.h> #include <types.h> -#include <uart.h> +#include <console/uart.h> #include <console/console.h> #include <cpu/ti/am335x/pinmux.h>

1 0

Patch set updated for coreboot: c7c18ba uart8250: Split register definitions
by Kyösti Mälkki 15 Feb '14

15 Feb '14

Kyösti Mälkki (kyosti.malkki(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5233 -gerrit commit c7c18baae25569bba9361694e00a642146786bb8 Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Date: Fri Feb 14 06:59:51 2014 +0200 uart8250: Split register definitions Change-Id: Ideb7f55f329e1ae037debc156d3cb4a5b95bde22 Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- src/cpu/allwinner/a10/uart.c | 7 +-- src/drivers/uart/uart8250reg.h | 108 +++++++++++++++++++++++++++++++++++++++++ src/include/uart8250.h | 85 -------------------------------- src/lib/uart8250.c | 1 + src/lib/uart8250mem.c | 1 + 5 files changed, 111 insertions(+), 91 deletions(-) diff --git a/src/cpu/allwinner/a10/uart.c b/src/cpu/allwinner/a10/uart.c index dc98bff..83f677a 100644 --- a/src/cpu/allwinner/a10/uart.c +++ b/src/cpu/allwinner/a10/uart.c @@ -7,12 +7,7 @@ #include "uart.h" #include <arch/io.h> - -/* Give me my 8250 UART definitions!!!! */ -/* TODO: Clean this up when uart8250mem works on ARM */ -#undef CONFIG_CONSOLE_SERIAL8250MEM -#define CONFIG_CONSOLE_SERIAL8250MEM 1 -#include <uart8250.h> +#include "drivers/uart8250/uart8250reg.h" /** * \brief Configure line control settings for UART diff --git a/src/drivers/uart/uart8250reg.h b/src/drivers/uart/uart8250reg.h new file mode 100644 index 0000000..cdfbb1b --- /dev/null +++ b/src/drivers/uart/uart8250reg.h @@ -0,0 +1,108 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2003 Eric Biederman + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#ifndef UART8250REG_H +#define UART8250REG_H + +/* Data */ +#define UART_RBR 0x00 +#define UART_TBR 0x00 + +/* Control */ +#define UART_IER 0x01 +#define UART_IER_MSI 0x08 /* Enable Modem status interrupt */ +#define UART_IER_RLSI 0x04 /* Enable receiver line status interrupt */ +#define UART_IER_THRI 0x02 /* Enable Transmitter holding register int. */ +#define UART_IER_RDI 0x01 /* Enable receiver data interrupt */ + +#define UART_IIR 0x02 +#define UART_IIR_NO_INT 0x01 /* No interrupts pending */ +#define UART_IIR_ID 0x06 /* Mask for the interrupt ID */ + +#define UART_IIR_MSI 0x00 /* Modem status interrupt */ +#define UART_IIR_THRI 0x02 /* Transmitter holding register empty */ +#define UART_IIR_RDI 0x04 /* Receiver data interrupt */ +#define UART_IIR_RLSI 0x06 /* Receiver line status interrupt */ + +#define UART_FCR 0x02 +#define UART_FCR_FIFO_EN 0x01 /* Fifo enable */ +#define UART_FCR_CLEAR_RCVR 0x02 /* Clear the RCVR FIFO */ +#define UART_FCR_CLEAR_XMIT 0x04 /* Clear the XMIT FIFO */ +#define UART_FCR_DMA_SELECT 0x08 /* For DMA applications */ +#define UART_FCR_TRIGGER_MASK 0xC0 /* Mask for the FIFO trigger range */ +#define UART_FCR_TRIGGER_1 0x00 /* Mask for trigger set at 1 */ +#define UART_FCR_TRIGGER_4 0x40 /* Mask for trigger set at 4 */ +#define UART_FCR_TRIGGER_8 0x80 /* Mask for trigger set at 8 */ +#define UART_FCR_TRIGGER_14 0xC0 /* Mask for trigger set at 14 */ + +#define UART_FCR_RXSR 0x02 /* Receiver soft reset */ +#define UART_FCR_TXSR 0x04 /* Transmitter soft reset */ + +#define UART_LCR 0x03 +#define UART_LCR_WLS_MSK 0x03 /* character length select mask */ +#define UART_LCR_WLS_5 0x00 /* 5 bit character length */ +#define UART_LCR_WLS_6 0x01 /* 6 bit character length */ +#define UART_LCR_WLS_7 0x02 /* 7 bit character length */ +#define UART_LCR_WLS_8 0x03 /* 8 bit character length */ +#define UART_LCR_STB 0x04 /* Number of stop Bits, off = 1, on = 1.5 or 2) */ +#define UART_LCR_PEN 0x08 /* Parity enable */ +#define UART_LCR_EPS 0x10 /* Even Parity Select */ +#define UART_LCR_STKP 0x20 /* Stick Parity */ +#define UART_LCR_SBRK 0x40 /* Set Break */ +#define UART_LCR_BKSE 0x80 /* Bank select enable */ +#define UART_LCR_DLAB 0x80 /* Divisor latch access bit */ + +#define UART_MCR 0x04 +#define UART_MCR_DTR 0x01 /* DTR */ +#define UART_MCR_RTS 0x02 /* RTS */ +#define UART_MCR_OUT1 0x04 /* Out 1 */ +#define UART_MCR_OUT2 0x08 /* Out 2 */ +#define UART_MCR_LOOP 0x10 /* Enable loopback test mode */ + +#define UART_MCR_DMA_EN 0x04 +#define UART_MCR_TX_DFR 0x08 + +#define UART_DLL 0x00 +#define UART_DLM 0x01 + +/* Status */ +#define UART_LSR 0x05 +#define UART_LSR_DR 0x01 /* Data ready */ +#define UART_LSR_OE 0x02 /* Overrun */ +#define UART_LSR_PE 0x04 /* Parity error */ +#define UART_LSR_FE 0x08 /* Framing error */ +#define UART_LSR_BI 0x10 /* Break */ +#define UART_LSR_THRE 0x20 /* Xmit holding register empty */ +#define UART_LSR_TEMT 0x40 /* Xmitter empty */ +#define UART_LSR_ERR 0x80 /* Error */ + +#define UART_MSR 0x06 +#define UART_MSR_DCD 0x80 /* Data Carrier Detect */ +#define UART_MSR_RI 0x40 /* Ring Indicator */ +#define UART_MSR_DSR 0x20 /* Data Set Ready */ +#define UART_MSR_CTS 0x10 /* Clear to Send */ +#define UART_MSR_DDCD 0x08 /* Delta DCD */ +#define UART_MSR_TERI 0x04 /* Trailing edge ring indicator */ +#define UART_MSR_DDSR 0x02 /* Delta DSR */ +#define UART_MSR_DCTS 0x01 /* Delta CTS */ + +#define UART_SCR 0x07 +#define UART_SPR 0x07 + +#endif /* UART8250REG_H */ diff --git a/src/include/uart8250.h b/src/include/uart8250.h index 598cdfa..a214ce1 100644 --- a/src/include/uart8250.h +++ b/src/include/uart8250.h @@ -22,91 +22,6 @@ #if CONFIG_CONSOLE_SERIAL8250 || CONFIG_CONSOLE_SERIAL8250MEM -/* Data */ -#define UART_RBR 0x00 -#define UART_TBR 0x00 - -/* Control */ -#define UART_IER 0x01 -#define UART_IER_MSI 0x08 /* Enable Modem status interrupt */ -#define UART_IER_RLSI 0x04 /* Enable receiver line status interrupt */ -#define UART_IER_THRI 0x02 /* Enable Transmitter holding register int. */ -#define UART_IER_RDI 0x01 /* Enable receiver data interrupt */ - -#define UART_IIR 0x02 -#define UART_IIR_NO_INT 0x01 /* No interrupts pending */ -#define UART_IIR_ID 0x06 /* Mask for the interrupt ID */ - -#define UART_IIR_MSI 0x00 /* Modem status interrupt */ -#define UART_IIR_THRI 0x02 /* Transmitter holding register empty */ -#define UART_IIR_RDI 0x04 /* Receiver data interrupt */ -#define UART_IIR_RLSI 0x06 /* Receiver line status interrupt */ - -#define UART_FCR 0x02 -#define UART_FCR_FIFO_EN 0x01 /* Fifo enable */ -#define UART_FCR_CLEAR_RCVR 0x02 /* Clear the RCVR FIFO */ -#define UART_FCR_CLEAR_XMIT 0x04 /* Clear the XMIT FIFO */ -#define UART_FCR_DMA_SELECT 0x08 /* For DMA applications */ -#define UART_FCR_TRIGGER_MASK 0xC0 /* Mask for the FIFO trigger range */ -#define UART_FCR_TRIGGER_1 0x00 /* Mask for trigger set at 1 */ -#define UART_FCR_TRIGGER_4 0x40 /* Mask for trigger set at 4 */ -#define UART_FCR_TRIGGER_8 0x80 /* Mask for trigger set at 8 */ -#define UART_FCR_TRIGGER_14 0xC0 /* Mask for trigger set at 14 */ - -#define UART_FCR_RXSR 0x02 /* Receiver soft reset */ -#define UART_FCR_TXSR 0x04 /* Transmitter soft reset */ - -#define UART_LCR 0x03 -#define UART_LCR_WLS_MSK 0x03 /* character length select mask */ -#define UART_LCR_WLS_5 0x00 /* 5 bit character length */ -#define UART_LCR_WLS_6 0x01 /* 6 bit character length */ -#define UART_LCR_WLS_7 0x02 /* 7 bit character length */ -#define UART_LCR_WLS_8 0x03 /* 8 bit character length */ -#define UART_LCR_STB 0x04 /* Number of stop Bits, off = 1, on = 1.5 or 2) */ -#define UART_LCR_PEN 0x08 /* Parity enable */ -#define UART_LCR_EPS 0x10 /* Even Parity Select */ -#define UART_LCR_STKP 0x20 /* Stick Parity */ -#define UART_LCR_SBRK 0x40 /* Set Break */ -#define UART_LCR_BKSE 0x80 /* Bank select enable */ -#define UART_LCR_DLAB 0x80 /* Divisor latch access bit */ - -#define UART_MCR 0x04 -#define UART_MCR_DTR 0x01 /* DTR */ -#define UART_MCR_RTS 0x02 /* RTS */ -#define UART_MCR_OUT1 0x04 /* Out 1 */ -#define UART_MCR_OUT2 0x08 /* Out 2 */ -#define UART_MCR_LOOP 0x10 /* Enable loopback test mode */ - -#define UART_MCR_DMA_EN 0x04 -#define UART_MCR_TX_DFR 0x08 - -#define UART_DLL 0x00 -#define UART_DLM 0x01 - -/* Status */ -#define UART_LSR 0x05 -#define UART_LSR_DR 0x01 /* Data ready */ -#define UART_LSR_OE 0x02 /* Overrun */ -#define UART_LSR_PE 0x04 /* Parity error */ -#define UART_LSR_FE 0x08 /* Framing error */ -#define UART_LSR_BI 0x10 /* Break */ -#define UART_LSR_THRE 0x20 /* Xmit holding register empty */ -#define UART_LSR_TEMT 0x40 /* Xmitter empty */ -#define UART_LSR_ERR 0x80 /* Error */ - -#define UART_MSR 0x06 -#define UART_MSR_DCD 0x80 /* Data Carrier Detect */ -#define UART_MSR_RI 0x40 /* Ring Indicator */ -#define UART_MSR_DSR 0x20 /* Data Set Ready */ -#define UART_MSR_CTS 0x10 /* Clear to Send */ -#define UART_MSR_DDCD 0x08 /* Delta DCD */ -#define UART_MSR_TERI 0x04 /* Trailing edge ring indicator */ -#define UART_MSR_DDSR 0x02 /* Delta DSR */ -#define UART_MSR_DCTS 0x01 /* Delta CTS */ - -#define UART_SCR 0x07 -#define UART_SPR 0x07 - #if ((115200 % CONFIG_TTYS0_BAUD) != 0) #error Bad ttyS0 baud rate #endif diff --git a/src/lib/uart8250.c b/src/lib/uart8250.c index bcb137a..4d2cb63 100644 --- a/src/lib/uart8250.c +++ b/src/lib/uart8250.c @@ -21,6 +21,7 @@ #include <arch/io.h> #include <uart8250.h> #include <trace.h> +#include "drivers/uart/uart8250reg.h" /* Should support 8250, 16450, 16550, 16550A type UARTs */ diff --git a/src/lib/uart8250mem.c b/src/lib/uart8250mem.c index 26c83fa..cff67d7 100644 --- a/src/lib/uart8250mem.c +++ b/src/lib/uart8250mem.c @@ -22,6 +22,7 @@ #include <uart8250.h> #include <device/device.h> #include <delay.h> +#include "drivers/uart/uart8250reg.h" /* Should support 8250, 16450, 16550, 16550A type UARTs */

1 0

Patch set updated for coreboot: 979cf21 console: Fix includes
by Kyösti Mälkki 15 Feb '14

15 Feb '14

Kyösti Mälkki (kyosti.malkki(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5232 -gerrit commit 979cf21838691bb889d6dee79d4821cdf9f53316 Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Date: Fri Feb 14 06:11:01 2014 +0200 console: Fix includes Change-Id: Icbc9cd3e5bdfdab85d7dccd7c3827bba35248fb8 Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- src/arch/x86/lib/romcc_console.c | 1 + src/arch/x86/lib/romstage_console.c | 14 +++++--------- src/console/console.c | 6 ++++++ src/include/console/console.h | 16 ---------------- src/lib/cbmem.c | 1 + src/lib/cbmem_console.c | 1 + src/northbridge/intel/sandybridge/raminit.c | 1 + 7 files changed, 15 insertions(+), 25 deletions(-) diff --git a/src/arch/x86/lib/romcc_console.c b/src/arch/x86/lib/romcc_console.c index e517428..0f0e017 100644 --- a/src/arch/x86/lib/romcc_console.c +++ b/src/arch/x86/lib/romcc_console.c @@ -20,6 +20,7 @@ #include <stdint.h> #include <console/loglevel.h> #include <console/post_codes.h> +#include <console/ne2k.h> /* __PRE_RAM__ */ /* Using a global varible can cause problems when we reset the stack diff --git a/src/arch/x86/lib/romstage_console.c b/src/arch/x86/lib/romstage_console.c index 4ef702f..4981f39 100644 --- a/src/arch/x86/lib/romstage_console.c +++ b/src/arch/x86/lib/romstage_console.c @@ -19,20 +19,16 @@ #include <smp/node.h> #include <console/console.h> +#include <console/cbmem_console.h> +#include <console/uart.h> +#include <console/usb.h> +#include <console/ne2k.h> +#include <console/spkmodem.h> #include <console/vtxprintf.h> #if CONFIG_CONSOLE_SERIAL8250 || CONFIG_CONSOLE_SERIAL8250MEM #include <uart8250.h> #endif -#if CONFIG_USBDEBUG -#include <console/usb.h> -#endif -#if CONFIG_CONSOLE_NE2K -#include <console/ne2k.h> -#endif -#if CONFIG_SPKMODEM -#include <console/spkmodem.h> -#endif void console_tx_byte(unsigned char byte) { diff --git a/src/console/console.c b/src/console/console.c index 081113c..334e140 100644 --- a/src/console/console.c +++ b/src/console/console.c @@ -18,6 +18,12 @@ */ #include <console/console.h> +#include <console/cbmem_console.h> +#include <console/uart.h> +#include <console/usb.h> +#include <console/ne2k.h> +#include <console/spkmodem.h> + #include <build.h> #include <arch/hlt.h> #include <arch/io.h> diff --git a/src/include/console/console.h b/src/include/console/console.h index 4df8cb6..a089729 100644 --- a/src/include/console/console.h +++ b/src/include/console/console.h @@ -24,22 +24,6 @@ #include <console/loglevel.h> #include <console/post_codes.h> -#if CONFIG_CONSOLE_SERIAL -#include <console/uart.h> -#endif -#if CONFIG_USBDEBUG && !defined(__ROMCC__) -#include <console/usb.h> -#endif -#if CONFIG_CONSOLE_NE2K -#include <console/ne2k.h> -#endif -#if CONFIG_CONSOLE_CBMEM -#include <console/cbmem_console.h> -#endif -#if CONFIG_SPKMODEM -#include <console/spkmodem.h> -#endif - #ifndef __PRE_RAM__ unsigned char console_rx_byte(void); int console_tst_byte(void); diff --git a/src/lib/cbmem.c b/src/lib/cbmem.c index d97f6af..3fea49a 100644 --- a/src/lib/cbmem.c +++ b/src/lib/cbmem.c @@ -23,6 +23,7 @@ #include <cbmem.h> #include <boot/coreboot_tables.h> #include <console/console.h> +#include <console/cbmem_console.h> #include <arch/early_variables.h> #if CONFIG_HAVE_ACPI_RESUME && !defined(__PRE_RAM__) #include <arch/acpi.h> diff --git a/src/lib/cbmem_console.c b/src/lib/cbmem_console.c index 83d44e3..9d5419a 100644 --- a/src/lib/cbmem_console.c +++ b/src/lib/cbmem_console.c @@ -18,6 +18,7 @@ */ #include <console/console.h> +#include <console/cbmem_console.h> #include <cbmem.h> #include <arch/early_variables.h> #include <string.h> diff --git a/src/northbridge/intel/sandybridge/raminit.c b/src/northbridge/intel/sandybridge/raminit.c index b9c3839..bfb4033 100644 --- a/src/northbridge/intel/sandybridge/raminit.c +++ b/src/northbridge/intel/sandybridge/raminit.c @@ -18,6 +18,7 @@ */ #include <console/console.h> +#include <console/usb.h> #include <string.h> #include <arch/hlt.h> #include <arch/io.h>

1 0

Patch set updated for coreboot: 340aca4 option: Add arch-agnostic get_option()
by Kyösti Mälkki 15 Feb '14

15 Feb '14

Kyösti Mälkki (kyosti.malkki(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5157 -gerrit commit 340aca45a48bb84c2bb28422208412595e217442 Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Date: Tue Jan 28 10:02:53 2014 +0200 option: Add arch-agnostic get_option() We should not have pc80/ includes in console/. Change-Id: Id7da732b1ea094be01f45f9dbb49142f4e78f095 Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- src/console/console.c | 13 +------------ src/console/util.c | 2 +- src/include/option.h | 19 +++++++++++++++++++ 3 files changed, 21 insertions(+), 13 deletions(-) diff --git a/src/console/console.c b/src/console/console.c index 38ac3e7..081113c 100644 --- a/src/console/console.c +++ b/src/console/console.c @@ -25,18 +25,7 @@ #ifndef __PRE_RAM__ #include <string.h> #include <types.h> - -/* - * FIXME: get_option() needs to be abstracted better so that other non-volatile - * storage can be used. This will benefit machines without CMOS as well as those - * without a battery-backed CMOS (e.g. some laptops). - */ -#if CONFIG_USE_OPTION_TABLE -#include <pc80/mc146818rtc.h> -#else -static inline enum cb_err get_option(void *dest, const char *name) - { return CB_CMOS_OTABLE_DISABLED; } -#endif +#include <option.h> /* initialize the console */ void console_init(void) diff --git a/src/console/util.c b/src/console/util.c index a7651fb..405657d 100644 --- a/src/console/util.c +++ b/src/console/util.c @@ -18,7 +18,7 @@ #include <console/console.h> #include <uart8250.h> #if CONFIG_USE_OPTION_TABLE -#include <pc80/mc146818rtc.h> +#include <option.h> #include "option_table.h" #endif diff --git a/src/include/option.h b/src/include/option.h new file mode 100644 index 0000000..83f3a84 --- /dev/null +++ b/src/include/option.h @@ -0,0 +1,19 @@ +#ifndef _OPTION_H_ +#define _OPTION_H_ + +/* + * FIXME: get_option() needs to be abstracted better so that other non-volatile + * storage can be used. This will benefit machines without CMOS as well as those + * without a battery-backed CMOS (e.g. some laptops). + */ +#if CONFIG_USE_OPTION_TABLE +#include <pc80/mc146818rtc.h> +#else +#include <types.h> +static inline enum cb_err get_option(void *dest, const char *name) +{ + return CB_CMOS_OTABLE_DISABLED; +} +#endif + +#endif /* _OPTION_H_ */

1 0

Patch set updated for coreboot: 10a8387 uart: Add single function for divisor calculation
by Kyösti Mälkki 15 Feb '14

15 Feb '14

Kyösti Mälkki (kyosti.malkki(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5229 -gerrit commit 10a838775cbce316019883123317d8f8d8b2899e Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Date: Sat Feb 15 10:21:59 2014 +0200 uart: Add single function for divisor calculation Divisor is a function of requested baudrate and platform-specific clock used for UART reference. Combine this with the capability to read baudrate from option_table. When building without option_table or when there is no entry for baud_rate, CONFIG_TTYS0_BAUD is used. FIXME: Field for baudrate in lb_tables is still incorrect. Change-Id: I68539738469af780fadd3392263dd9b3d5964d2d Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- src/arch/x86/lib/romcc_console.c | 2 ++ src/console/Makefile.inc | 6 ++-- src/console/uart8250_console.c | 1 - src/console/uart8250mem_console.c | 1 - src/console/util.c | 54 ++++++++++++++++++++++++++++++++ src/drivers/oxford/oxpcie/oxpcie_early.c | 8 ++++- src/include/console/uart.h | 26 +++++++++++++++ src/include/uart8250.h | 2 ++ src/lib/uart8250.c | 27 +--------------- src/lib/uart8250mem.c | 24 +------------- 10 files changed, 96 insertions(+), 55 deletions(-) diff --git a/src/arch/x86/lib/romcc_console.c b/src/arch/x86/lib/romcc_console.c index db84f9e..e517428 100644 --- a/src/arch/x86/lib/romcc_console.c +++ b/src/arch/x86/lib/romcc_console.c @@ -31,6 +31,8 @@ #include <uart8250.h> #endif +#include <console/util.c> + #if CONFIG_CONSOLE_SERIAL8250 #include "lib/uart8250.c" #endif diff --git a/src/console/Makefile.inc b/src/console/Makefile.inc index 54d59cd..8760012 100644 --- a/src/console/Makefile.inc +++ b/src/console/Makefile.inc @@ -1,5 +1,5 @@ ramstage-y += printk.c -ramstage-y += console.c +ramstage-y += util.c console.c ramstage-y += vtxprintf.c ramstage-y += vsprintf.c ramstage-y += post.c @@ -9,12 +9,12 @@ smm-$(CONFIG_DEBUG_SMI) += vtxprintf.c printk.c smm-$(CONFIG_SMM_TSEG) += die.c romstage-$(CONFIG_EARLY_CONSOLE) += vtxprintf.c -romstage-y += console.c +romstage-y += util.c console.c romstage-y += post.c romstage-y += die.c bootblock-$(CONFIG_BOOTBLOCK_CONSOLE) += vtxprintf.c -bootblock-y += console.c +bootblock-y += util.c console.c bootblock-y += die.c ramstage-$(CONFIG_CONSOLE_SERIAL8250) += uart8250_console.c diff --git a/src/console/uart8250_console.c b/src/console/uart8250_console.c index 330ed68..196412c 100644 --- a/src/console/uart8250_console.c +++ b/src/console/uart8250_console.c @@ -19,7 +19,6 @@ #include <console/console.h> #include <uart8250.h> -#include <pc80/mc146818rtc.h> static void ttyS0_init(void) { diff --git a/src/console/uart8250mem_console.c b/src/console/uart8250mem_console.c index ed77237..3833e47 100644 --- a/src/console/uart8250mem_console.c +++ b/src/console/uart8250mem_console.c @@ -19,7 +19,6 @@ #include <console/console.h> #include <uart8250.h> -#include <pc80/mc146818rtc.h> static u32 uart_bar = 0; diff --git a/src/console/util.c b/src/console/util.c new file mode 100644 index 0000000..a7651fb --- /dev/null +++ b/src/console/util.c @@ -0,0 +1,54 @@ +/* + * This file is part of the coreboot project. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include <console/console.h> +#include <uart8250.h> +#if CONFIG_USE_OPTION_TABLE +#include <pc80/mc146818rtc.h> +#include "option_table.h" +#endif + +#if CONFIG_CONSOLE_SERIAL +/* Treat the default base frequency 115200 as a special case + * to avoid runtime division. Might help ROMCC builds. + */ +unsigned uart_divisor(unsigned basefreq) +{ + unsigned div = (basefreq / CONFIG_TTYS0_BAUD); + +#if !defined(__SMM__) && CONFIG_USE_OPTION_TABLE + static const unsigned char divisor[8] = { 1, 2, 3, 6, 12, 24, 48, 96 }; + static const unsigned baud[8] = + { 115200, 57600, 38400, 19200, 9600, 4800, 2400, 1200 }; + unsigned b_index = 0; +#if defined(__PRE_RAM__) + b_index = read_option(baud_rate, 0xff); +#else + if (get_option(&b_index, "baud_rate") != CB_SUCCESS) + b_index = 0xff; +#endif + if (b_index < 8) { + if (basefreq == 115200) + div = divisor[b_index]; + else + div = (basefreq / baud[b_index]); + } +#endif + return div; +} + +#endif diff --git a/src/drivers/oxford/oxpcie/oxpcie_early.c b/src/drivers/oxford/oxpcie/oxpcie_early.c index d04e9d4..693c1e9 100644 --- a/src/drivers/oxford/oxpcie/oxpcie_early.c +++ b/src/drivers/oxford/oxpcie/oxpcie_early.c @@ -116,7 +116,13 @@ void oxford_init(void) /* Now the UART initialization */ u32 uart0_base = CONFIG_OXFORD_OXPCIE_BASE_ADDRESS + 0x1000; - uart8250_mem_init(uart0_base, (4000000 / CONFIG_TTYS0_BAUD)); + unsigned div = uart_platform_divisor(); + uart8250_mem_init(uart0_base, div); } #endif + +unsigned uart_platform_divisor(void) +{ + return uart_divisor(4000000); +} diff --git a/src/include/console/uart.h b/src/include/console/uart.h new file mode 100644 index 0000000..c4079b3 --- /dev/null +++ b/src/include/console/uart.h @@ -0,0 +1,26 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2012 The ChromiumOS Authors. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#ifndef CONSOLE_UART_H +#define CONSOLE_UART_H + +unsigned uart_divisor(unsigned basefreq); +unsigned uart_platform_divisor(void); + +#endif /* CONSOLE_UART_H */ diff --git a/src/include/uart8250.h b/src/include/uart8250.h index bec3637..996a854 100644 --- a/src/include/uart8250.h +++ b/src/include/uart8250.h @@ -143,4 +143,6 @@ void oxford_init(void); #endif /* CONFIG_CONSOLE_SERIAL8250 || CONFIG_CONSOLE_SERIAL8250MEM */ +#include <console/uart.h> + #endif /* UART8250_H */ diff --git a/src/lib/uart8250.c b/src/lib/uart8250.c index aa18d2a..bcb137a 100644 --- a/src/lib/uart8250.c +++ b/src/lib/uart8250.c @@ -20,13 +20,8 @@ #include <arch/io.h> #include <uart8250.h> -#include <pc80/mc146818rtc.h> #include <trace.h> -#if CONFIG_USE_OPTION_TABLE -#include "option_table.h" -#endif - /* Should support 8250, 16450, 16550, 16550A type UARTs */ /* Expected character delay at 1200bps is 9ms for a working UART @@ -107,26 +102,6 @@ void uart8250_init(unsigned base_port, unsigned divisor) void uart_init(void) { - /* TODO the divisor calculation is hard coded to standard UARTs. Some - * UARTs won't work with these values. This should be a property of the - * UART used, worst case a Kconfig variable. For now live with hard - * codes as the only devices that might be different are the iWave - * iRainbowG6 and the OXPCIe952 card (and the latter is memory mapped) - */ - unsigned int div = (115200 / CONFIG_TTYS0_BAUD); - -#if !defined(__SMM__) && CONFIG_USE_OPTION_TABLE - static const unsigned char divisor[8] = { 1, 2, 3, 6, 12, 24, 48, 96 }; - unsigned b_index = 0; -#if defined(__PRE_RAM__) - b_index = read_option(baud_rate, 0); - b_index &= 7; - div = divisor[b_index]; -#else - if (get_option(&b_index, "baud_rate") == CB_SUCCESS) - div = divisor[b_index]; -#endif -#endif - + unsigned int div = uart_divisor(115200); uart8250_init(CONFIG_TTYS0_BASE, div); } diff --git a/src/lib/uart8250mem.c b/src/lib/uart8250mem.c index 1482142..26c83fa 100644 --- a/src/lib/uart8250mem.c +++ b/src/lib/uart8250mem.c @@ -20,10 +20,6 @@ #include <arch/io.h> #include <uart8250.h> -#include <pc80/mc146818rtc.h> -#if CONFIG_USE_OPTION_TABLE -#include "option_table.h" -#endif #include <device/device.h> #include <delay.h> @@ -105,27 +101,11 @@ void uart8250_mem_init(unsigned base_port, unsigned divisor) u32 uart_mem_init(void) { - unsigned uart_baud = CONFIG_TTYS0_BAUD; u32 uart_bar = 0; - unsigned div; - - /* find out the correct baud rate */ -#if !defined(__SMM__) && CONFIG_USE_OPTION_TABLE - static const unsigned baud[8] = { 115200, 57600, 38400, 19200, 9600, 4800, 2400, 1200 }; - unsigned b_index = 0; -#if defined(__PRE_RAM__) - b_index = read_option(baud_rate, 0); - b_index &= 7; - uart_baud = baud[b_index]; -#else - if (get_option(&b_index, "baud_rate") == CB_SUCCESS) - uart_baud = baud[b_index]; -#endif -#endif + unsigned div = uart_platform_divisor(); /* Now find the UART base address and calculate the divisor */ #if CONFIG_DRIVERS_OXFORD_OXPCIE - #if defined(MORE_TESTING) && !defined(__SIMPLE_DEVICE__) device_t dev = dev_find_device(0x1415, 0xc158, NULL); if (!dev) @@ -144,8 +124,6 @@ u32 uart_mem_init(void) #endif uart_bar = CONFIG_OXFORD_OXPCIE_BASE_ADDRESS + 0x1000; // 1st UART // uart_bar = CONFIG_OXFORD_OXPCIE_BASE_ADDRESS + 0x2000; // 2nd UART - - div = 4000000 / uart_baud; #endif if (uart_bar)

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Patch set updated for coreboot: b19c6c4 console: Add drivers/uart
by Kyösti Mälkki 15 Feb '14

15 Feb '14

Kyösti Mälkki (kyosti.malkki(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5230 -gerrit commit b19c6c4808c40ba972d8c42613a08506120176bd Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Date: Fri Feb 14 07:04:09 2014 +0200 console: Add drivers/uart Also move UART related Kconfigs from top-level file. Change-Id: I4e407977cff6f6506f991600c98d6d264676d3f8 Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- src/Kconfig | 14 -------- src/console/util.c | 2 +- src/cpu/allwinner/a10/uart_console.c | 2 +- src/cpu/samsung/exynos5250/uart.c | 2 +- src/cpu/samsung/exynos5420/uart.c | 2 +- src/cpu/ti/am335x/uart.c | 2 +- src/drivers/Kconfig | 1 + src/drivers/Makefile.inc | 1 + src/drivers/uart/Kconfig | 14 ++++++++ src/include/console/console.h | 2 +- src/include/console/uart.h | 9 ++++++ src/include/uart.h | 44 -------------------------- src/include/uart8250.h | 3 -- src/mainboard/cubietech/cubieboard/bootblock.c | 2 +- src/mainboard/emulation/qemu-armv7/uart.c | 2 +- src/mainboard/ti/beaglebone/bootblock.c | 2 +- 16 files changed, 34 insertions(+), 70 deletions(-) diff --git a/src/Kconfig b/src/Kconfig index 94fea2d..bb25afd 100644 --- a/src/Kconfig +++ b/src/Kconfig @@ -292,20 +292,6 @@ config MMCONF_SUPPORT source src/console/Kconfig -# This should default to N and be set by SuperI/O drivers that have an UART -config HAVE_UART_IO_MAPPED - bool - default y if ARCH_X86 - default n if ARCH_ARMV7 - -config HAVE_UART_MEMORY_MAPPED - bool - default n - -config HAVE_UART_SPECIAL - bool - default n - config HAVE_ACPI_RESUME bool default n diff --git a/src/console/util.c b/src/console/util.c index 405657d..741a0d4 100644 --- a/src/console/util.c +++ b/src/console/util.c @@ -16,7 +16,7 @@ */ #include <console/console.h> -#include <uart8250.h> +#include <console/uart.h> #if CONFIG_USE_OPTION_TABLE #include <option.h> #include "option_table.h" diff --git a/src/cpu/allwinner/a10/uart_console.c b/src/cpu/allwinner/a10/uart_console.c index 58930dd..94ab7f7 100644 --- a/src/cpu/allwinner/a10/uart_console.c +++ b/src/cpu/allwinner/a10/uart_console.c @@ -8,7 +8,7 @@ #include <config.h> #include <types.h> -#include <uart.h> +#include <console/uart.h> #include <arch/io.h> #include <console/console.h> diff --git a/src/cpu/samsung/exynos5250/uart.c b/src/cpu/samsung/exynos5250/uart.c index dbf7202..80e9f4e 100644 --- a/src/cpu/samsung/exynos5250/uart.c +++ b/src/cpu/samsung/exynos5250/uart.c @@ -18,7 +18,7 @@ */ #include <console/console.h> /* for __console definition */ -#include <uart.h> +#include <console/uart.h> #include <arch/io.h> #include "uart.h" #include "clk.h" diff --git a/src/cpu/samsung/exynos5420/uart.c b/src/cpu/samsung/exynos5420/uart.c index c5c8a8c..ac01488 100644 --- a/src/cpu/samsung/exynos5420/uart.c +++ b/src/cpu/samsung/exynos5420/uart.c @@ -18,7 +18,7 @@ */ #include <console/console.h> /* for __console definition */ -#include <uart.h> +#include <console/uart.h> #include <arch/io.h> #include "uart.h" #include "clk.h" diff --git a/src/cpu/ti/am335x/uart.c b/src/cpu/ti/am335x/uart.c index bd2ff44..448b1c2 100644 --- a/src/cpu/ti/am335x/uart.c +++ b/src/cpu/ti/am335x/uart.c @@ -18,7 +18,7 @@ #include <config.h> #include <types.h> -#include <uart.h> +#include <console/uart.h> #include <arch/io.h> #include <console/console.h> /* for __console definition */ diff --git a/src/drivers/Kconfig b/src/drivers/Kconfig index 8da7b05..01bed21 100644 --- a/src/drivers/Kconfig +++ b/src/drivers/Kconfig @@ -37,4 +37,5 @@ source src/drivers/sil/Kconfig source src/drivers/spi/Kconfig source src/drivers/ti/Kconfig source src/drivers/trident/Kconfig +source src/drivers/uart/Kconfig source src/drivers/xpowers/Kconfig diff --git a/src/drivers/Makefile.inc b/src/drivers/Makefile.inc index eb86a4c..197a900 100644 --- a/src/drivers/Makefile.inc +++ b/src/drivers/Makefile.inc @@ -30,6 +30,7 @@ subdirs-y += parade subdirs-y += realtek subdirs-y += sil subdirs-y += trident +subdirs-y += uart subdirs-y += usb subdirs-y += ics subdirs-y += spi diff --git a/src/drivers/uart/Kconfig b/src/drivers/uart/Kconfig new file mode 100644 index 0000000..c1c3090 --- /dev/null +++ b/src/drivers/uart/Kconfig @@ -0,0 +1,14 @@ +# This should default to N and be set by SuperI/O drivers that have an UART +config HAVE_UART_IO_MAPPED + bool + depends on !ARCH_ARMV7 + default y if ARCH_X86 + +config HAVE_UART_MEMORY_MAPPED + bool + default n + +config HAVE_UART_SPECIAL + bool + default n + diff --git a/src/include/console/console.h b/src/include/console/console.h index 451a46a..4df8cb6 100644 --- a/src/include/console/console.h +++ b/src/include/console/console.h @@ -25,7 +25,7 @@ #include <console/post_codes.h> #if CONFIG_CONSOLE_SERIAL -#include <uart.h> +#include <console/uart.h> #endif #if CONFIG_USBDEBUG && !defined(__ROMCC__) #include <console/usb.h> diff --git a/src/include/console/uart.h b/src/include/console/uart.h index c4079b3..6cd3beb 100644 --- a/src/include/console/uart.h +++ b/src/include/console/uart.h @@ -20,7 +20,16 @@ #ifndef CONSOLE_UART_H #define CONSOLE_UART_H +void uart_init(void); +void uart_tx_byte(unsigned char data); +void uart_tx_flush(void); +unsigned char uart_rx_byte(void); + + unsigned uart_divisor(unsigned basefreq); unsigned uart_platform_divisor(void); + +uint32_t uartmem_getbaseaddr(void); + #endif /* CONSOLE_UART_H */ diff --git a/src/include/uart.h b/src/include/uart.h deleted file mode 100644 index 9601bfa..0000000 --- a/src/include/uart.h +++ /dev/null @@ -1,44 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2012 The ChromiumOS Authors. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -/* madness. Uarts are a mess. If you include this file, it - * includes ALL uart implementations which may be needed. - * No need to include them separately, and include this file FIRST. - * At least one (but at most one) of the files needs to define - * uart_init(). - */ -#ifndef UART_H -#define UART_H - -#if CONFIG_CONSOLE_SERIAL8250 || CONFIG_CONSOLE_SERIAL8250MEM -#include <uart8250.h> -#endif - -#if CONFIG_CONSOLE_SERIAL_UART -unsigned char uart_rx_byte(void); -void uart_tx_byte(unsigned char data); -void uart_tx_flush(void); -void uart_init(void); -#endif - -#if CONFIG_HAVE_UART_MEMORY_MAPPED -uint32_t uartmem_getbaseaddr(void); -#endif - -#endif /* UART_H */ diff --git a/src/include/uart8250.h b/src/include/uart8250.h index 996a854..598cdfa 100644 --- a/src/include/uart8250.h +++ b/src/include/uart8250.h @@ -120,7 +120,6 @@ void uart8250_tx_flush(unsigned base_port); * have three different sets of uart code, so it's an improvement. */ void uart8250_init(unsigned base_port, unsigned divisor); -void uart_init(void); #endif #if CONFIG_CONSOLE_SERIAL8250MEM void uartmem_init(void); @@ -136,8 +135,6 @@ u32 uart_mem_init(void); #if defined(__PRE_RAM__) && CONFIG_DRIVERS_OXFORD_OXPCIE /* and special init for OXPCIe based cards */ extern int oxford_oxpcie_present; - -void oxford_init(void); #endif #endif diff --git a/src/mainboard/cubietech/cubieboard/bootblock.c b/src/mainboard/cubietech/cubieboard/bootblock.c index 2e5929c..e22c1d8 100644 --- a/src/mainboard/cubietech/cubieboard/bootblock.c +++ b/src/mainboard/cubietech/cubieboard/bootblock.c @@ -7,7 +7,7 @@ */ #include <arch/io.h> -#include <uart.h> +#include <console/uart.h> #include <console/console.h> #include <delay.h> #include <cpu/allwinner/a10/gpio.h> diff --git a/src/mainboard/emulation/qemu-armv7/uart.c b/src/mainboard/emulation/qemu-armv7/uart.c index dfe5d0a..0be1cf9 100644 --- a/src/mainboard/emulation/qemu-armv7/uart.c +++ b/src/mainboard/emulation/qemu-armv7/uart.c @@ -14,7 +14,7 @@ */ #include <console/console.h> -#include <uart.h> +#include <console/uart.h> #define VEXPRESS_UART0_IO_ADDRESS (0x10009000) diff --git a/src/mainboard/ti/beaglebone/bootblock.c b/src/mainboard/ti/beaglebone/bootblock.c index dd46040..9e0a62e 100644 --- a/src/mainboard/ti/beaglebone/bootblock.c +++ b/src/mainboard/ti/beaglebone/bootblock.c @@ -19,7 +19,7 @@ #include <arch/io.h> #include <types.h> -#include <uart.h> +#include <console/uart.h> #include <console/console.h> #include <cpu/ti/am335x/pinmux.h>

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coreboot-gerrit February 2014