coreboot-gerrit July 2013

coreboot-gerrit@coreboot.org

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Patch merged into coreboot/master: 8940d3e ec: Fix spelling
by gerrit＠coreboot.org 10 Jul '13

10 Jul '13

the following patch was just integrated into master: commit 8940d3e2a7678eabbdd6b3b79498a69019bde77a Author: Martin Roth <martin.roth(a)se-eng.com> Date: Tue Jul 9 21:52:41 2013 -0600 ec: Fix spelling Change-Id: I5e4d35572c43f07bec5ec0bcd75c717723228e2f Signed-off-by: Martin Roth <martin.roth(a)se-eng.com> Reviewed-on: http://review.coreboot.org/3757 Reviewed-by: Dave Frodin <dave.frodin(a)se-eng.com> Reviewed-by: Paul Menzel <paulepanter(a)users.sourceforge.net> Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> See http://review.coreboot.org/3757 for details. -gerrit

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Patch merged into coreboot/master: cbf2bd7 lib: Fix spelling
by gerrit＠coreboot.org 10 Jul '13

10 Jul '13

the following patch was just integrated into master: commit cbf2bd715a6a3c5d758c52b4634284b260805d17 Author: Martin Roth <martin.roth(a)se-eng.com> Date: Tue Jul 9 21:51:14 2013 -0600 lib: Fix spelling Change-Id: I999987af9cb44906e3c3135c0351a0cd6eb210ff Signed-off-by: Martin Roth <martin.roth(a)se-eng.com> Reviewed-on: http://review.coreboot.org/3756 Reviewed-by: Dave Frodin <dave.frodin(a)se-eng.com> Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> See http://review.coreboot.org/3756 for details. -gerrit

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Patch merged into coreboot/master: 63373ed device: Fix spelling
by gerrit＠coreboot.org 10 Jul '13

10 Jul '13

the following patch was just integrated into master: commit 63373edce006983d1e2aef7d71c1653ae337ed18 Author: Martin Roth <martin.roth(a)se-eng.com> Date: Mon Jul 8 16:24:19 2013 -0600 device: Fix spelling Change-Id: I53a40d114aa2da76398c5b97443d4096809dcf36 Signed-off-by: Martin Roth <martin.roth(a)se-eng.com> Reviewed-on: http://review.coreboot.org/3730 Reviewed-by: Ronald G. Minnich <rminnich(a)gmail.com> Reviewed-by: Paul Menzel <paulepanter(a)users.sourceforge.net> Tested-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> See http://review.coreboot.org/3730 for details. -gerrit

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Patch merged into coreboot/master: 50d887d console: Fix spelling
by gerrit＠coreboot.org 10 Jul '13

10 Jul '13

the following patch was just integrated into master: commit 50d887d4f4f5f4c4717a2308f4bf069d86ca4ff7 Author: Martin Roth <martin.roth(a)se-eng.com> Date: Mon Jul 8 16:22:54 2013 -0600 console: Fix spelling Change-Id: I1fef27c4a16ee4358ace8014a8d6e9fa92c4f790 Signed-off-by: Martin Roth <martin.roth(a)se-eng.com> Reviewed-on: http://review.coreboot.org/3728 Reviewed-by: Ronald G. Minnich <rminnich(a)gmail.com> Reviewed-by: Paul Menzel <paulepanter(a)users.sourceforge.net> Tested-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> See http://review.coreboot.org/3728 for details. -gerrit

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Patch merged into coreboot/master: 7b5f8ef arch: Fix spelling
by gerrit＠coreboot.org 10 Jul '13

10 Jul '13

the following patch was just integrated into master: commit 7b5f8ef2eab7f1211888ae420d76176f49721601 Author: Martin Roth <martin.roth(a)se-eng.com> Date: Mon Jul 8 16:22:10 2013 -0600 arch: Fix spelling Change-Id: Ifea10f0180c0c4b684030a168402a95fadf1a9db Signed-off-by: Martin Roth <martin.roth(a)se-eng.com> Reviewed-on: http://review.coreboot.org/3727 Reviewed-by: Ronald G. Minnich <rminnich(a)gmail.com> Reviewed-by: Paul Menzel <paulepanter(a)users.sourceforge.net> Reviewed-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Tested-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> See http://review.coreboot.org/3727 for details. -gerrit

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Patch merged into coreboot/master: fb37013 ARM: Fix the way the space for the page tables is allocated.
by gerrit＠coreboot.org 10 Jul '13

10 Jul '13

the following patch was just integrated into master: commit fb370130f6618d53f506566737f7394ee1417c55 Author: Gabe Black <gabeblack(a)google.com> Date: Sat May 18 21:41:59 2013 -0700 ARM: Fix the way the space for the page tables is allocated. The page tables need to be aligned to a 16KB boundary and are 16KB in size. The CBMEM allocator only guarantees 512 byte alignment, so to make sure things are where they're supposed to be, the code was allocating extra space and then adjusting the pointer upwards. Unfortunately, it was adding the size of the table to the pointer first, then aligning it. Since it allocated twice the space of the table, this had the effect of moving past the first table size region of bytes, and then aligning upwards, pushing the end of the table out of the space allocated for it. You can get away with this if you push things you don't care about off the end, and it happened to be the case that we were allocating a color map we weren't using at the start of the next part of cbmem. Change-Id: I6b196fc573801b02f27f2e667acbf06163266651 Signed-off-by: Gabe Black <gabeblack(a)chromium.org> Reviewed-on: http://review.coreboot.org/3651 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> See http://review.coreboot.org/3651 for details. -gerrit

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Patch set updated for coreboot: cdba2ed snow: Make coreboot set up pins for busses it knows are hooked up as such
by Stefan Reinauer 10 Jul '13

10 Jul '13

Stefan Reinauer (stefan.reinauer(a)coreboot.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/3650 -gerrit commit cdba2eded1c762ce7383ee990ef2f123cff39954 Author: Gabe Black <gabeblack(a)google.com> Date: Sat May 18 15:55:47 2013 -0700 snow: Make coreboot set up pins for busses it knows are hooked up as such Coreboot knows that, for the snow board, certain pins are to be connected to bus controllers in the SOC and to the wires of a bus external to the SOC. It can configure them as such and free its payload from having to know how to set everything up. Change-Id: I1bb127c810e9ee077afc4227a6f316eaa53d6498 Signed-off-by: Gabe Black <gabeblack(a)chromium.org> --- src/mainboard/google/snow/mainboard.c | 28 ++++++++++++++++++++++++++++ 1 file changed, 28 insertions(+) diff --git a/src/mainboard/google/snow/mainboard.c b/src/mainboard/google/snow/mainboard.c index 250b71f..2dd56fc 100644 --- a/src/mainboard/google/snow/mainboard.c +++ b/src/mainboard/google/snow/mainboard.c @@ -176,6 +176,32 @@ static void disable_usb30_pll(void) gpio_direction_output(usb3_pll_l, 0); } +static void gpio_init(void) +{ + /* Set up the I2C busses. */ + exynos_pinmux_config(PERIPH_ID_I2C0, PINMUX_FLAG_NONE); + exynos_pinmux_config(PERIPH_ID_I2C1, PINMUX_FLAG_NONE); + exynos_pinmux_config(PERIPH_ID_I2C2, PINMUX_FLAG_NONE); + exynos_pinmux_config(PERIPH_ID_I2C3, PINMUX_FLAG_NONE); + exynos_pinmux_config(PERIPH_ID_I2C4, PINMUX_FLAG_NONE); + exynos_pinmux_config(PERIPH_ID_I2C7, PINMUX_FLAG_NONE); + + /* Set up the GPIOs used to arbitrate for I2C bus 4. */ + gpio_set_pull(GPIO_F03, GPIO_PULL_NONE); + gpio_set_pull(GPIO_E04, GPIO_PULL_NONE); + gpio_direction_output(GPIO_F03, 1); + gpio_direction_input(GPIO_E04); + + /* Set up the GPIO used to enable the audio codec. */ + gpio_set_pull(GPIO_X17, GPIO_PULL_NONE); + gpio_set_pull(GPIO_X15, GPIO_PULL_NONE); + gpio_direction_output(GPIO_X17, 1); + gpio_direction_output(GPIO_X15, 1); + + /* Set up the I2S busses. */ + exynos_pinmux_config(PERIPH_ID_I2S1, PINMUX_FLAG_NONE); +} + /* this happens after cpu_init where exynos resources are set */ static void mainboard_init(device_t dev) { @@ -186,6 +212,8 @@ static void mainboard_init(device_t dev) }; void *fb_addr; + gpio_init(); + i2c_init(TPS69050_BUS, I2C_0_SPEED, I2C_SLAVE); i2c_init(7, I2C_0_SPEED, I2C_SLAVE);

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Patch merged into coreboot/master: 63dd2cb exynos5250: When enabling the I2S pins, turn off pull ups/downs.
by gerrit＠coreboot.org 10 Jul '13

10 Jul '13

the following patch was just integrated into master: commit 63dd2cb62a780158571c4cf5465ce7953a0e38fc Author: Gabe Black <gabeblack(a)google.com> Date: Sat May 18 15:52:01 2013 -0700 exynos5250: When enabling the I2S pins, turn off pull ups/downs. These pins will be driven by the internal controller which shouldn't have pull ups or downs in the pin fighting with them. Change-Id: I579aed84ace45d8f5f1d3ca64c064d98de842b57 Signed-off-by: Gabe Black <gabeblack(a)chromium.org> Reviewed-on: http://review.coreboot.org/3649 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> See http://review.coreboot.org/3649 for details. -gerrit

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Patch merged into coreboot/master: ea9c98d exynos5420: Replace the 5250 GPIO code with code that should work on 5420.
by gerrit＠coreboot.org 10 Jul '13

10 Jul '13

the following patch was just integrated into master: commit ea9c98d454e4ea60452de1bbe38dfeea857c3142 Author: Gabe Black <gabeblack(a)google.com> Date: Fri May 17 02:57:17 2013 -0700 exynos5420: Replace the 5250 GPIO code with code that should work on 5420. Change-Id: Iac6615240e94c74037afc801169c32d3ebc4ac03 Signed-off-by: Gabe Black <gabeblack(a)chromium.org> Reviewed-on: http://review.coreboot.org/3648 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> See http://review.coreboot.org/3648 for details. -gerrit

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Patch merged into coreboot/master: 919c804 ARMv7: Clean up console code
by gerrit＠coreboot.org 10 Jul '13

10 Jul '13

the following patch was just integrated into master: commit 919c8044255f83c7f86023c561a20e1b2d05a2ce Author: Stefan Reinauer <reinauer(a)chromium.org> Date: Thu May 16 10:57:15 2013 -0700 ARMv7: Clean up console code - Guard console_init() with CONFIG_EARLY_CONSOLE in bootblock - Don't initialize console twice in the bootblock - remove printk in memory init that would mess up the UART - unconditionally run console_init() in romstage, as it is also unconditionally run in the bootblock. Change-Id: I8f0d60877433162367074d0e55e01f935fd81f8e Signed-off-by: Stefan Reinauer <reinauer(a)google.com> Signed-off-by: Gabe Black <gabeblack(a)chromium.org> Reviewed-on: http://review.coreboot.org/3647 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> See http://review.coreboot.org/3647 for details. -gerrit

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coreboot-gerrit July 2013