coreboot-gerrit July 2013

coreboot-gerrit@coreboot.org

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Patch merged into coreboot/master: 998ab0d Exynos5420: Clean up console code
by gerrit＠coreboot.org 10 Jul '13

10 Jul '13

the following patch was just integrated into master: commit 998ab0d5f9fbb43edfa0c8f78d1b99f78cd94180 Author: Stefan Reinauer <reinauer(a)chromium.org> Date: Mon May 20 12:29:37 2013 -0700 Exynos5420: Clean up console code - Don't initialize console twice in the bootblock - remove printk in memory init that would mess up the UART - unconditionally run console_init() in romstage, as it is also unconditionally run in the bootblock. Change-Id: I983d011c6ca602445f447d17799c1b2a33e8bd1d Signed-off-by: Stefan Reinauer <reinauer(a)chromium.org> Signed-off-by: Gabe Black <gabeblack(a)chromium.org> Reviewed-on: http://review.coreboot.org/3656 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> See http://review.coreboot.org/3656 for details. -gerrit

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Patch merged into coreboot/master: 045222f ec: Remove hardcoded GPI offset in EC SCI
by gerrit＠coreboot.org 10 Jul '13

10 Jul '13

the following patch was just integrated into master: commit 045222f31260d60b337b221ed373edd284386fd5 Author: Duncan Laurie <dlaurie(a)chromium.org> Date: Tue May 21 07:49:11 2013 -0700 ec: Remove hardcoded GPI offset in EC SCI With LynxPoint-LP the SCI GPE is no longer a GPIO that is offset by 16. Remove the Add and fix up the link definition so it is still accurate. Change-Id: I091141183a09345b5ffe28365583e48019f9f5e5 Signed-off-by: Duncan Laurie <dlaurie(a)chromium.org> Reviewed-on: http://review.coreboot.org/3742 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> See http://review.coreboot.org/3742 for details. -gerrit

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Patch merged into coreboot/master: 39fda6d exynos5250: Clear the framebuffer before making it uncacheable.
by gerrit＠coreboot.org 10 Jul '13

10 Jul '13

the following patch was just integrated into master: commit 39fda6d9159461f04f74259919281baca7cb4393 Author: Gabe Black <gabeblack(a)google.com> Date: Sat May 18 23:06:47 2013 -0700 exynos5250: Clear the framebuffer before making it uncacheable. If we clear the framebuffer and then flush it back to memory using cache operations, the writes are going to be full cachelines at a time. If we make it uncacheable first, the writes will be serialized writes of whatever sized chunks memset uses, probably 4 bytes or less. Change-Id: I1b81731cfed00ae091ba6357451ab186d16f559e Signed-off-by: Gabe Black <gabeblack(a)chromium.org> Reviewed-on: http://review.coreboot.org/3655 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> See http://review.coreboot.org/3655 for details. -gerrit

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Patch merged into coreboot/master: 986162b exynos5250: Don't disable and re-enable the MMU when uncaching the framebuffer.
by gerrit＠coreboot.org 10 Jul '13

10 Jul '13

the following patch was just integrated into master: commit 986162b25f1038e5425713883310ba6002859d7d Author: Gabe Black <gabeblack(a)google.com> Date: Sat May 18 22:57:34 2013 -0700 exynos5250: Don't disable and re-enable the MMU when uncaching the framebuffer. At one time it seemed to be necessary to disable and then re-enable the MMU when setting the framebuffer to be uncache-able due to bugs in the MMU management code. Since those bugs have been fixed, this is no longer necessary. Change-Id: I5f7b9bd14dc9929efe1834ec9a258d388b8c94e9 Signed-off-by: Gabe Black <gabeblack(a)chromium.org> Reviewed-on: http://review.coreboot.org/3654 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> See http://review.coreboot.org/3654 for details. -gerrit

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Patch merged into coreboot/master: 800790d ARM: Fix up page table/cachability management.
by gerrit＠coreboot.org 10 Jul '13

10 Jul '13

the following patch was just integrated into master: commit 800790d4e1e4817a140c706a32b5448cbd9d0c45 Author: Gabe Black <gabeblack(a)google.com> Date: Sat May 18 22:45:54 2013 -0700 ARM: Fix up page table/cachability management. When modifying the page tables, use writel to ensure the writes happen, flush the page tables themselves to ensure they're visible to the MMU if it doesn't look at the caches, and invalidate the right TLB entries. The first two changes are probably safer but may not be strictly necessary. The third change is necessary because we were invalidating the TLB using i which was in megabytes but using an instruction that expects an address in bytes. One symptom of this problem was that the framebuffer, which was supposed to be marked uncacheable, was only being partially updated since some of the updates were still in the cache. With this change the graphics show up correctly. Change-Id: I5475df29690371459b0d37a304eebc62f81dd76b Signed-off-by: Gabe Black <gabeblack(a)chromium.org> Reviewed-on: http://review.coreboot.org/3653 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> See http://review.coreboot.org/3653 for details. -gerrit

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Patch merged into coreboot/master: 1e797bd exynos5250: Simplify the graphics code by eliminating the unused color map.
by gerrit＠coreboot.org 10 Jul '13

10 Jul '13

the following patch was just integrated into master: commit 1e797bdb79b9b3d05640abfee93acf1359cda4db Author: Gabe Black <gabeblack(a)google.com> Date: Sat May 18 15:58:46 2013 -0700 exynos5250: Simplify the graphics code by eliminating the unused color map. The code that allocated space for the framebuffer was adding space for a vestigial color map which was never used. It was also passing around a structure which was used to calculate a single value which was already known when that structure was put together. Eliminate the extra space, and pass the single value instead of the structure. Change-Id: Ia6a41cefdf8b29fe7d68f9596a156eced6eb5df8 Signed-off-by: Gabe Black <gabeblack(a)chromium.org> Reviewed-on: http://review.coreboot.org/3652 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> See http://review.coreboot.org/3652 for details. -gerrit

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Patch merged into coreboot/master: 1387b43 snow: Make coreboot set up pins for busses it knows are hooked up as such
by gerrit＠coreboot.org 10 Jul '13

10 Jul '13

the following patch was just integrated into master: commit 1387b439f125090550ee12fe178e571a1ca40337 Author: Gabe Black <gabeblack(a)google.com> Date: Sat May 18 15:55:47 2013 -0700 snow: Make coreboot set up pins for busses it knows are hooked up as such Coreboot knows that, for the snow board, certain pins are to be connected to bus controllers in the SOC and to the wires of a bus external to the SOC. It can configure them as such and free its payload from having to know how to set everything up. Change-Id: I1bb127c810e9ee077afc4227a6f316eaa53d6498 Signed-off-by: Gabe Black <gabeblack(a)chromium.org> Reviewed-on: http://review.coreboot.org/3650 Reviewed-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Tested-by: build bot (Jenkins) See http://review.coreboot.org/3650 for details. -gerrit

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Patch set updated for coreboot: 3041a93 lenovo/t60 lenovo/x60: Override SMBIOS Manufacturer to be LENOVO
by Stefan Reinauer 10 Jul '13

10 Jul '13

Stefan Reinauer (stefan.reinauer(a)coreboot.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/3731 -gerrit commit 3041a93cbc52897944b44744932933a323c21daa Author: Peter Stuge <peter(a)stuge.se> Date: Tue Jul 9 20:44:52 2013 +0200 lenovo/t60 lenovo/x60: Override SMBIOS Manufacturer to be LENOVO This is needed for the Linux thinkpad_acpi.c driver to load. Change-Id: I3d9549395556ffb0abfc3cb52b3d01386c34caa5 Signed-off-by: Peter Stuge <peter(a)stuge.se> --- src/mainboard/lenovo/t60/Kconfig | 4 ++++ src/mainboard/lenovo/x60/Kconfig | 4 ++++ 2 files changed, 8 insertions(+) diff --git a/src/mainboard/lenovo/t60/Kconfig b/src/mainboard/lenovo/t60/Kconfig index bf24db7..e5d17b8 100644 --- a/src/mainboard/lenovo/t60/Kconfig +++ b/src/mainboard/lenovo/t60/Kconfig @@ -50,4 +50,8 @@ config MAX_CPUS int default 2 +config MAINBOARD_SMBIOS_MANUFACTURER + string + default "LENOVO" + endif diff --git a/src/mainboard/lenovo/x60/Kconfig b/src/mainboard/lenovo/x60/Kconfig index bcf5e04..1a765fb 100644 --- a/src/mainboard/lenovo/x60/Kconfig +++ b/src/mainboard/lenovo/x60/Kconfig @@ -54,4 +54,8 @@ config MAX_CPUS int default 2 +config MAINBOARD_SMBIOS_MANUFACTURER + string + default "LENOVO" + endif

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Patch set updated for coreboot: 761c1bb SMBIOS: Allow overriding default Manufacturer and Product names
by Stefan Reinauer 10 Jul '13

10 Jul '13

Stefan Reinauer (stefan.reinauer(a)coreboot.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/1556 -gerrit commit 761c1bbc985a9fe751440dc57bc0a89abead5daf Author: Peter Stuge <peter(a)stuge.se> Date: Thu Oct 4 21:18:13 2012 +0200 SMBIOS: Allow overriding default Manufacturer and Product names The vendor and part name from coreboot is normally stored in these SMBIOS structure fields, but it can be useful to override them. On Lenovo ThinkPads an override is e.g. needed to convince the Linux thinkpad_acpi.c driver that it is actually running on a ThinkPad. Change-Id: I0dfe38b9f6f99b3376f1547412ecc97c2f7aff2b Signed-off-by: Peter Stuge <peter(a)stuge.se> --- src/arch/x86/boot/smbios.c | 6 +++--- src/mainboard/Kconfig | 15 +++++++++++++++ 2 files changed, 18 insertions(+), 3 deletions(-) diff --git a/src/arch/x86/boot/smbios.c b/src/arch/x86/boot/smbios.c index 308336a..073c7c5 100644 --- a/src/arch/x86/boot/smbios.c +++ b/src/arch/x86/boot/smbios.c @@ -192,8 +192,8 @@ static int smbios_write_type1(unsigned long *current, int handle) t->type = SMBIOS_SYSTEM_INFORMATION; t->handle = handle; t->length = len - 2; - t->manufacturer = smbios_add_string(t->eos, CONFIG_MAINBOARD_VENDOR); - t->product_name = smbios_add_string(t->eos, CONFIG_MAINBOARD_PART_NUMBER); + t->manufacturer = smbios_add_string(t->eos, CONFIG_MAINBOARD_SMBIOS_MANUFACTURER); + t->product_name = smbios_add_string(t->eos, CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME); t->serial_number = smbios_add_string(t->eos, smbios_mainboard_serial_number()); t->version = smbios_add_string(t->eos, smbios_mainboard_version()); len = t->length + smbios_string_table_len(t->eos); @@ -210,7 +210,7 @@ static int smbios_write_type3(unsigned long *current, int handle) t->type = SMBIOS_SYSTEM_ENCLOSURE; t->handle = handle; t->length = len - 2; - t->manufacturer = smbios_add_string(t->eos, CONFIG_MAINBOARD_VENDOR); + t->manufacturer = smbios_add_string(t->eos, CONFIG_MAINBOARD_SMBIOS_MANUFACTURER); t->bootup_state = SMBIOS_STATE_SAFE; t->power_supply_state = SMBIOS_STATE_SAFE; t->thermal_state = SMBIOS_STATE_SAFE; diff --git a/src/mainboard/Kconfig b/src/mainboard/Kconfig index d6413c9..a8cf362 100644 --- a/src/mainboard/Kconfig +++ b/src/mainboard/Kconfig @@ -347,4 +347,19 @@ config MAINBOARD_VERSION default "1.0" help Define the used version number which will be used by SMBIOS tables. + +config MAINBOARD_SMBIOS_MANUFACTURER + string "SMBIOS Manufacturer" + depends on GENERATE_SMBIOS_TABLES + default MAINBOARD_VENDOR + help + Override the default Manufacturer stored in SMBIOS structures. + +config MAINBOARD_SMBIOS_PRODUCT_NAME + string "SMBIOS Product name" + depends on GENERATE_SMBIOS_TABLES + default MAINBOARD_PART_NUMBER + help + Override the default Product name stored in SMBIOS structures. + endmenu

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Patch merged into coreboot/master: 5688979 drivers: Fix spelling
by gerrit＠coreboot.org 10 Jul '13

10 Jul '13

the following patch was just integrated into master: commit 5688979fbd190af1a6c5181a837341761043a8b2 Author: Martin Roth <martin.roth(a)se-eng.com> Date: Tue Jul 9 21:39:46 2013 -0600 drivers: Fix spelling Change-Id: Ib0d98e3ab5b2943c36f88765587e8963a4f49604 Signed-off-by: Martin Roth <martin.roth(a)se-eng.com> Reviewed-on: http://review.coreboot.org/3754 Reviewed-by: Paul Menzel <paulepanter(a)users.sourceforge.net> Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> See http://review.coreboot.org/3754 for details. -gerrit

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coreboot-gerrit July 2013