March 2013 - coreboot-gerrit - mail.coreboot.org

Patch merged into coreboot/master: b631f9c Intel: Update CPU microcode script
by gerrit＠coreboot.org March 21, 2013

March 21, 2013

the following patch was just integrated into master: commit b631f9cd3f36eb900c115288f3efc4fdaa0ee765 Author: Stefan Reinauer <reinauer(a)chromium.org> Date: Tue Mar 19 13:20:47 2013 -0700 Intel: Update CPU microcode script for latest URL of their microcode tar ball Change-Id: I3da2bdac4b2ca7d3f48b20ed389f6a47275d24fe Signed-off-by: Stefan Reinauer <reinauer(a)google.com> Reviewed-on: http://review.coreboot.org/2842 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter(a)users.sourceforge.net> Reviewed-by: Ronald G. Minnich <rminnich(a)gmail.com> Build-Tested: build bot (Jenkins) at Tue Mar 19 23:17:24 2013, giving +1 Reviewed-By: Ronald G. Minnich <rminnich(a)gmail.com> at Thu Mar 21 23:19:33 2013, giving +2 See http://review.coreboot.org/2842 for details. -gerrit

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Patch merged into coreboot/master: 7b8952c Butterfly, Stout: Force SATA link speed to 3 Gbps
by gerrit＠coreboot.org March 21, 2013

March 21, 2013

the following patch was just integrated into master: commit 7b8952c19d8d809b7aeec629b31e1c3d66f19884 Author: Shawn Nematbakhsh <shawnn(a)google.com> Date: Thu Mar 14 11:03:59 2013 -0700 Butterfly, Stout: Force SATA link speed to 3 Gbps Force link speed on these platforms to 3 Gbps to defeat buggy SATA drives. Change-Id: Ia38a7c486fb1f4469cd67ca5244bbf61f877d556 Signed-off-by: Shawn Nematbakhsh <shawnn(a)google.com> Reviewed-on: http://review.coreboot.org/2823 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich(a)gmail.com> Build-Tested: build bot (Jenkins) at Tue Mar 19 10:26:11 2013, giving +1 Reviewed-By: Ronald G. Minnich <rminnich(a)gmail.com> at Thu Mar 21 23:17:59 2013, giving +2 See http://review.coreboot.org/2823 for details. -gerrit

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Patch merged into coreboot/master: 2b7c88f rmodule: add string functions to rmodules class
by gerrit＠coreboot.org March 21, 2013

March 21, 2013

the following patch was just integrated into master: commit 2b7c88f99ed55682378bc0b1aae8004e6e27fe7b Author: Aaron Durbin <adurbin(a)chromium.org> Date: Fri Mar 1 16:56:34 2013 -0600 rmodule: add string functions to rmodules class The standard string functions memcmp(), memset(), and memcpy() are needed by most programs. The rmodules class provides a way to build objects for the rmodules class. Those programs most likely need the string functions. Therefore provide those standard functions to be used by any generic rmodule program. Change-Id: I2737633f03894d54229c7fa7250c818bf78ee4b7 Signed-off-by: Aaron Durbin <adurbin(a)chromium.org> Reviewed-on: http://review.coreboot.org/2821 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich(a)gmail.com> Build-Tested: build bot (Jenkins) at Tue Mar 19 20:50:49 2013, giving +1 Reviewed-By: Ronald G. Minnich <rminnich(a)gmail.com> at Thu Mar 21 23:14:04 2013, giving +2 See http://review.coreboot.org/2821 for details. -gerrit

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Patch merged into coreboot/master: deb90f4 lynxpoint: Fix up handling for LynxPoint-LP chipsets
by gerrit＠coreboot.org March 21, 2013

March 21, 2013

the following patch was just integrated into master: commit deb90f475992c6991f03dbf6035d7b82d2ee9044 Author: Duncan Laurie <dlaurie(a)chromium.org> Date: Fri Mar 8 17:22:37 2013 -0800 lynxpoint: Fix up handling for LynxPoint-LP chipsets This configures power management registers according to the 1.2.0 reference code drop. There are many inconsistencies with the documentation and I tried to note those with ?. This does not do the same for LynxPoint-H yet. Change-Id: I9b8f5c24a8b0931075a44398571c9b0d54cce6a6 Signed-off-by: Duncan Laurie <dlaurie(a)chromium.org> Reviewed-on: http://review.coreboot.org/2819 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich(a)gmail.com> Build-Tested: build bot (Jenkins) at Tue Mar 19 21:24:11 2013, giving +1 Reviewed-By: Ronald G. Minnich <rminnich(a)gmail.com> at Thu Mar 21 23:13:41 2013, giving +2 See http://review.coreboot.org/2819 for details. -gerrit

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Patch merged into coreboot/master: 70f04b4 lynxpoint: Change sata.c to get rid of #if
by gerrit＠coreboot.org March 21, 2013

March 21, 2013

the following patch was just integrated into master: commit 70f04b41ce07ba5ae0dbdb3112e1d8ed32c83b64 Author: Duncan Laurie <dlaurie(a)chromium.org> Date: Fri Mar 8 17:17:33 2013 -0800 lynxpoint: Change sata.c to get rid of #if This uses the new helper function added earlier. Change-Id: Icdb5d5c51f70eeb7e39e11062276ceb3eb3d9473 Signed-off-by: Duncan Laurie <dlaurie(a)chromium.org> Reviewed-on: http://review.coreboot.org/2818 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter(a)users.sourceforge.net> Reviewed-by: Ronald G. Minnich <rminnich(a)gmail.com> Build-Tested: build bot (Jenkins) at Tue Mar 19 21:02:16 2013, giving +1 Reviewed-By: Ronald G. Minnich <rminnich(a)gmail.com> at Thu Mar 21 23:12:55 2013, giving +2 See http://review.coreboot.org/2818 for details. -gerrit

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Patch merged into coreboot/master: d604090 lynxpoint: Fix ELOG logging of power management events
by gerrit＠coreboot.org March 21, 2013

March 21, 2013

the following patch was just integrated into master: commit d604090b2866f4d8526731034e55e2ea65a305c6 Author: Duncan Laurie <dlaurie(a)chromium.org> Date: Fri Mar 8 17:16:37 2013 -0800 lynxpoint: Fix ELOG logging of power management events This is updated to handle LynxPoint-H and LynxPoint-LP and a new wake event is added for the power button. Boot, suspend/resume, reboot, etc on WTM2 and then check the event log to see if expected events have been added. Change-Id: I15cbc3901d81f4fd77cc04de37ff5fa048f9d3e8 Signed-off-by: Duncan Laurie <dlaurie(a)chromium.org> Reviewed-on: http://review.coreboot.org/2817 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich(a)gmail.com> Build-Tested: build bot (Jenkins) at Tue Mar 19 21:57:22 2013, giving +1 Reviewed-By: Ronald G. Minnich <rminnich(a)gmail.com> at Thu Mar 21 23:12:11 2013, giving +2 See http://review.coreboot.org/2817 for details. -gerrit

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Patch merged into coreboot/master: 467f31d haswell/lynxpoint: Use new PCH/PM helper functions
by gerrit＠coreboot.org March 21, 2013

March 21, 2013

the following patch was just integrated into master: commit 467f31de92ca2ed9df1530270e9aabdd69fe8f88 Author: Duncan Laurie <dlaurie(a)chromium.org> Date: Fri Mar 8 17:00:37 2013 -0800 haswell/lynxpoint: Use new PCH/PM helper functions This makes use of the new functions from pmutil.c that take care of the differences between -H and -LP chipsets. It also adds support for the LynxPoint-LP GPE0 register block and the SMI/SCI routing differences. The FADT is updated to report the new 256 byte GPE0 block on wtm2/wtm2 boards which is too big for the 64bit X_GPE0 address block so that part is zeroed to prevent IASL and the kernel from complaining about a mismatch. This was tested on WTM2. Unfortunately I am still unable to get an SCI delivered from the EC but I suspect that is due to a magic command needed to put the EC in ACPI mode. Instead I verified that all of the power management and GPIO registers were set to expected values. I also tested transitions into S3 and S5 from both the kernel and by pressing the power button at the developer mode screen and they all function as expected. Change-Id: Ice9e798ea5144db228349ce90540745c0780b20a Signed-off-by: Duncan Laurie <dlaurie(a)chromium.org> Reviewed-on: http://review.coreboot.org/2816 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich(a)gmail.com> Build-Tested: build bot (Jenkins) at Tue Mar 19 21:46:23 2013, giving +1 Reviewed-By: Ronald G. Minnich <rminnich(a)gmail.com> at Thu Mar 21 23:11:25 2013, giving +2 See http://review.coreboot.org/2816 for details. -gerrit

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Patch merged into coreboot/master: 7922b46 lynxpoint: Fix GPIO and PM base reservations
by gerrit＠coreboot.org March 21, 2013

March 21, 2013

the following patch was just integrated into master: commit 7922b468b51eea58c7238f11b21820b8d3747d6b Author: Duncan Laurie <dlaurie(a)chromium.org> Date: Fri Mar 8 16:34:33 2013 -0800 lynxpoint: Fix GPIO and PM base reservations The kernel ACPI was not happy with the Add inside a ResourceTemplate (or perhaps within the IO declaration) Instead make a buffer of IO reservations and turn _CRS into a method that updates the buffer depending on the chipset type. This adds an \ISLP() method that checks the chipset LPC device ID to see if it is -LP or -H. It also increases the PM base reservation to 256 bytes and moves both GPIO and PM base to above 0x1000 on -LP chipsets. Change-Id: I747b658588a4d8ed15a0134009a7c0d74b3916ba Signed-off-by: Duncan Laurie <dlaurie(a)chromium.org> Reviewed-on: http://review.coreboot.org/2815 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich(a)gmail.com> Build-Tested: build bot (Jenkins) at Tue Mar 19 21:35:10 2013, giving +1 Reviewed-By: Ronald G. Minnich <rminnich(a)gmail.com> at Thu Mar 21 23:09:49 2013, giving +2 See http://review.coreboot.org/2815 for details. -gerrit

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Patch merged into coreboot/master: f5966b1 lynxpoint: remove DEBUG_PERIODIC_SMIS
by gerrit＠coreboot.org March 21, 2013

March 21, 2013

the following patch was just integrated into master: commit f5966b14e8d2a0613d5cbafbf73d76bed371899d Author: Duncan Laurie <dlaurie(a)chromium.org> Date: Fri Mar 8 16:06:06 2013 -0800 lynxpoint: remove DEBUG_PERIODIC_SMIS This was put in for debugging and experimentation on i945 and has been copied around since. Drop it from lynxpoint. Change-Id: I0b53f4e1362cd3ce703625ef2b4988139c48b989 Signed-off-by: Duncan Laurie <dlaurie(a)chromium.org> Reviewed-on: http://review.coreboot.org/2814 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich(a)gmail.com> Build-Tested: build bot (Jenkins) at Tue Mar 19 21:12:50 2013, giving +1 Reviewed-By: Ronald G. Minnich <rminnich(a)gmail.com> at Thu Mar 21 23:08:56 2013, giving +2 See http://review.coreboot.org/2814 for details. -gerrit

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Patch merged into coreboot/master: 55cdf55 lynxpoint: Add power management helper functions
by gerrit＠coreboot.org March 21, 2013

March 21, 2013

the following patch was just integrated into master: commit 55cdf5519074ebaf972edff488be7f1340436ca1 Author: Duncan Laurie <dlaurie(a)chromium.org> Date: Fri Mar 8 16:01:44 2013 -0800 lynxpoint: Add power management helper functions There are subtle yet significant differences in some of the registers in the power management region between LynxPoint-H and LynxPoint-LP. In order to reduce code that is accessing these registers and would need special cases this adds a number of helper functions that can be used in both ramstage and SMM. This commit just adds the new functions, subsequent commits will start to use them. Change-Id: I411da75da519f5b3198a408078cbf3114e426992 Signed-off-by: Duncan Laurie <dlaurie(a)chromium.org> Reviewed-on: http://review.coreboot.org/2813 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich(a)gmail.com> Build-Tested: build bot (Jenkins) at Tue Mar 19 22:08:21 2013, giving +1 Reviewed-By: Ronald G. Minnich <rminnich(a)gmail.com> at Thu Mar 21 23:08:21 2013, giving +2 See http://review.coreboot.org/2813 for details. -gerrit

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