coreboot-gerrit December 2013

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Patch set updated for coreboot: 735d212 peppy: Port updates from slippy/falco boards
by Stefan Reinauer 02 Dec '13

02 Dec '13

Stefan Reinauer (stefan.reinauer(a)coreboot.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/4233 -gerrit commit 735d212cdb15b64021356eae452ac839cccaf988 Author: Duncan Laurie <dlaurie(a)chromium.org> Date: Tue Jun 11 08:49:55 2013 -0700 peppy: Port updates from slippy/falco boards - Add HDA verb table - Add on-board device table - Add panel power sequencing values Change-Id: I1b3450c2740ec1d930f157a9b23550e1efc8668f Signed-off-by: Duncan Laurie <dlaurie(a)chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/58197 Reviewed-by: Aaron Durbin <adurbin(a)chromium.org> Reviewed-by: Shawn Nematbakhsh <shawnn(a)chromium.org> --- src/mainboard/google/peppy/acpi/mainboard.asl | 72 ++++++++++++++++ src/mainboard/google/peppy/devicetree.cb | 8 ++ src/mainboard/google/peppy/hda_verb.h | 120 +++++++++++++------------- src/mainboard/google/peppy/mainboard.c | 38 ++++++++ src/mainboard/google/peppy/onboard.h | 40 +++++++++ 5 files changed, 216 insertions(+), 62 deletions(-) diff --git a/src/mainboard/google/peppy/acpi/mainboard.asl b/src/mainboard/google/peppy/acpi/mainboard.asl index 948d7df..7c892d1 100644 --- a/src/mainboard/google/peppy/acpi/mainboard.asl +++ b/src/mainboard/google/peppy/acpi/mainboard.asl @@ -19,6 +19,8 @@ * MA 02110-1301 USA */ +#include <mainboard/google/peppy/onboard.h> + Scope (\_SB) { Device (LID0) @@ -35,4 +37,74 @@ Scope (\_SB) { Name(_HID, EisaId("PNP0C0C")) } + + Device (TPAD) + { + Name (_ADR, 0x0) + Name (_UID, 1) + + // Report as a Sleep Button device so Linux will + // automatically enable it as a wake source + Name (_HID, EisaId("PNP0C0E")) + + Name (_CRS, ResourceTemplate() + { + Interrupt (ResourceConsumer, Level, ActiveLow) + { + BOARD_TRACKPAD_IRQ + } + + VendorShort (ADDR) + { + BOARD_TRACKPAD_I2C_ADDR + } + }) + + Name (_PRW, Package() { BOARD_TRACKPAD_WAKE_GPIO, 0x3 }) + + Method (_DSW, 3, NotSerialized) + { + Store (BOARD_TRACKPAD_WAKE_GPIO, Local0) + + If (LEqual (Arg0, 1)) { + // Enable GPIO as wake source + \_SB.PCI0.LPCB.GWAK (Local0) + } + } + } + + Device (TSCR) + { + Name (_ADR, 0x0) + Name (_UID, 2) + + // Report as a Sleep Button device so Linux will + // automatically enable it as a wake source + Name (_HID, EisaId("PNP0C0E")) + + Name (_CRS, ResourceTemplate() + { + Interrupt (ResourceConsumer, Level, ActiveLow) + { + BOARD_TOUCHSCREEN_IRQ + } + + VendorShort (ADDR) + { + BOARD_TOUCHSCREEN_I2C_ADDR + } + }) + + Name (_PRW, Package() { BOARD_TOUCHSCREEN_WAKE_GPIO, 0x3 }) + + Method (_DSW, 3, NotSerialized) + { + Store (BOARD_TOUCHSCREEN_WAKE_GPIO, Local0) + + If (LEqual (Arg0, 1)) { + // Enable GPIO as wake source + \_SB.PCI0.LPCB.GWAK (Local0) + } + } + } } diff --git a/src/mainboard/google/peppy/devicetree.cb b/src/mainboard/google/peppy/devicetree.cb index fc6462c..b9bc47f 100644 --- a/src/mainboard/google/peppy/devicetree.cb +++ b/src/mainboard/google/peppy/devicetree.cb @@ -13,6 +13,14 @@ chip northbridge/intel/haswell register "gpu_cpu_backlight" = "0x00000200" register "gpu_pch_backlight" = "0x04000000" + # Enable Panel and configure power delays + register "gpu_panel_port_select" = "1" # eDP + register "gpu_panel_power_cycle_delay" = "5" # 400ms + register "gpu_panel_power_up_delay" = "400" # 40ms + register "gpu_panel_power_down_delay" = "150" # 15ms + register "gpu_panel_power_backlight_on_delay" = "2100" # 210ms + register "gpu_panel_power_backlight_off_delay" = "2100" # 210ms + device cpu_cluster 0 on chip cpu/intel/socket_rPGA989 device lapic 0 on end diff --git a/src/mainboard/google/peppy/hda_verb.h b/src/mainboard/google/peppy/hda_verb.h index 56275a2..3866a51 100644 --- a/src/mainboard/google/peppy/hda_verb.h +++ b/src/mainboard/google/peppy/hda_verb.h @@ -1,7 +1,7 @@ /* * This file is part of the coreboot project. * - * Copyright (C) 2012 Google Inc. + * Copyright (C) 2013 Google Inc. * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License as @@ -19,81 +19,77 @@ static const u32 mainboard_cim_verb_data[] = { /* coreboot specific header */ - 0x10134210, // Codec Vendor / Device ID: Cirrus Logic CS4210 - 0x10134210, // Subsystem ID - 0x00000007, // Number of jacks + 0x10ec0283, // Codec Vendor / Device ID: Realtek ALC283 + 0x10ec0283, // Subsystem ID + 0x0000000b, // Number of jacks (NID entries) - /* NID 0x01, HDA Codec Subsystem ID Verb Table: 0x10134210 */ - 0x00172010, - 0x00172142, - 0x00172213, + /* NID 0x01, HDA Codec Subsystem ID Verb Table: 0x10ec0283 */ + 0x00172083, + 0x00172102, + 0x001722ec, 0x00172310, /* Pin Widget Verb Table */ - /* Pin Complex (NID 0x05) 1/8 Gray HP Out at Ext Front */ - 0x00571cf0, - 0x00571d20, - 0x00571e21, - 0x00571f02, + /* Pin Complex (NID 0x12) DMIC - interior mobile lid */ + 0x00571c10, + 0x00571d10, + 0x00571ea6, + 0x00571fb7, - /* Pin Complex (NID 0x06) Analog Unknown Speaker at Int N/A */ - 0x00671c10, - 0x00671d00, - 0x00671e17, - 0x00671f90, + /* Pin Complex (NID 0x14) SPKR-OUT PORTD */ + 0x01471c10, // group 1, front left/right + 0x01471d01, // no connector, no jack detect + 0x01471e17, // speaker out, analog + 0x01471f90, // fixed function, internal - /* Pin Complex (NID 0x07) 1/8 Grey Line In at Ext Front */ - 0x00771cf0, - 0x00771d20, - 0x00771ea1, - 0x00771f02, + /* Pin Complex (NID 0x17) */ + 0x01771cf0, + 0x01771d11, + 0x01771e11, + 0x01771f41, - /* Pin Complex (NID 0x08) Analog Unknown Mic at Oth Mobile-In */ - 0x00871c37, - 0x00871d00, - 0x00871ea7, - 0x00871f77, + /* Pin Complex (NID 0x18) MIC1 PORTB */ + 0x01971c11, // group 1, cap 1 + 0x01971d10, // black, jack detect + 0x01971ea7, // mic in, analog + 0x01971f03, // connector, left panel - /* Pin Complex (NID 0x09) Digital Unknown Mic at Oth Mobile-In */ - 0x00971c3e, - 0x00971d00, - 0x00971ea6, - 0x00971f77, + /* Pin Complex (NID 0x19) MIC2 PORTF */ + 0x01871cf0, + 0x01871d11, + 0x01871e11, + 0x01871f41, - /* Pin Complex (NID 0x0a) Optical Black SPDIF Out at Ext N/A */ - 0x00a71cf0, - 0x00a71d10, - 0x00a71e45, - 0x00a71f43, + /* Pin Complex (NID 0x1A) LINE1 PORTC */ + 0x01a71cf0, + 0x01a71d11, + 0x01a71e11, + 0x01a71f41, - /* coreboot specific header */ - 0x80862805, // Codec Vendor / Device ID: Intel CougarPoint HDMI - 0x80860101, // Subsystem ID - 0x00000004, // Number of jacks + /* Pin Complex (NID 0x1B) LINE2 PORTE */ + 0x01a71cf0, + 0x01a71d11, + 0x01a71e11, + 0x01a71f41, - /* NID 0x01, HDA Codec Subsystem ID Verb Table: 0x80860101 */ - 0x00172001, - 0x00172101, - 0x00172286, - 0x00172380, + /* Pin Complex (NID 0x1d) PCBeep */ + 0x01d71c2d, // eapd low on ex-amp, laptop, custom enable + 0x01d71d81, // mute spkr on hpout + 0x01d71e15, // pcbeep en able, checksum + 0x01d71f40, // no physical, internal - /* Pin Complex (NID 0x05) Digital Out at Int HDMI */ - 0x30571c10, - 0x30571d00, - 0x30571e56, - 0x30571f18, + /* Pin Complex (NID 0x1E) SPDIF-OUT */ + 0x01e71cf0, + 0x01e71d11, + 0x01e71e11, + 0x01e71f41, - /* Pin Complex (NID 0x06) Digital Out at Int HDMI */ - 0x30671c20, - 0x30671d00, - 0x30671e56, - 0x30671f18, + /* Pin Complex (NID 0x21) HPOUT PORT-I */ + 0x02171c1f, // group1, + 0x02171d10, // black, jack detect + 0x02171e21, // HPOut, 1/8 stereo + 0x02171f03, // connector, left panel - /* Pin Complex (NID 0x07) Digital Out at Int HDMI */ - 0x30771c30, - 0x30771d00, - 0x30771e56, - 0x30771f18 }; diff --git a/src/mainboard/google/peppy/mainboard.c b/src/mainboard/google/peppy/mainboard.c index 0159bd0..3bf26e3 100644 --- a/src/mainboard/google/peppy/mainboard.c +++ b/src/mainboard/google/peppy/mainboard.c @@ -20,6 +20,7 @@ #include <types.h> #include <string.h> +#include <smbios.h> #include <device/device.h> #include <device/device.h> #include <device/pci_def.h> @@ -36,6 +37,7 @@ #include "hda_verb.h" #include <southbridge/intel/lynxpoint/pch.h> #include "ec.h" +#include "onboard.h" void mainboard_suspend_resume(void) { @@ -145,12 +147,48 @@ static void mainboard_init(device_t dev) mainboard_ec_init(); } +static int mainboard_smbios_data(device_t dev, int *handle, + unsigned long *current) +{ + int len = 0; + + len += smbios_write_type41( + current, handle, + BOARD_LIGHTSENSOR_NAME, /* name */ + BOARD_LIGHTSENSOR_IRQ, /* instance */ + BOARD_LIGHTSENSOR_I2C_BUS, /* segment */ + BOARD_LIGHTSENSOR_I2C_ADDR, /* bus */ + 0, /* device */ + 0); /* function */ + + len += smbios_write_type41( + current, handle, + BOARD_TRACKPAD_NAME, /* name */ + BOARD_TRACKPAD_IRQ, /* instance */ + BOARD_TRACKPAD_I2C_BUS, /* segment */ + BOARD_TRACKPAD_I2C_ADDR, /* bus */ + 0, /* device */ + 0); /* function */ + + len += smbios_write_type41( + current, handle, + BOARD_TOUCHSCREEN_NAME, /* name */ + BOARD_TOUCHSCREEN_IRQ, /* instance */ + BOARD_TOUCHSCREEN_I2C_BUS, /* segment */ + BOARD_TOUCHSCREEN_I2C_ADDR, /* bus */ + 0, /* device */ + 0); /* function */ + + return len; +} + // mainboard_enable is executed as first thing after // enumerate_buses(). static void mainboard_enable(device_t dev) { dev->ops->init = mainboard_init; + dev->ops->get_smbios_data = mainboard_smbios_data; #if CONFIG_PCI_ROM_RUN || CONFIG_VGA_ROM_RUN /* Install custom int15 handler for VGA OPROM */ mainboard_interrupt_handlers(0x15, &int15_handler); diff --git a/src/mainboard/google/peppy/onboard.h b/src/mainboard/google/peppy/onboard.h new file mode 100644 index 0000000..23e8f1e --- /dev/null +++ b/src/mainboard/google/peppy/onboard.h @@ -0,0 +1,40 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2012 Google Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#ifndef ONBOARD_H +#define ONBOARD_H + +#define BOARD_LIGHTSENSOR_NAME "lightsensor" +#define BOARD_LIGHTSENSOR_IRQ 51 /* PIRQT */ +#define BOARD_LIGHTSENSOR_I2C_BUS 2 /* I2C1 */ +#define BOARD_LIGHTSENSOR_I2C_ADDR 0x44 + +#define BOARD_TRACKPAD_NAME "trackpad" +#define BOARD_TRACKPAD_IRQ 37 /* PIRQV */ +#define BOARD_TRACKPAD_WAKE_GPIO 12 /* GPIO12 */ +#define BOARD_TRACKPAD_I2C_BUS 1 /* I2C0 */ +#define BOARD_TRACKPAD_I2C_ADDR 0x67 + +#define BOARD_TOUCHSCREEN_NAME "touchscreen" +#define BOARD_TOUCHSCREEN_IRQ 38 /* PIRQW */ +#define BOARD_TOUCHSCREEN_WAKE_GPIO 25 /* GPIO25 */ +#define BOARD_TOUCHSCREEN_I2C_BUS 2 /* I2C1 */ +#define BOARD_TOUCHSCREEN_I2C_ADDR 0x4a + +#endif

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Patch merged into coreboot/master: 9b17997 peppy: Add 2GB DRAM configuration.
by gerrit＠coreboot.org 02 Dec '13

02 Dec '13

the following patch was just integrated into master: commit 9b17997c40b6bb02abee7b11fafe42ef356bb7bf Author: Shawn Nematbakhsh <shawnn(a)google.com> Date: Thu Jun 13 19:47:47 2013 -0700 peppy: Add 2GB DRAM configuration. Currently, all Peppy boards w/ '000' SPD GPIOs have 2GB DRAM. Disable the second DRAM channel based upon the GPIOs. Need to change / confirm this for upcoming builds. Change-Id: I7085ddecb80626cc0bed99ba7b174c6b80350696 Reviewed-on: https://gerrit.chromium.org/gerrit/58620 Commit-Queue: Shawn Nematbakhsh <shawnn(a)chromium.org> Reviewed-by: Shawn Nematbakhsh <shawnn(a)chromium.org> Tested-by: Shawn Nematbakhsh <shawnn(a)chromium.org> See http://review.coreboot.org/4238 for details. -gerrit

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Patch merged into coreboot/master: 4948ea8 peppy: Re-enable EC software sync
by gerrit＠coreboot.org 02 Dec '13

02 Dec '13

the following patch was just integrated into master: commit 4948ea8d0afcf3b2da17755eb3389fc6f6315474 Author: Shawn Nematbakhsh <shawnn(a)chromium.org> Date: Fri May 31 18:57:20 2013 -0700 peppy: Re-enable EC software sync The EC was disabling flash commands and sysjump was not working properly. With those two fixed software sync works properly. (Taken from I63ca00d6c94854f2b395eb736ce20792da5f8de2). Change-Id: I9c7d1d1f1aaf7de33d0cec5f6daf648576ba8900 Reviewed-on: https://gerrit.chromium.org/gerrit/57289 Reviewed-by: Dave Parker <dparker(a)chromium.org> Commit-Queue: Shawn Nematbakhsh <shawnn(a)chromium.org> Tested-by: Shawn Nematbakhsh <shawnn(a)chromium.org> See http://review.coreboot.org/4212 for details. -gerrit

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Patch merged into coreboot/master: 10926ae peppy: Update GPIO table + USB port map.
by gerrit＠coreboot.org 02 Dec '13

02 Dec '13

the following patch was just integrated into master: commit 10926aeacd172545bf173f43cc6380d405088141 Author: Shawn Nematbakhsh <shawnn(a)chromium.org> Date: Tue May 28 17:46:49 2013 -0700 peppy: Update GPIO table + USB port map. - Update GPIO table to match board. - Update USB port map. - Remove iSSD power sequencing code. Change-Id: Iaa8e5921ed9db6bcfd18b5a888c7f80b2c93a710 Reviewed-on: https://gerrit.chromium.org/gerrit/56869 Reviewed-by: Shawn Nematbakhsh <shawnn(a)chromium.org> Signed-off-by: Shawn Nematbakhsh <shawnn(a)chromium.org> Tested-by: Shawn Nematbakhsh <shawnn(a)chromium.org> Commit-Queue: Shawn Nematbakhsh <shawnn(a)chromium.org> See http://review.coreboot.org/4211 for details. -gerrit

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Patch set updated for coreboot: 5cc5842 vboot: use out_flags to indicate dev mode
by Stefan Reinauer 02 Dec '13

02 Dec '13

Stefan Reinauer (stefan.reinauer(a)coreboot.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/4218 -gerrit commit 5cc5842fbb11efd5baaca30febe925e024801499 Author: Aaron Durbin <adurbin(a)chromium.org> Date: Tue Jun 4 08:57:54 2013 -0500 vboot: use out_flags to indicate dev mode In order to make the proper decision on loading the option rom or not the developer mode setting needs to be known. Under early firmware selection it is possible to know the state of developer mode by a flag in out flags. Use this flag when early firmware selection is being employed to determine if developer mode is enabled or not. Change-Id: I9c226d368e92ddf8f14ce4dcde00da144de2a5f3 Signed-off-by: Aaron Durbin <adurbin(a)chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/57380 Reviewed-by: Duncan Laurie <dlaurie(a)chromium.org> --- src/vendorcode/google/chromeos/chromeos.c | 21 ++++++++++++++++++++- 1 file changed, 20 insertions(+), 1 deletion(-) diff --git a/src/vendorcode/google/chromeos/chromeos.c b/src/vendorcode/google/chromeos/chromeos.c index 6f1fe72..c2cc0e1 100644 --- a/src/vendorcode/google/chromeos/chromeos.c +++ b/src/vendorcode/google/chromeos/chromeos.c @@ -26,9 +26,28 @@ #include <cbmem.h> #include <console/console.h> +#if CONFIG_VBOOT_VERIFY_FIRMWARE +static int vboot_enable_developer(void) +{ + struct vboot_handoff *vbho; + + vbho = cbmem_find(CBMEM_ID_VBOOT_HANDOFF); + + if (vbho == NULL) { + printk(BIOS_ERR, "%s: Couldn't find vboot_handoff structure!\n", + __func__); + return 0; + } + + return !!(vbho->init_params.out_flags & VB_INIT_OUT_ENABLE_DEVELOPER); +} +#else +static inline int vboot_enable_developer(void) { return 0; } +#endif + int developer_mode_enabled(void) { - return get_developer_mode_switch(); + return get_developer_mode_switch() || vboot_enable_developer(); } int recovery_mode_enabled(void)

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Patch set updated for coreboot: 9025333 cbfs: fix issues with word size and endianness.
by Ronald G. Minnich 02 Dec '13

02 Dec '13

Ronald G. Minnich (rminnich(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/4262 -gerrit commit 90253337e99c9186431a2727937bb6836aacf695 Author: Ronald G. Minnich <rminnich(a)google.com> Date: Fri Nov 22 09:28:48 2013 -0800 cbfs: fix issues with word size and endianness. Add xdr functions and use them to convert the ELF headers to native headers, using the Elf64 structs to ensure we accomodate all word sizes. This may seem overly complex but it turned out to be much the easiest way to do this. Note that the basic elf parsing function in cbfs-mkstage.c now works over all ELF files. Change-Id: I3457b1782f27cb930a2101d1c53f58e2488ed8a1 Signed-off-by: Ronald G. Minnich <rminnich(a)google.com> --- util/cbfstool/Makefile | 2 +- util/cbfstool/Makefile.inc | 1 + util/cbfstool/cbfs-mkstage.c | 293 +++++++++++++++++++++++++++++++++++-------- util/cbfstool/common.h | 11 ++ util/cbfstool/xdr.c | 141 +++++++++++++++++++++ 5 files changed, 393 insertions(+), 55 deletions(-) diff --git a/util/cbfstool/Makefile b/util/cbfstool/Makefile index 3aa5edc..281d75c 100644 --- a/util/cbfstool/Makefile +++ b/util/cbfstool/Makefile @@ -7,7 +7,7 @@ CFLAGS += -D_7ZIP_ST BINARY:=$(obj)/cbfstool COMMON:=cbfstool.o common.o cbfs_image.o compress.o fit.o -COMMON+=cbfs-mkstage.o cbfs-mkpayload.o +COMMON+=cbfs-mkstage.o cbfs-mkpayload.o xdr.o # LZMA COMMON+=lzma/lzma.o COMMON+=lzma/C/LzFind.o lzma/C/LzmaDec.o lzma/C/LzmaEnc.o diff --git a/util/cbfstool/Makefile.inc b/util/cbfstool/Makefile.inc index fc120f3..4270d75 100644 --- a/util/cbfstool/Makefile.inc +++ b/util/cbfstool/Makefile.inc @@ -5,6 +5,7 @@ cbfsobj += compress.o cbfsobj += cbfs_image.o cbfsobj += cbfs-mkstage.o cbfsobj += cbfs-mkpayload.o +cbfsobj += xdr.o cbfsobj += fit.o # LZMA cbfsobj += lzma.o diff --git a/util/cbfstool/cbfs-mkstage.c b/util/cbfstool/cbfs-mkstage.c index dfc93c2..6434f96 100644 --- a/util/cbfstool/cbfs-mkstage.c +++ b/util/cbfstool/cbfs-mkstage.c @@ -28,90 +28,270 @@ #include "cbfs.h" #include "elf.h" -static unsigned int idemp(unsigned int x) +/* + * Short form: this is complicated, but we've tried making it simple + * and we keep hitting problems with our ELF parsing. + * + * The ELF parsing situation has always been a bit tricky. In fact, + * we (and most others) have been getting it wrong in small ways for + * years. Recently this has caused real trouble for the ARM V8 build. + * In this file we attempt to finally get it right for all variations + * of endian-ness and word size and target architectures and + * architectures we might get run on. Phew!. To do this we borrow a + * page from the FreeBSD NFS xdr model (see elf_ehdr and elf_phdr), + * the Plan 9 endianness functions (see xdr.c), and Go interfaces (see + * how we use buffer structs in this file). This ends up being a bit + * wordy at the lowest level, but greatly simpplifies the elf parsing + * code aad removes a common source of bugs, namely, forgetting to + * flip type endianness when referencing a struct member. + * + * ELF files can have four combinations of data layout: 32/64, and + * big/little endian. Further, to add to the fun, depending on the + * word size, the size of the ELF structs varies. The coreboot SELF + * format is simpler in theory: it's supposed to be always BE, and the + * various struct members allow room for growth: the entry point is + * always 64 bits, for example, so the size of a SELF struct is + * constant, regardless of target architecture word size. Hence, we + * need to do some transformation of the ELF files. + * + * A given architecture, realistically, only supports one of the four + * combinations at a time as the 'native' formst. Hence, our code has + * been sprinkled with every variation of [nh]to[hn][sll] over the + * years. We've never quite gotten it all right, however, and a quick + * pass over this code revealed another bug. It's all worked because, + * until now, all the working platforms that had CBFS were 32 LE. Even then, + * however, bugs crept in: we recently realized that we're not + * transforming the entry point to big format when we store into the + * SELF image. + * + * The problem is essentially an XDR operation: + * we have something in a foreign format and need to transform it. + * It's most like XDR because: + * 1) the byte order can be wrong + * 2) the word size can be wrong + * 3) the size of elements in the stream depends on the value + * of other elements in the stream + * it's not like XDR because: + * 1) the byte order can be right + * 2) the word size can be right + * 3) the struct members are all on a natural alignment + * + * Hence, this new approach. + * To cover word size issues, we *always* transform the two structs we care about, + * the file header and program header, into a native struct in the 64 bit format: + * [32,little] -> [Elf64_Ehdr, Elf64_Phdr] + * [64,little] -> [Elf64_Ehdr, Elf64_Phdr] + * [32,big] -> [Elf64_Ehdr, Elf64_Phdr] + * [64,big] -> [Elf64_Ehdr, Elf64_Phdr] + * Then we just use those structs, and all the need for inline ntoh* goes away, + * as well as all the chances for error. + * This works because all the SELF structs have fields large enough for + * the largest ELF 64 struct members, and all the Elf64 struct members + * are at least large enough for all ELF 32 struct members. + * We end up with one function to do all our ELF parsing, and two functions + * to transform the headers. For the put case, we also have + * XDR functions, and hopefully we'll never again spend 5 years with the + * wrong endian-ness on an output value :-) + * This should work for all word sizes and endianness we hope to target. + * I *really* don't want to be here for 128 bit addresses. + * + * The parse functions are called with a pointer to an input buffer + * struct. One might ask: are there enough bytes in the input buffer? + * We know there need to be at *least* sizeof(Elf32_Ehdr) + + * sizeof(Elf32_Phdr) bytes. Realistically, there has to be some data + * too. If we start to worry, though we have not in the past, we + * might apply the simple test: the input buffer needs to be at least + * sizeof(Elf64_Ehdr) + sizeof(Elf64_Phdr) bytes because, even if it's + * ELF 32, there's got to be *some* data! This is not theoretically + * accurate but it is actually good enough in practice. It allows the + * header transformation code to ignore the possibility of underrun. + * + * We also must accomodate different ELF files, and hence formats, + * in the same cbfs invocation. We might load a 64-bit payload + * on a 32-bit machine; we might even have a mixed armv7/armv8 + * SOC or even a system with an x86/ARM! + * + * A possibly problematic (though unlikely to be so) assumption + * is that we expect the BIOS to remain in the lowest 32 bits + * of the physical address space. Since ARMV8 has standardized + * on that, and x86_64 also has, this seems a safe assumption. + * + * To repeat, ELF structs are different sizes because ELF struct + * members are different sizes, depending on values in the ELF file + * header. For this we use the functions defined in xdr.c, which + * consume bytes, convert the endianness, and advance the data pointer + * in the buffer struct. + */ + +/* Get the ident array, so we can figure out + * endian-ness, word size, and in future other useful + * parameters + */ +static void +elf_eident(struct buffer *input, Elf64_Ehdr *ehdr) { - return x; + memmove(ehdr->e_ident, input->data, sizeof(ehdr->e_ident)); + input->data += sizeof(ehdr->e_ident); + input->size -= sizeof(ehdr->e_ident); } -/* This is a wrapper around the swab32() macro to make it - * usable for the current implementation of parse_elf_to_stage() - */ -static unsigned int swap32(unsigned int x) +static void +elf_ehdr(struct buffer *input, Elf64_Ehdr *ehdr, struct xdr *xdr, int bit64) +{ + ehdr->e_type = xdr->get16(input); + ehdr->e_machine = xdr->get16(input); + ehdr->e_version = xdr->get32(input); + if (bit64){ + ehdr->e_entry = xdr->get64(input); + ehdr->e_phoff = xdr->get64(input); + ehdr->e_shoff = xdr->get64(input); + } else { + ehdr->e_entry = xdr->get32(input); + ehdr->e_phoff = xdr->get32(input); + ehdr->e_shoff = xdr->get32(input); + } + ehdr->e_flags = xdr->get32(input); + ehdr->e_ehsize = xdr->get16(input); + ehdr->e_phentsize = xdr->get16(input); + ehdr->e_phnum = xdr->get16(input); + ehdr->e_shentsize = xdr->get16(input); + ehdr->e_shnum = xdr->get16(input); + ehdr->e_shstrndx = xdr->get16(input); +} + +void +elf_phdr(struct buffer *pinput, Elf64_Phdr *phdr, int entsize, struct xdr *xdr, int bit64) { - return swab32(x); + /* + * The entsize need not be sizeof(*phdr). + * Hence, it is easier to keep a copy of the input, + * as the xdr functions may not advance the input + * pointer the full entsize; rather than get tricky + * we just advance it below. + */ + struct buffer input = *pinput; + if (bit64){ + phdr->p_type = xdr->get32(&input); + phdr->p_flags = xdr->get32(&input); + phdr->p_offset = xdr->get64(&input); + phdr->p_vaddr = xdr->get64(&input); + phdr->p_paddr = xdr->get64(&input); + phdr->p_filesz = xdr->get64(&input); + phdr->p_memsz = xdr->get64(&input); + phdr->p_align = xdr->get64(&input); + } else { + phdr->p_type = xdr->get32(&input); + phdr->p_offset = xdr->get32(&input); + phdr->p_vaddr = xdr->get32(&input); + phdr->p_paddr = xdr->get32(&input); + phdr->p_filesz = xdr->get32(&input); + phdr->p_memsz = xdr->get32(&input); + phdr->p_flags = xdr->get32(&input); + phdr->p_align = xdr->get32(&input); + } + pinput->size -= entsize; + pinput->data += entsize; } -unsigned int (*elf32_to_native) (unsigned int) = idemp; +/* Get the headers from the buffer. + * Return -1 in the event of an error. + */ +int elf_headers(const struct buffer *pinput, Elf64_Ehdr *ehdr, Elf64_Phdr **pphdr) +{ + int i; + struct xdr *xdr = &xdr_le; + int bit64 = 0; + struct buffer input = *(struct buffer *)pinput; + struct buffer phdr_buf; + Elf64_Phdr *phdr; -/* returns size of result, or -1 if error */ + if (!iself((unsigned char *)pinput->data)) { + ERROR("The stage file is not in ELF format!\n"); + return -1; + } + + elf_eident(&input, ehdr); + bit64 = ehdr->e_ident[EI_CLASS] == ELFCLASS64; + /* Assume LE unless we are sure otherwise. + * We're not going to take on the task of + * fully validating the ELF file. That way + * lies madness. + */ + if (ehdr->e_ident[EI_DATA] == ELFDATA2MSB) + xdr = &xdr_be; + + elf_ehdr(&input, ehdr, xdr, bit64); + + /* cons up an input buffer for the headers. + * Note that the program headers can be anywhere, + * per the ELF spec, You'd be surprised how many ELF + * readers miss this little detail. + */ + phdr_buf.data = &pinput->data[ehdr->e_phoff]; + phdr_buf.size = ehdr->e_phentsize * ehdr->e_phnum; + if (phdr_buf.size > (pinput->size - ehdr->e_phoff)){ + ERROR("The file is not large enough for the program headers." + "%ld bytes left, %ld bytes of headers\n", + pinput->size - ehdr->e_phoff, phdr_buf.size); + return -1; + } + /* gather up all the phdrs. + * We do them all at once because there is more + * than one loop over all the phdrs. + */ + phdr = calloc(sizeof(*phdr), ehdr->e_phnum); + for (i = 0; i < ehdr->e_phnum; i++) + elf_phdr(&phdr_buf, &phdr[i], ehdr->e_phentsize, xdr, bit64); + *pphdr = phdr; + return 0; +} +/* returns size of result, or -1 if error. + * Note that, with the new code, this function + * works for all elf files, not just the restricted set. + */ int parse_elf_to_stage(const struct buffer *input, struct buffer *output, comp_algo algo, uint32_t *location) { - Elf32_Phdr *phdr; - Elf32_Ehdr *ehdr = (Elf32_Ehdr *)input->data; - char *header, *buffer; + Elf64_Phdr *phdr; + Elf64_Ehdr ehdr; + char *buffer; int headers; int i; struct cbfs_stage *stage; - unsigned int data_start, data_end, mem_end; - - int elf_bigendian = 0; + uint32_t data_start, data_end, mem_end; comp_func_ptr compress = compression_function(algo); if (!compress) return -1; DEBUG("start: parse_elf_to_stage(location=0x%x)\n", *location); - if (!iself((unsigned char *)input->data)) { - ERROR("The stage file is not in ELF format!\n"); - return -1; - } - // The tool may work in architecture-independent way. - if (arch != CBFS_ARCHITECTURE_UNKNOWN && - !((ehdr->e_machine == EM_ARM) && (arch == CBFS_ARCHITECTURE_ARMV7)) && - !((ehdr->e_machine == EM_386) && (arch == CBFS_ARCHITECTURE_X86))) { - ERROR("The stage file has the wrong architecture\n"); + if (elf_headers(input, &ehdr, &phdr) < 0) return -1; - } - - if (ehdr->e_ident[EI_DATA] == ELFDATA2MSB) { - elf_bigendian = 1; - } - if (elf_bigendian != is_big_endian()) { - elf32_to_native = swap32; - } - - headers = ehdr->e_phnum; - header = (char *)ehdr; - phdr = (Elf32_Phdr *) & header[elf32_to_native(ehdr->e_phoff)]; + headers = ehdr.e_phnum; - /* Now, regular headers - we only care about PT_LOAD headers, - * because thats what we're actually going to load - */ - - data_start = 0xFFFFFFFF; + data_start = ~0; data_end = 0; mem_end = 0; for (i = 0; i < headers; i++) { unsigned int start, mend, rend; - if (elf32_to_native(phdr[i].p_type) != PT_LOAD) + if (phdr[i].p_type != PT_LOAD) continue; /* Empty segments are never interesting */ - if (elf32_to_native(phdr[i].p_memsz) == 0) + if (phdr[i].p_memsz == 0) continue; /* BSS */ - start = elf32_to_native(phdr[i].p_paddr); + start = phdr[i].p_paddr; - mend = start + elf32_to_native(phdr[i].p_memsz); - rend = start + elf32_to_native(phdr[i].p_filesz); + mend = start + phdr[i].p_memsz; + rend = start + phdr[i].p_filesz; if (start < data_start) data_start = start; @@ -128,8 +308,9 @@ int parse_elf_to_stage(const struct buffer *input, struct buffer *output, } if (data_end <= data_start) { - ERROR("data ends before it starts. Make sure the " - "ELF file is correct and resides in ROM space.\n"); + ERROR("data ends (%08lx) before it starts(%08lx). Make sure the " + "ELF file is correct and resides in ROM space.\n", + (unsigned long)data_end, (unsigned long)data_start); exit(1); } @@ -146,21 +327,21 @@ int parse_elf_to_stage(const struct buffer *input, struct buffer *output, for (i = 0; i < headers; i++) { unsigned int l_start, l_offset = 0; - if (elf32_to_native(phdr[i].p_type) != PT_LOAD) + if (phdr[i].p_type != PT_LOAD) continue; - if (elf32_to_native(phdr[i].p_memsz) == 0) + if (phdr[i].p_memsz == 0) continue; - l_start = elf32_to_native(phdr[i].p_paddr); + l_start = phdr[i].p_paddr; if (l_start < *location) { l_offset = *location - l_start; l_start = *location; } memcpy(buffer + (l_start - data_start), - &header[elf32_to_native(phdr[i].p_offset)+l_offset], - elf32_to_native(phdr[i].p_filesz)-l_offset); + &input->data[phdr[i].p_offset + l_offset], + phdr[i].p_filesz - l_offset); } /* Now make the output buffer */ @@ -172,12 +353,16 @@ int parse_elf_to_stage(const struct buffer *input, struct buffer *output, } memset(output->data, 0, output->size); + /* N.B. The original plan was that SELF data was B.E. + * but: this is all L.E. + * Maybe we should just change the spec. + */ stage = (struct cbfs_stage *)output->data; stage->load = data_start; /* FIXME: htonll */ stage->memlen = mem_end - data_start; stage->compression = algo; - stage->entry = ehdr->e_entry; /* FIXME: htonll */ + stage->entry = ehdr.e_entry; compress(buffer, data_end - data_start, (output->data + sizeof(*stage)), (int *)&stage->len); diff --git a/util/cbfstool/common.h b/util/cbfstool/common.h index 6e12fcb..c68f0ff 100644 --- a/util/cbfstool/common.h +++ b/util/cbfstool/common.h @@ -131,6 +131,17 @@ uint32_t cbfs_find_location(const char *romfile, uint32_t filesize, void print_supported_filetypes(void); +/* xdr.c */ +struct xdr { + uint16_t (*get16)(struct buffer *input); + uint32_t (*get32)(struct buffer *input); + uint64_t (*get64)(struct buffer *input); + void (*put16)(struct buffer *input, uint16_t val); + void (*put32)(struct buffer *input, uint32_t val); + void (*put64)(struct buffer *input, uint64_t val); +}; + +extern struct xdr xdr_le, xdr_be; #define ARRAY_SIZE(a) (int)(sizeof(a) / sizeof((a)[0])) #endif diff --git a/util/cbfstool/xdr.c b/util/cbfstool/xdr.c new file mode 100644 index 0000000..1659b46 --- /dev/null +++ b/util/cbfstool/xdr.c @@ -0,0 +1,141 @@ + /* + * cbfstool, CLI utility for CBFS file manipulation + * + * Copyright 2013 Google Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA, 02110-1301 USA + */ + +#include <stdio.h> +#include <stdlib.h> +#include <string.h> +#include <ctype.h> +#include <unistd.h> +#include <stdint.h> +#include "common.h" + +/* The assumption in all this code is that we're given a pointer to enough data. + * Hence, we do not check for underflow. + */ +uint8_t get8(struct buffer *input) +{ + uint8_t ret = *input->data++; + input->size--; + return ret; +} + +uint16_t get16be(struct buffer *input) +{ + uint16_t ret; + ret = get8(input)<<8; + ret |= get8(input); + return ret; +} + +uint32_t get32be(struct buffer *input) +{ + uint32_t ret; + ret = get16be(input)<<16; + ret |= get16be(input); + return ret; +} + +uint64_t get64be(struct buffer *input) +{ + uint64_t ret; + ret = get32be(input); + ret <<= 32; + ret |= get32be(input); + return ret; +} + +void put8(struct buffer *input, uint8_t val) +{ + input->data[input->size] = val; + input->size++; +} + +void put16be(struct buffer *input, uint16_t val) +{ + put8(input, val>>8); + put8(input, val); +} + +void put32be(struct buffer *input, uint32_t val) +{ + put16be(input, val>>16); + put16be(input, val); +} + +void put64be(struct buffer *input, uint64_t val) +{ + put32be(input, val>>32); + put32be(input, val); +} + +uint16_t get16le(struct buffer *input) +{ + uint16_t ret; + ret = get8(input); + ret |= get8(input) << 8; + return ret; +} + +uint32_t get32le(struct buffer *input) +{ + uint32_t ret; + ret = get16le(input); + ret |= get16le(input) << 16; + return ret; +} + +uint64_t get64le(struct buffer *input) +{ + uint64_t ret; + uint32_t low; + low = get32le(input); + ret = get32le(input); + ret <<= 32; + ret |= low; + return ret; +} + +void put16le(struct buffer *input, uint16_t val) +{ + put8(input, val); + put8(input, val>>8); +} + +void put32le(struct buffer *input, uint32_t val) +{ + put16le(input, val); + put16le(input, val>>16); +} + +void put64le(struct buffer *input, uint64_t val) +{ + put32le(input, val); + put32le(input, val>>32); +} + +struct xdr xdr_be = { + get16le, get32le, get64le, + put16be, put32be, put64be +}; + +struct xdr xdr_le = { + get16le, get32le, get64le, + put16le, put32le, put64le +}; +

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Patch set updated for coreboot: 7c81cf3 lynxpoint: Build intermediate step to add LynxPoint ME image
by Stefan Reinauer 02 Dec '13

02 Dec '13

Stefan Reinauer (stefan.reinauer(a)coreboot.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/4132 -gerrit commit 7c81cf34e73d56dcd62d059ccf82c884bb982db5 Author: Duncan Laurie <dlaurie(a)chromium.org> Date: Fri Apr 19 11:03:40 2013 -0700 lynxpoint: Build intermediate step to add LynxPoint ME image This is needed to successfully build fox_wtm2 from external repo. Change-Id: Iaa4e9983faa1d86c2b29d8fd4f577be035497e38 Signed-off-by: Duncan Laurie <dlaurie(a)chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/48676 Reviewed-by: Aaron Durbin <adurbin(a)chromium.org> --- src/southbridge/intel/lynxpoint/Makefile.inc | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/src/southbridge/intel/lynxpoint/Makefile.inc b/src/southbridge/intel/lynxpoint/Makefile.inc index 4d96edf..536bf85 100644 --- a/src/southbridge/intel/lynxpoint/Makefile.inc +++ b/src/southbridge/intel/lynxpoint/Makefile.inc @@ -20,8 +20,7 @@ # Run an intermediate step when producing coreboot.rom # that adds additional components to the final firmware # image outside of CBFS -# FIXME, uncomment as soon as we have ME firmware in the blobs repo -# INTERMEDIATE:=lynxpoint_add_me +INTERMEDIATE:=lynxpoint_add_me ramstage-y += pch.c ramstage-y += azalia.c

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Patch merged into coreboot/master: 9a8e3eb elog: Get rid of the descriptor type and some unnecessary wrappers
by gerrit＠coreboot.org 02 Dec '13

02 Dec '13

the following patch was just integrated into master: commit 9a8e3eb5d6e4e777b658f3b97bcb41794fe6f42a Author: Gabe Black <gabeblack(a)google.com> Date: Fri Apr 26 03:34:00 2013 -0700 elog: Get rid of the descriptor type and some unnecessary wrappers There was always exactly one elog descriptor declared and initialized, but its contents were being accessed through a pointer that was passed back and forth between functions instead of being accessed directly. This made the code more verbose than it needed to be and harder to follow. To address this the descriptor type was eliminated, its contents were turned into individual global variables, and various functions were adjusted to no longer take the descriptor as an argument. Similarly, the code was more verbose and complicated than it needed to be because of several wrapper functions which wrapped a single line of code which called an underlying function with particular arguments and were only used once. This makes it harder to tell what the code is doing because the call to the real function you may already be familiar with is obscured behind a new function you've never seen before. It also adds one more text to the file as a whole while providing at best a marginal benefit. Those functions were removed and their callers now call their contents directly. Built and booted on Link. Ran mosys eventlog list. Cleared the event log and ran mosys eventlog list again. Added 2000 events and ran mosys eventlog list. Cleared the log again and ran mosys eventlog list. Change-Id: I4f5f6b9f4f508548077b7f5a92f4322db99e01ca Signed-off-by: Gabe Black <gabeblack(a)google.com> Reviewed-on: https://gerrit.chromium.org/gerrit/49310 Reviewed-by: Duncan Laurie <dlaurie(a)chromium.org> Commit-Queue: Gabe Black <gabeblack(a)chromium.org> Tested-by: Gabe Black <gabeblack(a)chromium.org> See http://review.coreboot.org/4245 for details. -gerrit

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Patch merged into coreboot/master: 190f8d1 elog: Stream line the elog driver.
by gerrit＠coreboot.org 02 Dec '13

02 Dec '13

the following patch was just integrated into master: commit 190f8d18aecad9e51e68b1fa2dbbeb3b20f417e6 Author: Gabe Black <gabeblack(a)google.com> Date: Wed Apr 24 23:31:41 2013 -0700 elog: Stream line the elog driver. The elog driver's design was a bit more elaborate than it really needed to be since it no longer had to keep track of multiple copies of the log in flash and also in memory. This change streamlines it by removing unnecessary compartmentalization of some bits of code, and some variables which tracked the last entry added which were never used. Built and booted on Link. Ran mosys eventlog list. Added 2000 events to the event log and ran mosys eventlog list again. Cleared the log by echoing 1 into /sys/firmware/gsmi/clear_eventlog and ran mosys eventlog list. Change-Id: I7d4cdebf2f5b1f6bb1fc70e65eca18f71b124b18 Signed-off-by: Gabe Black <gabeblack(a)google.com> Reviewed-on: https://gerrit.chromium.org/gerrit/49309 Reviewed-by: Duncan Laurie <dlaurie(a)chromium.org> Commit-Queue: Gabe Black <gabeblack(a)chromium.org> Tested-by: Gabe Black <gabeblack(a)chromium.org> See http://review.coreboot.org/4244 for details. -gerrit

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Patch merged into coreboot/master: 53721bd elog: Merge elog_validate_and_fill into elog_init_descriptor.
by gerrit＠coreboot.org 02 Dec '13

02 Dec '13

the following patch was just integrated into master: commit 53721bdcc41c6b027a858efabe0c4cec34fe6920 Author: Gabe Black <gabeblack(a)google.com> Date: Wed Apr 24 17:54:37 2013 -0700 elog: Merge elog_validate_and_fill into elog_init_descriptor. elog_validate_and_fill was called in exactly one place, in elog_init_descriptor. It didn't actually do what its name implied since the data in the event log was already "filled" by elog_init_descriptor. Likewise elog_init_descriptor was delegating an important part of its own job, scanning through the list of events, to elog_validate_and_fill. Since one function was basically just a displaced part of the other which couldn't really stand on its own, this change merges them together. Built and booted on Link. Ran mosys eventlog list. Added 2000 events with the SMI handler and ran mosys eventlog list again. Change-Id: Ic899eeb18146d0f127d0dded207d37d63cbc716f Signed-off-by: Gabe Black <gabeblack(a)google.com> Reviewed-on: https://gerrit.chromium.org/gerrit/49308 Reviewed-by: Duncan Laurie <dlaurie(a)chromium.org> Commit-Queue: Gabe Black <gabeblack(a)chromium.org> Tested-by: Gabe Black <gabeblack(a)chromium.org> See http://review.coreboot.org/4243 for details. -gerrit

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coreboot-gerrit December 2013