coreboot-gerrit November 2013

coreboot-gerrit@coreboot.org

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Patch set updated for coreboot: 7a5551f Add a KEEP_BOOT_COUNT Kconfig option.
by Denis Carikli 11 Nov '13

11 Nov '13

Denis Carikli (GNUtoo(a)no-log.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/3990 -gerrit commit 7a5551f02022541afdba9cc919ef7d3a6d8cbbb9 Author: Denis 'GNUtoo' Carikli <GNUtoo(a)no-log.org> Date: Mon Oct 21 01:56:47 2013 +0200 Add a KEEP_BOOT_COUNT Kconfig option. The use case of that option is to inform coreboot (trough the nvram) at the next boot, that the computer could not fully boot to boot to an usable state. In that case, the boot count is incremented by one. Previously there was no way to tell coreboot that the computer really booted successfully, because it was assumed that if set_boot_successful was called in ramstage, then the computer would have booted successfully. However many things can go wrong after that point, for instance the payload could fail to boot, or the operating system's kernel could fail to boot too, due to the wrong configurations passed to it by coreboot and the payload. Change-Id: I01af053455eb6bd2f7a4f9d37e8c234ba8d55250 Signed-off-by: Denis 'GNUtoo' Carikli <GNUtoo(a)no-log.org> --- src/arch/x86/Kconfig | 8 ++++++++ src/arch/x86/boot/acpi.c | 12 ++++++++++++ 2 files changed, 20 insertions(+) diff --git a/src/arch/x86/Kconfig b/src/arch/x86/Kconfig index 52bafbd..e13ebbb 100644 --- a/src/arch/x86/Kconfig +++ b/src/arch/x86/Kconfig @@ -80,6 +80,14 @@ config MAX_REBOOT_CNT the nvram is reset, which will make it switch to fallback/ again during the next boot. +config KEEP_BOOT_COUNT + bool "Keep boot count" + default n + depends on PC80_SYSTEM && X86_BOOTBLOCK_NORMAL + help + If enabled, the boot count is not reset anymore in the ramstage. + This delegates that task to the software running after the ramstage. + config BOOTBLOCK_SOURCE string default "bootblock_simple.c" if X86_BOOTBLOCK_SIMPLE diff --git a/src/arch/x86/boot/acpi.c b/src/arch/x86/boot/acpi.c index 96cb270..2b1e764 100644 --- a/src/arch/x86/boot/acpi.c +++ b/src/arch/x86/boot/acpi.c @@ -33,6 +33,9 @@ #include <cbmem.h> #include <cpu/x86/lapic_def.h> #include <cpu/cpu.h> +#if CONFIG_KEEP_BOOT_COUNT +#include <fallback.h> +#endif #if CONFIG_COLLECT_TIMESTAMPS #include <timestamp.h> #endif @@ -638,6 +641,15 @@ void acpi_resume(void *wake_vec) if (mainboard_suspend_resume) mainboard_suspend_resume(); +#if CONFIG_KEEP_BOOT_COUNT + /* we don't want to resume with the wrong prefix next time. + * And doing it in the bootblock seems counterintuitive: + * the bootblock would then need to know it's resuming... + */ + if (strncmp(CONFIG_CBFS_PREFIX, "fallback", sizeof("fallback"))) + set_boot_successful(); +#endif + post_code(POST_OS_RESUME); acpi_jump_to_wakeup(wake_vec); }

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Patch set updated for coreboot: c791ebd cbfs: 64-bit cleanups
by Ronald G. Minnich 11 Nov '13

11 Nov '13

Ronald G. Minnich (rminnich(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/4037 -gerrit commit c791ebde9e410cb65d3c78d21f1a7191cd0cc33f Author: Ronald G. Minnich <rminnich(a)google.com> Date: Mon Nov 11 10:36:28 2013 -0800 cbfs: 64-bit cleanups cbfs used u32 in a number of cases where uintptr_t was correct. This change builds for both 64-bit and 32-bit boards. Also, add a function to convert a network byte order element of the struct to a void *. Change-Id: If42c722a8a9e8d565d3827f65ed6c2cb8e90ba60 Signed-off-by: Ronald G. Minnich <rminnich(a)google.com> --- src/lib/cbfs.c | 30 +++++++++++++++++++++--------- src/lib/cbmem.c | 2 +- src/lib/selfboot.c | 9 +++++---- 3 files changed, 27 insertions(+), 14 deletions(-) diff --git a/src/lib/cbfs.c b/src/lib/cbfs.c index 4ccc9e6..dc79dfd 100644 --- a/src/lib/cbfs.c +++ b/src/lib/cbfs.c @@ -254,13 +254,23 @@ void * cbfs_load_stage(struct cbfs_media *media, const char *name) #else +static void *cbfs_pointer(u64 value) +{ + void *v; +#if CONFIG_ARCH_AARCH64 == 1 + v = (void *)ntohll(value); +#else + v = (void *)ntohl(value); +#endif + return v; +} + void * cbfs_load_stage(struct cbfs_media *media, const char *name) { struct cbfs_stage *stage = (struct cbfs_stage *) cbfs_get_file_content(media, name, CBFS_TYPE_STAGE); - /* this is a mess. There is no ntohll. */ - /* for now, assume compatible byte order until we solve this. */ - uint32_t entry; + + void *load, *entry; uint32_t final_size; if (stage == NULL) @@ -271,22 +281,22 @@ void * cbfs_load_stage(struct cbfs_media *media, const char *name) (uint32_t) stage->load, stage->memlen, stage->entry); + load = cbfs_pointer(stage->load); final_size = cbfs_decompress(stage->compression, ((unsigned char *) stage) + sizeof(struct cbfs_stage), - (void *) (uint32_t) stage->load, + (void *) load, stage->len); if (!final_size) return (void *) -1; /* Stages rely the below clearing so that the bss is initialized. */ - memset((void *)((uintptr_t)stage->load + final_size), 0, + memset((void *)(load + final_size), 0, stage->memlen - final_size); DEBUG("stage loaded.\n"); - entry = stage->entry; - // entry = ntohll(stage->entry); + entry = cbfs_pointer(stage->entry); return (void *) entry; } @@ -294,6 +304,7 @@ void * cbfs_load_stage(struct cbfs_media *media, const char *name) int cbfs_execute_stage(struct cbfs_media *media, const char *name) { + void * entry; struct cbfs_stage *stage = (struct cbfs_stage *) cbfs_get_file_content(media, name, CBFS_TYPE_STAGE); @@ -307,8 +318,9 @@ int cbfs_execute_stage(struct cbfs_media *media, const char *name) } /* FIXME: This isn't right */ - LOG("run @ %p\n", (void *) ntohl((uint32_t) stage->entry)); - return run_address((void *)(uintptr_t)ntohll(stage->entry)); + entry = cbfs_pointer(stage->entry); + LOG("run @ %p\n", entry); + return run_address(entry); } #if !CONFIG_ALT_CBFS_LOAD_PAYLOAD diff --git a/src/lib/cbmem.c b/src/lib/cbmem.c index de49816..6449b55 100644 --- a/src/lib/cbmem.c +++ b/src/lib/cbmem.c @@ -200,7 +200,7 @@ void *cbmem_add(u32 id, u64 size) cbmem_toc[0].base += size; cbmem_toc[0].size -= size; - return (void *)(u32)cbmem_toc[i].base; + return (void *)(uintptr_t)cbmem_toc[i].base; } void *cbmem_find(u32 id) diff --git a/src/lib/selfboot.c b/src/lib/selfboot.c index f69ad14..222eae2 100644 --- a/src/lib/selfboot.c +++ b/src/lib/selfboot.c @@ -305,7 +305,7 @@ static int relocate_segment(unsigned long buffer, struct segment *seg) static int build_self_segment_list( struct segment *head, struct lb_memory *mem, - struct cbfs_payload *payload, u32 *entry) + struct cbfs_payload *payload, uintptr_t *entry) { struct segment *new; struct segment *ptr; @@ -332,8 +332,9 @@ static int build_self_segment_list( new->s_memsz = ntohl(segment->mem_len); new->compression = ntohl(segment->compression); - new->s_srcaddr = (u32) ((unsigned char *)first_segment) - + ntohl(segment->offset); + new->s_srcaddr = (uintptr_t) + ((unsigned char *)first_segment) + + ntohl(segment->offset); new->s_filesz = ntohl(segment->len); printk(BIOS_DEBUG, " New segment dstaddr 0x%lx memsize 0x%lx srcaddr 0x%lx filesize 0x%lx\n", new->s_dstaddr, new->s_memsz, new->s_srcaddr, new->s_filesz); @@ -504,7 +505,7 @@ static int load_self_segments( void *selfload(struct lb_memory *mem, struct cbfs_payload *payload) { - u32 entry=0; + uintptr_t entry = 0; struct segment head; /* Preprocess the self segments */

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Patch set updated for coreboot: 0c06458 cbfs: 64-bit cleanups
by Ronald G. Minnich 11 Nov '13

11 Nov '13

Ronald G. Minnich (rminnich(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/4037 -gerrit commit 0c064589abe36878de7619e7c9d5977f5e4f6789 Author: Ronald G. Minnich <rminnich(a)google.com> Date: Mon Nov 11 10:36:28 2013 -0800 cbfs: 64-bit cleanups cbfs used u32 in a number of cases where uintptr_t was correct. This change builds for both 64-bit and 32-bit boards. Change-Id: If42c722a8a9e8d565d3827f65ed6c2cb8e90ba60 Signed-off-by: Ronald G. Minnich <rminnich(a)google.com> --- src/lib/cbfs.c | 13 ++++++++----- src/lib/cbmem.c | 2 +- src/lib/selfboot.c | 9 +++++---- 3 files changed, 14 insertions(+), 10 deletions(-) diff --git a/src/lib/cbfs.c b/src/lib/cbfs.c index 4ccc9e6..7499387 100644 --- a/src/lib/cbfs.c +++ b/src/lib/cbfs.c @@ -260,7 +260,7 @@ void * cbfs_load_stage(struct cbfs_media *media, const char *name) cbfs_get_file_content(media, name, CBFS_TYPE_STAGE); /* this is a mess. There is no ntohll. */ /* for now, assume compatible byte order until we solve this. */ - uint32_t entry; + uintptr_t load, entry; uint32_t final_size; if (stage == NULL) @@ -271,16 +271,17 @@ void * cbfs_load_stage(struct cbfs_media *media, const char *name) (uint32_t) stage->load, stage->memlen, stage->entry); + load = stage->load; final_size = cbfs_decompress(stage->compression, ((unsigned char *) stage) + sizeof(struct cbfs_stage), - (void *) (uint32_t) stage->load, + (void *) load, stage->len); if (!final_size) return (void *) -1; /* Stages rely the below clearing so that the bss is initialized. */ - memset((void *)((uintptr_t)stage->load + final_size), 0, + memset((void *)(load + final_size), 0, stage->memlen - final_size); DEBUG("stage loaded.\n"); @@ -294,6 +295,7 @@ void * cbfs_load_stage(struct cbfs_media *media, const char *name) int cbfs_execute_stage(struct cbfs_media *media, const char *name) { + uintptr_t entry; struct cbfs_stage *stage = (struct cbfs_stage *) cbfs_get_file_content(media, name, CBFS_TYPE_STAGE); @@ -307,8 +309,9 @@ int cbfs_execute_stage(struct cbfs_media *media, const char *name) } /* FIXME: This isn't right */ - LOG("run @ %p\n", (void *) ntohl((uint32_t) stage->entry)); - return run_address((void *)(uintptr_t)ntohll(stage->entry)); + entry = ntohl(stage->entry); + LOG("run @ %p\n", (void *) entry); + return run_address((void *)entry); } #if !CONFIG_ALT_CBFS_LOAD_PAYLOAD diff --git a/src/lib/cbmem.c b/src/lib/cbmem.c index de49816..6449b55 100644 --- a/src/lib/cbmem.c +++ b/src/lib/cbmem.c @@ -200,7 +200,7 @@ void *cbmem_add(u32 id, u64 size) cbmem_toc[0].base += size; cbmem_toc[0].size -= size; - return (void *)(u32)cbmem_toc[i].base; + return (void *)(uintptr_t)cbmem_toc[i].base; } void *cbmem_find(u32 id) diff --git a/src/lib/selfboot.c b/src/lib/selfboot.c index f69ad14..222eae2 100644 --- a/src/lib/selfboot.c +++ b/src/lib/selfboot.c @@ -305,7 +305,7 @@ static int relocate_segment(unsigned long buffer, struct segment *seg) static int build_self_segment_list( struct segment *head, struct lb_memory *mem, - struct cbfs_payload *payload, u32 *entry) + struct cbfs_payload *payload, uintptr_t *entry) { struct segment *new; struct segment *ptr; @@ -332,8 +332,9 @@ static int build_self_segment_list( new->s_memsz = ntohl(segment->mem_len); new->compression = ntohl(segment->compression); - new->s_srcaddr = (u32) ((unsigned char *)first_segment) - + ntohl(segment->offset); + new->s_srcaddr = (uintptr_t) + ((unsigned char *)first_segment) + + ntohl(segment->offset); new->s_filesz = ntohl(segment->len); printk(BIOS_DEBUG, " New segment dstaddr 0x%lx memsize 0x%lx srcaddr 0x%lx filesize 0x%lx\n", new->s_dstaddr, new->s_memsz, new->s_srcaddr, new->s_filesz); @@ -504,7 +505,7 @@ static int load_self_segments( void *selfload(struct lb_memory *mem, struct cbfs_payload *payload) { - u32 entry=0; + uintptr_t entry = 0; struct segment head; /* Preprocess the self segments */

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New patch to review for coreboot: 9381541 cbfs: 64-bit cleanups
by Ronald G. Minnich 11 Nov '13

11 Nov '13

Ronald G. Minnich (rminnich(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/4037 -gerrit commit 9381541d8af5ddc504f329609b06a8b8f097cec5 Author: Ronald G. Minnich <rminnich(a)google.com> Date: Mon Nov 11 10:36:28 2013 -0800 cbfs: 64-bit cleanups cbfs used u32 in a number of cases where uintptr_t was correct. This change builds for both 64-bit and 32-bit boards. Change-Id: If42c722a8a9e8d565d3827f65ed6c2cb8e90ba60 Signed-off-by: Ronald G. Minnich <rminnich(a)google.com> --- src/lib/cbfs.c | 13 ++++++++----- src/lib/cbmem.c | 2 +- src/lib/selfboot.c | 9 +++++---- 3 files changed, 14 insertions(+), 10 deletions(-) diff --git a/src/lib/cbfs.c b/src/lib/cbfs.c index 4ccc9e6..7499387 100644 --- a/src/lib/cbfs.c +++ b/src/lib/cbfs.c @@ -260,7 +260,7 @@ void * cbfs_load_stage(struct cbfs_media *media, const char *name) cbfs_get_file_content(media, name, CBFS_TYPE_STAGE); /* this is a mess. There is no ntohll. */ /* for now, assume compatible byte order until we solve this. */ - uint32_t entry; + uintptr_t load, entry; uint32_t final_size; if (stage == NULL) @@ -271,16 +271,17 @@ void * cbfs_load_stage(struct cbfs_media *media, const char *name) (uint32_t) stage->load, stage->memlen, stage->entry); + load = stage->load; final_size = cbfs_decompress(stage->compression, ((unsigned char *) stage) + sizeof(struct cbfs_stage), - (void *) (uint32_t) stage->load, + (void *) load, stage->len); if (!final_size) return (void *) -1; /* Stages rely the below clearing so that the bss is initialized. */ - memset((void *)((uintptr_t)stage->load + final_size), 0, + memset((void *)(load + final_size), 0, stage->memlen - final_size); DEBUG("stage loaded.\n"); @@ -294,6 +295,7 @@ void * cbfs_load_stage(struct cbfs_media *media, const char *name) int cbfs_execute_stage(struct cbfs_media *media, const char *name) { + uintptr_t entry; struct cbfs_stage *stage = (struct cbfs_stage *) cbfs_get_file_content(media, name, CBFS_TYPE_STAGE); @@ -307,8 +309,9 @@ int cbfs_execute_stage(struct cbfs_media *media, const char *name) } /* FIXME: This isn't right */ - LOG("run @ %p\n", (void *) ntohl((uint32_t) stage->entry)); - return run_address((void *)(uintptr_t)ntohll(stage->entry)); + entry = ntohl(stage->entry); + LOG("run @ %p\n", (void *) entry); + return run_address((void *)entry); } #if !CONFIG_ALT_CBFS_LOAD_PAYLOAD diff --git a/src/lib/cbmem.c b/src/lib/cbmem.c index de49816..6449b55 100644 --- a/src/lib/cbmem.c +++ b/src/lib/cbmem.c @@ -200,7 +200,7 @@ void *cbmem_add(u32 id, u64 size) cbmem_toc[0].base += size; cbmem_toc[0].size -= size; - return (void *)(u32)cbmem_toc[i].base; + return (void *)(uintptr_t)cbmem_toc[i].base; } void *cbmem_find(u32 id) diff --git a/src/lib/selfboot.c b/src/lib/selfboot.c index f69ad14..33a4544 100644 --- a/src/lib/selfboot.c +++ b/src/lib/selfboot.c @@ -305,7 +305,7 @@ static int relocate_segment(unsigned long buffer, struct segment *seg) static int build_self_segment_list( struct segment *head, struct lb_memory *mem, - struct cbfs_payload *payload, u32 *entry) + struct cbfs_payload *payload, uintptr_t *entry) { struct segment *new; struct segment *ptr; @@ -332,8 +332,9 @@ static int build_self_segment_list( new->s_memsz = ntohl(segment->mem_len); new->compression = ntohl(segment->compression); - new->s_srcaddr = (u32) ((unsigned char *)first_segment) - + ntohl(segment->offset); + new->s_srcaddr = (uintptr_t) + ((unsigned char *)first_segment) + + ntohl(segment->offset); new->s_filesz = ntohl(segment->len); printk(BIOS_DEBUG, " New segment dstaddr 0x%lx memsize 0x%lx srcaddr 0x%lx filesize 0x%lx\n", new->s_dstaddr, new->s_memsz, new->s_srcaddr, new->s_filesz); @@ -504,7 +505,7 @@ static int load_self_segments( void *selfload(struct lb_memory *mem, struct cbfs_payload *payload) { - u32 entry=0; + uintptr_t entry=0; struct segment head; /* Preprocess the self segments */

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Patch merged into coreboot/master: baa7820 qemu: load e820 from fw_cfg
by gerrit＠coreboot.org 11 Nov '13

11 Nov '13

the following patch was just integrated into master: commit baa782020e9d2d0ce7b6fd1c7c43411c9aa2b900 Author: Gerd Hoffmann <kraxel(a)redhat.com> Date: Wed Nov 6 14:36:17 2013 +0100 qemu: load e820 from fw_cfg qemu 1.7+ provides a fw_cfg file named "etc/e820" with e820-like entries for reservations and ram regions. Use it for ram detection if present, otherwise fallback to the traditional cmos method. Change-Id: Icac6c99d2a053e59dfdd28e48d1ceb3d56a61bdc Signed-off-by: Gerd Hoffmann <kraxel(a)redhat.com> Reviewed-on: http://review.coreboot.org/4030 Tested-by: build bot (Jenkins) See http://review.coreboot.org/4030 for details. -gerrit

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Patch set updated for coreboot: 8792dc1 qemu: load e820 from fw_cfg
by Gerd Hoffmann 11 Nov '13

11 Nov '13

Gerd Hoffmann (kraxel(a)redhat.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/4030 -gerrit commit 8792dc1837bd9b86eff0c0ce5ff46dfccf14cb4f Author: Gerd Hoffmann <kraxel(a)redhat.com> Date: Wed Nov 6 14:36:17 2013 +0100 qemu: load e820 from fw_cfg qemu 1.7+ provides a fw_cfg file named "etc/e820" with e820-like entries for reservations and ram regions. Use it for ram detection if present, otherwise fallback to the traditional cmos method. Change-Id: Icac6c99d2a053e59dfdd28e48d1ceb3d56a61bdc Signed-off-by: Gerd Hoffmann <kraxel(a)redhat.com> --- src/mainboard/emulation/qemu-i440fx/fw_cfg_if.h | 6 +++ src/mainboard/emulation/qemu-i440fx/northbridge.c | 65 +++++++++++++++++++---- 2 files changed, 60 insertions(+), 11 deletions(-) diff --git a/src/mainboard/emulation/qemu-i440fx/fw_cfg_if.h b/src/mainboard/emulation/qemu-i440fx/fw_cfg_if.h index d159f12..80e6280 100644 --- a/src/mainboard/emulation/qemu-i440fx/fw_cfg_if.h +++ b/src/mainboard/emulation/qemu-i440fx/fw_cfg_if.h @@ -51,3 +51,9 @@ typedef struct FWCfgFiles { uint32_t count; FWCfgFile f[]; } FWCfgFiles; + +typedef struct FwCfgE820Entry { + uint64_t address; + uint64_t length; + uint32_t type; +} FwCfgE820Entry __attribute((__aligned__(4))); diff --git a/src/mainboard/emulation/qemu-i440fx/northbridge.c b/src/mainboard/emulation/qemu-i440fx/northbridge.c index c878689..0f8c0c2 100644 --- a/src/mainboard/emulation/qemu-i440fx/northbridge.c +++ b/src/mainboard/emulation/qemu-i440fx/northbridge.c @@ -13,6 +13,7 @@ #include <cbmem.h> #include "fw_cfg.h" +#include "fw_cfg_if.h" #include "memory.c" @@ -58,20 +59,62 @@ static void cpu_pci_domain_read_resources(struct device *dev) struct resource *res; unsigned long tomk = 0, high; int idx = 10; + int size; pci_domain_read_resources(dev); - tomk = qemu_get_memory_size(); - high = qemu_get_high_memory_size(); - printk(BIOS_DEBUG, "Detected %lu MiB RAM below 4G.\n", tomk / 1024); - printk(BIOS_DEBUG, "Detected %lu MiB RAM above 4G.\n", high / 1024); - - /* Report the memory regions. */ - idx = 10; - ram_resource(dev, idx++, 0, 640); - ram_resource(dev, idx++, 768, tomk - 768); - if (high) - ram_resource(dev, idx++, 4 * 1024 * 1024, high); + size = fw_cfg_check_file("etc/e820"); + if (size > 0) { + /* supported by qemu 1.7+ */ + FwCfgE820Entry *list = malloc(size); + int i; + fw_cfg_load_file("etc/e820", list); + for (i = 0; i < size/sizeof(*list); i++) { + switch (list[i].type) { + case 1: /* ram */ + printk(BIOS_DEBUG, "QEMU: e820/ram: 0x%08llx +0x%08llx\n", + list[i].address, list[i].length); + if (list[i].address == 0) { + tomk = list[i].length / 1024; + ram_resource(dev, idx++, 0, 640); + ram_resource(dev, idx++, 768, tomk - 768); + } else { + ram_resource(dev, idx++, + list[i].address / 1024, + list[i].length / 1024); + } + break; + case 2: /* reserved */ + printk(BIOS_DEBUG, "QEMU: e820/res: 0x%08llx +0x%08llx\n", + list[i].address, list[i].length); + res = new_resource(dev, idx++); + res->base = list[i].address; + res->size = list[i].length; + res->limit = 0xffffffff; + res->flags = IORESOURCE_MEM | IORESOURCE_FIXED | + IORESOURCE_STORED | IORESOURCE_ASSIGNED; + break; + default: + /* skip unknown */ + break; + } + } + free(list); + } + + if (!tomk) { + /* qemu older than 1.7, or reading etc/e820 failed. Fallback to cmos. */ + tomk = qemu_get_memory_size(); + high = qemu_get_high_memory_size(); + printk(BIOS_DEBUG, "QEMU: cmos: %lu MiB RAM below 4G.\n", tomk / 1024); + printk(BIOS_DEBUG, "QEMU: cmos: %lu MiB RAM above 4G.\n", high / 1024); + + /* Report the memory regions. */ + ram_resource(dev, idx++, 0, 640); + ram_resource(dev, idx++, 768, tomk - 768); + if (high) + ram_resource(dev, idx++, 4 * 1024 * 1024, high); + } /* Reserve I/O ports used by QEMU */ qemu_reserve_ports(dev, idx++, 0x0510, 0x02, "firmware-config");

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Patch merged into coreboot/master: 289b45f qemu: add fw_cfg files support
by gerrit＠coreboot.org 11 Nov '13

11 Nov '13

the following patch was just integrated into master: commit 289b45fdffa42db85fa4ad63338677ab8f15e9a2 Author: Gerd Hoffmann <kraxel(a)redhat.com> Date: Wed Jun 12 10:18:58 2013 +0200 qemu: add fw_cfg files support Qemu can provide files using the firmware config interface. This is used to pass config options, virtual machine config info and option roms into the guest. This patch adds support for reading the file index and loading files from qemu. Change-Id: I57d4a734527c4117239f355121cf1fb8a390ab0d Signed-off-by: Gerd Hoffmann <kraxel(a)redhat.com> Reviewed-on: http://review.coreboot.org/4029 Tested-by: build bot (Jenkins) See http://review.coreboot.org/4029 for details. -gerrit

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Patch set updated for coreboot: 2e6dc90 qemu: add fw_cfg files support
by Gerd Hoffmann 11 Nov '13

11 Nov '13

Gerd Hoffmann (kraxel(a)redhat.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/4029 -gerrit commit 2e6dc90e4c25f38038c0495185bdb0acabc41e47 Author: Gerd Hoffmann <kraxel(a)redhat.com> Date: Wed Jun 12 10:18:58 2013 +0200 qemu: add fw_cfg files support Qemu can provide files using the firmware config interface. This is used to pass config options, virtual machine config info and option roms into the guest. This patch adds support for reading the file index and loading files from qemu. Change-Id: I57d4a734527c4117239f355121cf1fb8a390ab0d Signed-off-by: Gerd Hoffmann <kraxel(a)redhat.com> --- src/mainboard/emulation/qemu-i440fx/fw_cfg.c | 59 ++++++++++++++++++++++++++++ src/mainboard/emulation/qemu-i440fx/fw_cfg.h | 2 + 2 files changed, 61 insertions(+) diff --git a/src/mainboard/emulation/qemu-i440fx/fw_cfg.c b/src/mainboard/emulation/qemu-i440fx/fw_cfg.c index 5166f83..b85a163 100644 --- a/src/mainboard/emulation/qemu-i440fx/fw_cfg.c +++ b/src/mainboard/emulation/qemu-i440fx/fw_cfg.c @@ -16,6 +16,7 @@ */ #include <string.h> +#include <swab.h> #include <console/console.h> #include <arch/io.h> @@ -26,6 +27,7 @@ #define FW_CFG_PORT_DATA 0x0511 static unsigned char fw_cfg_detected = 0xff; +static FWCfgFiles *fw_files; static int fw_cfg_present(void) { @@ -47,6 +49,63 @@ void fw_cfg_get(int entry, void *dst, int dstlen) insb(FW_CFG_PORT_DATA, dst, dstlen); } +static void fw_cfg_init_file(void) +{ + u32 i, size, count = 0; + + if (fw_files != NULL) + return; + + fw_cfg_get(FW_CFG_FILE_DIR, &count, sizeof(count)); + count = swab32(count); + size = count * sizeof(FWCfgFile) + sizeof(count); + printk(BIOS_DEBUG, "QEMU: %d files in fw_cfg\n", count); + fw_files = malloc(size); + fw_cfg_get(FW_CFG_FILE_DIR, fw_files, size); + fw_files->count = swab32(fw_files->count); + for (i = 0; i < count; i++) { + fw_files->f[i].size = swab32(fw_files->f[i].size); + fw_files->f[i].select = swab16(fw_files->f[i].select); + printk(BIOS_DEBUG, "QEMU: %s [size=%d]\n", + fw_files->f[i].name, fw_files->f[i].size); + } +} + +static FWCfgFile *fw_cfg_find_file(const char *name) +{ + int i; + + fw_cfg_init_file(); + for (i = 0; i < fw_files->count; i++) + if (strcmp(fw_files->f[i].name, name) == 0) + return fw_files->f + i; + return NULL; +} + +int fw_cfg_check_file(const char *name) +{ + FWCfgFile *file; + + if (!fw_cfg_present()) + return -1; + file = fw_cfg_find_file(name); + if (!file) + return -1; + return file->size; +} + +void fw_cfg_load_file(const char *name, void *dst) +{ + FWCfgFile *file; + + if (!fw_cfg_present()) + return; + file = fw_cfg_find_file(name); + if (!file) + return; + fw_cfg_get(file->select, dst, file->size); +} + int fw_cfg_max_cpus(void) { unsigned short max_cpus; diff --git a/src/mainboard/emulation/qemu-i440fx/fw_cfg.h b/src/mainboard/emulation/qemu-i440fx/fw_cfg.h index 063e48f..2a10d8b 100644 --- a/src/mainboard/emulation/qemu-i440fx/fw_cfg.h +++ b/src/mainboard/emulation/qemu-i440fx/fw_cfg.h @@ -16,4 +16,6 @@ */ void fw_cfg_get(int entry, void *dst, int dstlen); +int fw_cfg_check_file(const char *name); +void fw_cfg_load_file(const char *name, void *dst); int fw_cfg_max_cpus(void);

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Patch set updated for coreboot: 3860976 cpu/amd/model_fxx/powernow_acpi.c: Remove set but unused variable `Start_vid`
by Paul Menzel 11 Nov '13

11 Nov '13

Paul Menzel (paulepanter(a)users.sourceforge.net) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/4036 -gerrit commit 3860976e7857ce81e59c856cadda9fa2c202214e Author: Paul Menzel <paulepanter(a)users.sourceforge.net> Date: Tue Oct 29 20:41:50 2013 +0100 cpu/amd/model_fxx/powernow_acpi.c: Remove set but unused variable `Start_vid` Removing `-Wno-unused-but-set-variable` from `CFLAGS` the build for the ASRock 939A785GMH fails with the following error. CC cpu/amd/model_fxx/powernow_acpi.ramstage.o src/cpu/amd/model_fxx/powernow_acpi.c: In function 'pstates_algorithm': src/cpu/amd/model_fxx/powernow_acpi.c:761:25: error: variable 'Start_vid' set but not used [-Werror=unused-but-set-variable] cc1: all warnings being treated as errors When adding support for PSS object generation for AMD pre Family Fh CPUs (199c694f) the function `pstates_algorithm` was copied and adapted, but `Start_vid` is not needed anymore as a static table is used. So remove the variable `Start_vid`. Change-Id: I3002951d168cade6461941c16d78373c47792e13 Signed-off-by: Paul Menzel <paulepanter(a)users.sourceforge.net> --- src/cpu/amd/model_fxx/powernow_acpi.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/src/cpu/amd/model_fxx/powernow_acpi.c b/src/cpu/amd/model_fxx/powernow_acpi.c index af1e24b..eca736c 100644 --- a/src/cpu/amd/model_fxx/powernow_acpi.c +++ b/src/cpu/amd/model_fxx/powernow_acpi.c @@ -758,7 +758,7 @@ static int pstates_algorithm(u32 pcontrol_blk, u8 plen, u8 onlyBSP) u16 Pstate_feq[MAXP+1]; u8 Pstate_vid[MAXP+1]; u32 Pstate_power[MAXP+1]; - u8 Max_fid, Start_fid, Start_vid, Max_vid; + u8 Max_fid, Start_fid, Max_vid; struct cpuid_result cpuid1; /* See if the CPUID(0x80000007) returned EDX[2:1]==11b */ @@ -777,7 +777,6 @@ static int pstates_algorithm(u32 pcontrol_blk, u8 plen, u8 onlyBSP) Max_fid = (msr.lo & 0x3F0000) >> 16; Max_vid = (msr.hi & 0x3F0000) >> 16; Start_fid = (msr.lo & 0x3F00) >> 8; - Start_vid = (msr.hi & 0x3F00) >> 8; cmp_cap = (pci_read_config16(dev_find_slot(0, PCI_DEVFN(0x18, 3)), 0xE8) &

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Patch set updated for coreboot: ced4001 dmp/vortex86ex: Move DMP specific POST code defines into one file
by Andrew Wu 11 Nov '13

11 Nov '13

Andrew Wu (arw(a)dmp.com.tw) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/3989 -gerrit commit ced4001593a4ec99fe65e8a25f74efb55d81555a Author: Andrew Wu <arw(a)dmp.com.tw> Date: Fri Oct 25 16:22:57 2013 +0800 dmp/vortex86ex: Move DMP specific POST code defines into one file Move into src/cpu/dmp/dmp_post_code.h Change-Id: If9f4d842f352eb41618e71f49a226d3cc4ad0b46 Signed-off-by: Andrew Wu <arw(a)dmp.com.tw> --- src/cpu/dmp/dmp_post_code.h | 33 ++++++++++++++++++++++++++++ src/mainboard/dmp/vortex86ex/romstage.c | 10 +++------ src/southbridge/dmp/vortex86ex/southbridge.c | 15 +++++-------- 3 files changed, 41 insertions(+), 17 deletions(-) diff --git a/src/cpu/dmp/dmp_post_code.h b/src/cpu/dmp/dmp_post_code.h new file mode 100644 index 0000000..6658ce8 --- /dev/null +++ b/src/cpu/dmp/dmp_post_code.h @@ -0,0 +1,33 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2013 DMP Electronics Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#ifndef DMP_POST_CODE_H +#define DMP_POST_CODE_H + +/* DMP Vortex86EX specific POST codes */ + +#define POST_DMP_KBD_FW_UPLOAD 0x06 +#define POST_DMP_KBD_CHK_READY 0x07 +#define POST_DMP_KBD_IS_READY 0x08 +#define POST_DMP_KBD_FW_VERIFY_ERR 0x82 +#define POST_DMP_ID_ERR 0x85 +#define POST_DMP_DRAM_TEST_ERR 0x86 +#define POST_DMP_DRAM_SIZING_ERR 0x77 + +#endif /* DMP_POST_CODE_H*/ diff --git a/src/mainboard/dmp/vortex86ex/romstage.c b/src/mainboard/dmp/vortex86ex/romstage.c index 72fbde0..b08d621 100644 --- a/src/mainboard/dmp/vortex86ex/romstage.c +++ b/src/mainboard/dmp/vortex86ex/romstage.c @@ -27,6 +27,7 @@ #include "northbridge/dmp/vortex86ex/northbridge.h" #include "southbridge/dmp/vortex86ex/southbridge.h" #include "northbridge/dmp/vortex86ex/raminit.c" +#include "cpu/dmp/dmp_post_code.h" #define DMP_CPUID_SX 0x31504d44 #define DMP_CPUID_DX 0x32504d44 @@ -35,11 +36,6 @@ #define DMP_CPUID_MX_PLUS 0x35504d44 #define DMP_CPUID_EX 0x37504d44 -/* Post codes */ -#define POST_DMP_ID_ERR 0x85 -#define POST_DRAM_TEST_ERR 0x86 -#define POST_DRAM_SIZING_ERR 0x77 - static u32 get_dmp_id(void) { return pci_read_config32(NB, NB_REG_CID); @@ -273,7 +269,7 @@ static void test_dram_stability(void) } } if (v != -1) { - post_code(POST_DRAM_TEST_ERR); + post_code(POST_DMP_DRAM_TEST_ERR); print_emerg("DRAM stablility test error!\nADDR = "); print_emerg_hex32(v); print_emerg(", WRITE = "); @@ -342,7 +338,7 @@ static void main(unsigned long bist) reg_nb_f1_cc &= ~(1 << 4); pci_write_config8(NB1, 0xcc, reg_nb_f1_cc); if (detect_ddr3_dram_size()) { - post_code(POST_DRAM_SIZING_ERR); + post_code(POST_DMP_DRAM_SIZING_ERR); die("DRAM sizing error!\n"); } /* Reset enhance read push write to default(enable) */ diff --git a/src/southbridge/dmp/vortex86ex/southbridge.c b/src/southbridge/dmp/vortex86ex/southbridge.c index ddb99b8..61c484f 100644 --- a/src/southbridge/dmp/vortex86ex/southbridge.c +++ b/src/southbridge/dmp/vortex86ex/southbridge.c @@ -28,6 +28,7 @@ #include "arch/io.h" #include "chip.h" #include "southbridge.h" +#include "cpu/dmp/dmp_post_code.h" /* IRQ number to S/B PCI Interrupt routing table reg(0x58/0xb4) mapping table. */ static const unsigned char irq_to_int_routing[16] = { @@ -89,12 +90,6 @@ static const unsigned char irq_to_int_routing[16] = { #define LPT_PDMAS 0 #define LPT_DREQS 0 -/* Post codes */ -#define POST_KBD_FW_UPLOAD 0x06 -#define POST_KBD_CHK_READY 0x07 -#define POST_KBD_IS_READY 0x08 -#define POST_KBD_FW_VERIFY_FAILURE 0x82 - static u8 get_pci_dev_func(device_t dev) { return PCI_FUNC(dev->path.pci.devfn); @@ -102,7 +97,7 @@ static u8 get_pci_dev_func(device_t dev) static void verify_dmp_keyboard_error(void) { - post_code(POST_KBD_FW_VERIFY_FAILURE); + post_code(POST_DMP_KBD_FW_VERIFY_ERR); die("Internal keyboard firmware verify error!\n"); } @@ -112,7 +107,7 @@ static void upload_dmp_keyboard_firmware(struct device *dev) u32 fwptr; // enable firmware uploading function by set bit 10. - post_code(POST_KBD_FW_UPLOAD); + post_code(POST_DMP_KBD_FW_UPLOAD); reg_sb_c0 = pci_read_config32(dev, SB_REG_IPFCR); pci_write_config32(dev, SB_REG_IPFCR, reg_sb_c0 | 0x400); @@ -145,10 +140,10 @@ static void kbc_wait_system_flag(void) /* wait keyboard controller ready by checking system flag * (status port bit 2). */ - post_code(POST_KBD_CHK_READY); + post_code(POST_DMP_KBD_CHK_READY); while ((inb(0x64) & 0x4) == 0) { } - post_code(POST_KBD_IS_READY); + post_code(POST_DMP_KBD_IS_READY); } static void pci_routing_fixup(struct device *dev)

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coreboot-gerrit November 2013