coreboot-gerrit November 2013

coreboot-gerrit@coreboot.org

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New patch to review for coreboot: 4422603 google/butterfly: Declare mrc_scrambler_seed_chk in cmos.layout
by Alexandru Gagniuc 25 Nov '13

25 Nov '13

Alexandru Gagniuc (mr.nuke.me(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/4269 -gerrit commit 4422603e221b0809f80a8423e6646270ba20ece0 Author: Alexandru Gagniuc <mr.nuke.me(a)gmail.com> Date: Sun Nov 24 19:56:21 2013 -0600 google/butterfly: Declare mrc_scrambler_seed_chk in cmos.layout SandyBridge raminit uses this CMOS option. If it is not declared, the build fails when USE_OPTION_TABLE is selected. Change-Id: I1ba1f994d4ea3824dc66e8f35d0b5b24b88d4dd6 Signed-off-by: Alexandru Gagniuc <mr.nuke.me(a)gmail.com> --- src/mainboard/google/butterfly/cmos.layout | 1 + 1 file changed, 1 insertion(+) diff --git a/src/mainboard/google/butterfly/cmos.layout b/src/mainboard/google/butterfly/cmos.layout index afdd3c6..05de624 100644 --- a/src/mainboard/google/butterfly/cmos.layout +++ b/src/mainboard/google/butterfly/cmos.layout @@ -95,6 +95,7 @@ entries # SandyBridge MRC Scrambler Seed values 896 32 r 0 mrc_scrambler_seed 928 32 r 0 mrc_scrambler_seed_s3 +960 16 r 0 mrc_scrambler_seed_chk # coreboot config options: check sums 984 16 h 0 check_sum

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Patch merged into coreboot/master: a0ca7d0 .gitignore: Properly ignore KDevelop files
by gerrit＠coreboot.org 25 Nov '13

25 Nov '13

the following patch was just integrated into master: commit a0ca7d045871acef0649d7b74e29eb70008a2326 Author: mrnuke <mrnuke(a)nukelap.gtech> Date: Sun Nov 24 18:29:58 2013 -0600 .gitignore: Properly ignore KDevelop files Change-Id: I1410242e4d1995baedd5d3a001f86619e729db98 Signed-off-by: Alexandru Gagniuc <mr.nuke.me(a)gmail.com> Reviewed-on: http://review.coreboot.org/4268 Reviewed-by: Ronald G. Minnich <rminnich(a)gmail.com> Tested-by: build bot (Jenkins) See http://review.coreboot.org/4268 for details. -gerrit

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New patch to review for coreboot: 5639820 .gitignore: Properly ignore KDevelop files
by Alexandru Gagniuc 25 Nov '13

25 Nov '13

Alexandru Gagniuc (mr.nuke.me(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/4268 -gerrit commit 5639820bded045f182ba54b372bd980a30a0d588 Author: mrnuke <mrnuke(a)nukelap.gtech> Date: Sun Nov 24 18:29:58 2013 -0600 .gitignore: Properly ignore KDevelop files Change-Id: I1410242e4d1995baedd5d3a001f86619e729db98 Signed-off-by: Alexandru Gagniuc <mr.nuke.me(a)gmail.com> --- .gitignore | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/.gitignore b/.gitignore index 65bd9fb..1fe961b 100644 --- a/.gitignore +++ b/.gitignore @@ -52,7 +52,7 @@ tarballs/ *~ *.kate-swp # Ignore Kdevelop project file -.kdev4 +*.kdev4 util/*/.dependencies util/*/.test

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Patch merged into coreboot/master: 5183ab6 no-car/cbmemc: Fix compilation
by gerrit＠coreboot.org 24 Nov '13

24 Nov '13

the following patch was just integrated into master: commit 5183ab64b5896133b1e02ed4687e27aaa41877e7 Author: Vladimir Serbinenko <phcoder(a)gmail.com> Date: Sun Nov 24 09:41:32 2013 +0100 no-car/cbmemc: Fix compilation the part !CAR && PRE_RAM is obviously meant as dummies. Unfortunately cbmemc_tx_byte has wrong number of arguments and hence causes compilation failure. Found out when compiling for vexpress-a9. Change-Id: Ic84d142bac5c455c2371fbc9439c898de04a974e Signed-off-by: Vladimir Serbinenko <phcoder(a)gmail.com> Reviewed-on: http://review.coreboot.org/4267 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> See http://review.coreboot.org/4267 for details. -gerrit

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Patch merged into coreboot/master: 990555b haswell: Update GT PM register value
by gerrit＠coreboot.org 24 Nov '13

24 Nov '13

the following patch was just integrated into master: commit 990555b0efafa2860888eeb335477720f464acb2 Author: Duncan Laurie <dlaurie(a)chromium.org> Date: Fri May 10 11:00:07 2013 -0700 haswell: Update GT PM register value This was changed to 0x80000000 in SA BWG 1.5.0. Change-Id: Ic6773f45057f3eb93b2d93ee543e3db77fccf805 Signed-off-by: Duncan Laurie <dlaurie(a)chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/50852 Reviewed-by: Aaron Durbin <adurbin(a)chromium.org> Reviewed-on: http://review.coreboot.org/4166 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc <mr.nuke.me(a)gmail.com> See http://review.coreboot.org/4166 for details. -gerrit

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Patch merged into coreboot/master: fd0bc14 haswell: Update ULT microcode to 0x10
by gerrit＠coreboot.org 24 Nov '13

24 Nov '13

the following patch was just integrated into master: commit fd0bc14844d7ef96781404e4d0a14e522e4f5827 Author: Duncan Laurie <dlaurie(a)chromium.org> Date: Thu May 9 07:41:58 2013 -0700 haswell: Update ULT microcode to 0x10 [ 1.503741] microcode: CPU0 sig=0x40651, pf=0x40, revision=0x10 [ 1.510483] microcode: CPU1 sig=0x40651, pf=0x40, revision=0x10 [ 1.517213] microcode: CPU2 sig=0x40651, pf=0x40, revision=0x10 [ 1.523947] microcode: CPU3 sig=0x40651, pf=0x40, revision=0x10 Change-Id: I19ef40b636eebeb8cc29cc0404abbe263ec8eaa7 Signed-off-by: Duncan Laurie <dlaurie(a)chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/50655 Reviewed-by: Aaron Durbin <adurbin(a)chromium.org> Reviewed-on: http://review.coreboot.org/4165 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc <mr.nuke.me(a)gmail.com> See http://review.coreboot.org/4165 for details. -gerrit

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Patch merged into coreboot/master: 1c09710 haswell: Remove limit on package C-state
by gerrit＠coreboot.org 24 Nov '13

24 Nov '13

the following patch was just integrated into master: commit 1c097107099201e60be5745b839268752878dc34 Author: Duncan Laurie <dlaurie(a)chromium.org> Date: Tue May 7 13:19:56 2013 -0700 haswell: Remove limit on package C-state With the XHCI controller enabled we no longer hang the system when dropping into a package C-state so remove the code that was disabling it. Change-Id: Icd60488fd2506dac04fb6ec96a77bec265b10d8c Signed-off-by: Duncan Laurie <dlaurie(a)chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/50355 Reviewed-by: Aaron Durbin <adurbin(a)chromium.org> Reviewed-on: http://review.coreboot.org/4163 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc <mr.nuke.me(a)gmail.com> See http://review.coreboot.org/4163 for details. -gerrit

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Patch merged into coreboot/master: 5818112 haswell: Update ChromeOS ACPI GPIO package
by gerrit＠coreboot.org 24 Nov '13

24 Nov '13

the following patch was just integrated into master: commit 58181124f656af4362395765933ab7747aaba8b4 Author: Duncan Laurie <dlaurie(a)chromium.org> Date: Tue May 7 11:31:33 2013 -0700 haswell: Update ChromeOS ACPI GPIO package The chromeos_acpi driver sysfs naming is not what crossystem expects if there is just one entry in the package because it does not add a ".#" suffix in that case. Specify all the expected GPIOs on wtm2 as undefined, which should be 0xFF and not 0x00 becuase 0 is a valid GPIO. Change-Id: I9b17e9bab94219695e65b17914c84acf02a0983b Signed-off-by: Duncan Laurie <dlaurie(a)chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/50337 Reviewed-by: Aaron Durbin <adurbin(a)chromium.org> Reviewed-on: http://review.coreboot.org/4162 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc <mr.nuke.me(a)gmail.com> See http://review.coreboot.org/4162 for details. -gerrit

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Patch merged into coreboot/master: 5b41785 haswell: split microcode between ULT and non-ULT
by gerrit＠coreboot.org 24 Nov '13

24 Nov '13

the following patch was just integrated into master: commit 5b4178575f65715c168989bf3e0719d99fccd366 Author: Aaron Durbin <adurbin(a)chromium.org> Date: Tue May 7 11:05:06 2013 -0500 haswell: split microcode between ULT and non-ULT The current microcode blobs contain both ULT and non-ULT revisions. Only include one or the other based off of the CONFIG_INTEL_LYNXPOINT_LP Kconfig option. Change-Id: I3e4e41d4cd727b1a974361fb469267e6f6022d5a Signed-off-by: Aaron Durbin <adurbin(a)chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/50318 Reviewed-by: Duncan Laurie <dlaurie(a)chromium.org> Reviewed-on: http://review.coreboot.org/4160 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc <mr.nuke.me(a)gmail.com> See http://review.coreboot.org/4160 for details. -gerrit

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Patch merged into coreboot/master: 8e0cd49 haswell: enable monotonic timer
by gerrit＠coreboot.org 24 Nov '13

24 Nov '13

the following patch was just integrated into master: commit 8e0cd496a15b1e20571806468e7d2a9a5b1c9890 Author: Aaron Durbin <adurbin(a)chromium.org> Date: Wed May 1 13:29:45 2013 -0500 haswell: enable monotonic timer For all the current haswell boards enable the monotonic timer. The ULT boards use the 24MHz MSR while the non-ULT boards use the local apic. Change-Id: I8b19f526a5a49e8467f296c566a2c4263bc5a863 Signed-off-by: Aaron Durbin <adurbin(a)chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/49763 Reviewed-by: Stefan Reinauer <reinauer(a)chromium.org> Reviewed-by: Duncan Laurie <dlaurie(a)chromium.org> Reviewed-on: http://review.coreboot.org/4148 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc <mr.nuke.me(a)gmail.com> See http://review.coreboot.org/4148 for details. -gerrit

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coreboot-gerrit November 2013