October 2019 - flashrom-gerrit

Change in flashrom[master]: meson.build: Sanitize the version string
by Richard Hughes (Code Review) Oct. 16, 2019

Oct. 16, 2019

Richard Hughes has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/35566 ) Change subject: meson.build: Sanitize the version string ...................................................................... Patch Set 5: Code-Review+1 I guess it's slightly odd just to not post-release bump the version, but looks good to me. -- To view, visit https://review.coreboot.org/c/flashrom/+/35566 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I25587ed2ad7fbcffdf14eb758c1f0d6ab2aea545 Gerrit-Change-Number: 35566 Gerrit-PatchSet: 5 Gerrit-Owner: Mario Limonciello <superm1(a)gmail.com> Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: Jacob Garber <jgarber1(a)ualberta.ca> Gerrit-Reviewer: Mario Limonciello <superm1(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Richard Hughes <richard(a)hughsie.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Wed, 16 Oct 2019 08:05:33 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in flashrom[master]: meson.build: Sanitize the version string
by David Hendricks (Code Review) Oct. 16, 2019

Oct. 16, 2019

David Hendricks has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/35566 ) Change subject: meson.build: Sanitize the version string ...................................................................... Patch Set 4: Code-Review+1 -- To view, visit https://review.coreboot.org/c/flashrom/+/35566 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I25587ed2ad7fbcffdf14eb758c1f0d6ab2aea545 Gerrit-Change-Number: 35566 Gerrit-PatchSet: 4 Gerrit-Owner: Mario Limonciello <superm1(a)gmail.com> Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: Jacob Garber <jgarber1(a)ualberta.ca> Gerrit-Reviewer: Mario Limonciello <superm1(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Richard Hughes <richard(a)hughsie.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Wed, 16 Oct 2019 00:09:55 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in flashrom[master]: meson.build: Sanitize the version string
by Mario Limonciello (Code Review) Oct. 15, 2019

Oct. 15, 2019

Mario Limonciello has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/35566 ) Change subject: meson.build: Sanitize the version string ...................................................................... Patch Set 4: I did check and fwupd gets along just fine with the dirty part of the string in there. So yeah, let's just leave it. -- To view, visit https://review.coreboot.org/c/flashrom/+/35566 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I25587ed2ad7fbcffdf14eb758c1f0d6ab2aea545 Gerrit-Change-Number: 35566 Gerrit-PatchSet: 4 Gerrit-Owner: Mario Limonciello <superm1(a)gmail.com> Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: Jacob Garber <jgarber1(a)ualberta.ca> Gerrit-Reviewer: Mario Limonciello <superm1(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Richard Hughes <richard(a)hughsie.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Tue, 15 Oct 2019 18:36:14 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in flashrom[master]: meson.build: Sanitize the version string
by Mario Limonciello (Code Review) Oct. 15, 2019

Oct. 15, 2019

Hello Jacob Garber, Richard Hughes, David Hendricks, Paul Menzel, build bot (Jenkins), Nico Huber, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/flashrom/+/35566 to look at the new patch set (#4). Change subject: meson.build: Sanitize the version string ...................................................................... meson.build: Sanitize the version string Match strictly the library version, and remove all letters and stuff after dashes. Change-Id: I25587ed2ad7fbcffdf14eb758c1f0d6ab2aea545 Signed-off-by: Mario Limonciello <mario.limonciello(a)dell.com> --- M meson.build 1 file changed, 10 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/66/35566/4 -- To view, visit https://review.coreboot.org/c/flashrom/+/35566 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I25587ed2ad7fbcffdf14eb758c1f0d6ab2aea545 Gerrit-Change-Number: 35566 Gerrit-PatchSet: 4 Gerrit-Owner: Mario Limonciello <superm1(a)gmail.com> Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: Jacob Garber <jgarber1(a)ualberta.ca> Gerrit-Reviewer: Mario Limonciello <superm1(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Richard Hughes <richard(a)hughsie.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: newpatchset

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Change in flashrom[master]: meson.build: Sanitize the version string
by Mario Limonciello (Code Review) Oct. 15, 2019

Oct. 15, 2019

Mario Limonciello has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/35566 ) Change subject: meson.build: Sanitize the version string ...................................................................... Patch Set 3: (1 comment) https://review.coreboot.org/c/flashrom/+/35566/2/meson.build File meson.build: https://review.coreboot.org/c/flashrom/+/35566/2/meson.build@360 PS2, Line 360: #strip dirty version info > Unconditionally stripping a -dirty defeats the purpose of a -dirty. […] Well some projects automatically bump version to something newer as the first commit after release. That's one way to "fix" it. I certainly agree there is value to this version information. I guess let's run with no dash stripping for now and see who complains and go from there. I'll adjust this CL. -- To view, visit https://review.coreboot.org/c/flashrom/+/35566 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I25587ed2ad7fbcffdf14eb758c1f0d6ab2aea545 Gerrit-Change-Number: 35566 Gerrit-PatchSet: 3 Gerrit-Owner: Mario Limonciello <superm1(a)gmail.com> Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: Jacob Garber <jgarber1(a)ualberta.ca> Gerrit-Reviewer: Mario Limonciello <superm1(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Richard Hughes <richard(a)hughsie.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Tue, 15 Oct 2019 14:00:56 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Mario Limonciello <superm1(a)gmail.com> Comment-In-Reply-To: Nico Huber <nico.h(a)gmx.de> Gerrit-MessageType: comment

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Change in flashrom[master]: meson.build: Sanitize the version string
by Nico Huber (Code Review) Oct. 14, 2019

Oct. 14, 2019

Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/35566 ) Change subject: meson.build: Sanitize the version string ...................................................................... Patch Set 2: (1 comment) https://review.coreboot.org/c/flashrom/+/35566/2/meson.build File meson.build: https://review.coreboot.org/c/flashrom/+/35566/2/meson.build@360 PS2, Line 360: #strip dirty version info > Well it makes doing "development" against libflashrom more difficult. […] Unconditionally stripping a -dirty defeats the purpose of a -dirty. However, it seems futile to argue, if we have to drop 80% of the version information anyway. If many people use pkgconfig during development, I wonder why nobody fixes it? The original argument was to make the version "numbers" comparable. But in-development versions are not comparable anyway. It just makes no sense... How about we make the dash-stripping a development option? Or even set the version to 99.99 for anything in development? I'd like to avoid that anyone accidentally builds something that looks like a release but isn't. -- To view, visit https://review.coreboot.org/c/flashrom/+/35566 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I25587ed2ad7fbcffdf14eb758c1f0d6ab2aea545 Gerrit-Change-Number: 35566 Gerrit-PatchSet: 2 Gerrit-Owner: Mario Limonciello <superm1(a)gmail.com> Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: Jacob Garber <jgarber1(a)ualberta.ca> Gerrit-Reviewer: Mario Limonciello <superm1(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Richard Hughes <richard(a)hughsie.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Mon, 14 Oct 2019 17:15:39 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Mario Limonciello <superm1(a)gmail.com> Comment-In-Reply-To: Nico Huber <nico.h(a)gmx.de> Gerrit-MessageType: comment

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Change in flashrom[master]: meson.build: Sanitize the version string
by Mario Limonciello (Code Review) Oct. 14, 2019

Oct. 14, 2019

Mario Limonciello has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/35566 ) Change subject: meson.build: Sanitize the version string ...................................................................... Patch Set 2: (1 comment) https://review.coreboot.org/c/flashrom/+/35566/2/meson.build File meson.build: https://review.coreboot.org/c/flashrom/+/35566/2/meson.build@360 PS2, Line 360: #strip dirty version info > yes, I get that. but is there really a use case for dirty packages? […] Well it makes doing "development" against libflashrom more difficult. It would be better to lie about the version and keep the dirty stuff out so it can at least be linked against. -- To view, visit https://review.coreboot.org/c/flashrom/+/35566 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I25587ed2ad7fbcffdf14eb758c1f0d6ab2aea545 Gerrit-Change-Number: 35566 Gerrit-PatchSet: 2 Gerrit-Owner: Mario Limonciello <superm1(a)gmail.com> Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: Jacob Garber <jgarber1(a)ualberta.ca> Gerrit-Reviewer: Mario Limonciello <superm1(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Richard Hughes <richard(a)hughsie.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Mon, 14 Oct 2019 16:41:02 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Mario Limonciello <superm1(a)gmail.com> Comment-In-Reply-To: Nico Huber <nico.h(a)gmx.de> Gerrit-MessageType: comment

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Change in flashrom[master]: flashchips: Add N25Q00A devices
by Jacob Creedon (Code Review) Oct. 14, 2019

Oct. 14, 2019

Jacob Creedon has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/34521 ) Change subject: flashchips: Add N25Q00A devices ...................................................................... flashchips: Add N25Q00A devices This adds the 1Gb N25Q00A device in both the 1.8v and 3v variants. This is implemented from the datasheet and is marked as untested. Signed-off-by: Jacob Creedon <jcreedon(a)google.com> Change-Id: If36880f37746c95a97c8122a8f2fd0aecede5e8e --- M flashchips.c 1 file changed, 80 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/21/34521/1 diff --git a/flashchips.c b/flashchips.c index 021ae6c..5d292f1 100644 --- a/flashchips.c +++ b/flashchips.c @@ -10304,6 +10304,86 @@ { .vendor = "Micron/Numonyx/ST", + .name = "N25Q00A..1G", /* ..1G = 1.8V, uniform 64KB/4KB blocks/sectors */ + .bustype = BUS_SPI, + .manufacture_id = ST_ID, + .model_id = ST_N25Q00A__1G, + .total_size = 131072, + .page_size = 256, + /* supports SFDP */ + /* OTP: 64B total; read 0x4B, write 0x42 */ + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_4BA_WREN, + .tested = TEST_UNTESTED, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 32768} }, + .block_erase = spi_block_erase_21, + }, { + .eraseblocks = { {4 * 1024, 32768} }, + .block_erase = spi_block_erase_20, + }, { + .eraseblocks = { {64 * 1024, 2048} }, + .block_erase = spi_block_erase_dc, + }, { + .eraseblocks = { {64 * 1024, 2048} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {32768 * 1024, 4} }, + .block_erase = spi_block_erase_c4, + } + }, + .printlock = spi_prettyprint_status_register_n25q, /* TODO: config, lock, flag regs */ + .unlock = spi_disable_blockprotect_n25q, /* TODO: per 64kB sector lock registers */ + .write = spi_chip_write_256, /* Multi I/O supported */ + .read = spi_chip_read, /* Fast read (0x0B) and multi I/O supported */ + .voltage = {1700, 2000}, + }, + + { + .vendor = "Micron/Numonyx/ST", + .name = "N25Q00A..3G", /* ..3G = 3V, uniform 64KB/4KB blocks/sectors */ + .bustype = BUS_SPI, + .manufacture_id = ST_ID, + .model_id = ST_N25Q00A__3G, + .total_size = 131072, + .page_size = 256, + /* supports SFDP */ + /* OTP: 64B total; read 0x4B, write 0x42 */ + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_4BA_WREN, + .tested = TEST_UNTESTED, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 32768} }, + .block_erase = spi_block_erase_21, + }, { + .eraseblocks = { {4 * 1024, 32768} }, + .block_erase = spi_block_erase_20, + }, { + .eraseblocks = { {64 * 1024, 2048} }, + .block_erase = spi_block_erase_dc, + }, { + .eraseblocks = { {64 * 1024, 2048} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {32768 * 1024, 4} }, + .block_erase = spi_block_erase_c4, + } + }, + .printlock = spi_prettyprint_status_register_n25q, /* TODO: config, lock, flag regs */ + .unlock = spi_disable_blockprotect_n25q, /* TODO: per 64kB sector lock registers */ + .write = spi_chip_write_256, /* Multi I/O supported */ + .read = spi_chip_read, /* Fast read (0x0B) and multi I/O supported */ + .voltage = {2700, 3600}, + }, + + { + .vendor = "Micron/Numonyx/ST", .name = "N25Q016", .bustype = BUS_SPI, .manufacture_id = ST_ID, -- To view, visit https://review.coreboot.org/c/flashrom/+/34521 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: If36880f37746c95a97c8122a8f2fd0aecede5e8e Gerrit-Change-Number: 34521 Gerrit-PatchSet: 1 Gerrit-Owner: Jacob Creedon <jcreedon(a)google.com> Gerrit-MessageType: newchange

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Change in flashrom[master]: flashchips: Fix part names for N25Q512 and N25Q00A
by Jacob Creedon (Code Review) Oct. 14, 2019

Oct. 14, 2019

Jacob Creedon has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/34520 ) Change subject: flashchips: Fix part names for N25Q512 and N25Q00A ...................................................................... flashchips: Fix part names for N25Q512 and N25Q00A For the N25Q512 and N25Q00A, the 1G and 3G are used instead of 1E and 3E to represent 1.8v and 3v respectively. Signed-off-by: Jacob Creedon <jcreedon(a)google.com> Change-Id: I289c33f7293f47b9449907350654cd6183c778d4 --- M flashchips.c M flashchips.h 2 files changed, 12 insertions(+), 12 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/20/34520/1 diff --git a/flashchips.c b/flashchips.c index 3a0da8d..021ae6c 100644 --- a/flashchips.c +++ b/flashchips.c @@ -10625,10 +10625,10 @@ { .vendor = "Micron/Numonyx/ST", - .name = "N25Q512..1E", /* ..1E = 1.8V, uniform 64KB/4KB blocks/sectors */ + .name = "N25Q512..1G", /* ..1G = 1.8V, uniform 64KB/4KB blocks/sectors */ .bustype = BUS_SPI, .manufacture_id = ST_ID, - .model_id = ST_N25Q512__1E, + .model_id = ST_N25Q512__1G, .total_size = 65536, .page_size = 256, /* supports SFDP */ @@ -10665,10 +10665,10 @@ { .vendor = "Micron/Numonyx/ST", - .name = "N25Q512..3E", /* ..3E = 3V, uniform 64KB/4KB blocks/sectors */ + .name = "N25Q512..3G", /* ..3G = 3V, uniform 64KB/4KB blocks/sectors */ .bustype = BUS_SPI, .manufacture_id = ST_ID, - .model_id = ST_N25Q512__3E, + .model_id = ST_N25Q512__3G, .total_size = 65536, .page_size = 256, /* supports SFDP */ @@ -10708,7 +10708,7 @@ .name = "MT25QL01G", /* L = 3V, uniform 64KB/4KB blocks/sectors */ .bustype = BUS_SPI, .manufacture_id = ST_ID, - .model_id = ST_N25Q00A__3E, + .model_id = ST_N25Q00A__3G, .total_size = 131072, .page_size = 256, /* supports SFDP */ @@ -10754,7 +10754,7 @@ .name = "MT25QU01G", /* U = 1.8V, uniform 64KB/4KB blocks/sectors */ .bustype = BUS_SPI, .manufacture_id = ST_ID, - .model_id = ST_N25Q00A__1E, + .model_id = ST_N25Q00A__1G, .total_size = 131072, .page_size = 256, /* supports SFDP */ @@ -11070,7 +11070,7 @@ .name = "MT25QL512", /* L = 3V, uniform 64KB/4KB blocks/sectors */ .bustype = BUS_SPI, .manufacture_id = ST_ID, - .model_id = ST_N25Q512__3E, + .model_id = ST_N25Q512__3G, .total_size = 65536, .page_size = 256, /* supports SFDP */ @@ -11119,7 +11119,7 @@ .name = "MT25QU512", /* U = 1.8V, uniform 64KB/4KB blocks/sectors */ .bustype = BUS_SPI, .manufacture_id = ST_ID, - .model_id = ST_N25Q512__1E, + .model_id = ST_N25Q512__1G, .total_size = 65536, .page_size = 256, /* supports SFDP */ diff --git a/flashchips.h b/flashchips.h index e53e0df..0dcf735 100644 --- a/flashchips.h +++ b/flashchips.h @@ -866,10 +866,10 @@ #define ST_N25Q128__1E 0xBB18 /* N25Q128/MT25QU128, 1.8V, (uniform sectors expected) */ #define ST_N25Q256__3E 0xBA19 /* N25Q256/MT25QL256, 3.0V, (uniform sectors expected) */ #define ST_N25Q256__1E 0xBB19 /* N25Q256/MT25QU256, 1.8V, (uniform sectors expected) */ -#define ST_N25Q512__3E 0xBA20 /* N25Q512/MT25QL512, 3.0V, (uniform sectors expected) */ -#define ST_N25Q512__1E 0xBB20 /* N25Q512/MT25QU512, 1.8V, (uniform sectors expected) */ -#define ST_N25Q00A__3E 0xBA21 /* N25Q00A/MT25QL01G, 3.0V, (uniform sectors expected) */ -#define ST_N25Q00A__1E 0xBB21 /* N25Q00A/MT25QU01G, 1.8V, (uniform sectors expected) */ +#define ST_N25Q512__3G 0xBA20 /* N25Q512/MT25QL512, 3.0V, (uniform sectors expected) */ +#define ST_N25Q512__1G 0xBB20 /* N25Q512/MT25QU512, 1.8V, (uniform sectors expected) */ +#define ST_N25Q00A__3G 0xBA21 /* N25Q00A/MT25QL01G, 3.0V, (uniform sectors expected) */ +#define ST_N25Q00A__1G 0xBB21 /* N25Q00A/MT25QU01G, 1.8V, (uniform sectors expected) */ #define ST_MT25QL02G 0xBA22 /* MT25QL02G, 3.0V, (uniform sectors expected) */ #define ST_MT25QU02G 0xBB22 /* MT25QU02G, 1.8V, (uniform sectors expected) */ #define ST_NP5Q032 0xDA16 /* Phase-change memory (PCM), 3V */ -- To view, visit https://review.coreboot.org/c/flashrom/+/34520 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I289c33f7293f47b9449907350654cd6183c778d4 Gerrit-Change-Number: 34520 Gerrit-PatchSet: 1 Gerrit-Owner: Jacob Creedon <jcreedon(a)google.com> Gerrit-MessageType: newchange

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Change in flashrom[master]: flashchips: Add missing MT25Q capacities
by Jacob Creedon (Code Review) Oct. 14, 2019

Oct. 14, 2019

Jacob Creedon has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/34492 ) Change subject: flashchips: Add missing MT25Q capacities ...................................................................... flashchips: Add missing MT25Q capacities This adds the 128Mb, 1Gb, and 2Gb capacities of the MT25Q devices. All of these are implemented via the datasheet and should work but are untested in hardware. Signed-off-by: Jacob Creedon <jcreedon(a)google.com> Change-Id: Ice6ea9426361afc25d4b731e2e3079edf234fdda --- M flashchips.c M flashchips.h 2 files changed, 274 insertions(+), 7 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/92/34492/1 diff --git a/flashchips.c b/flashchips.c index 5424a04..6b553fb 100644 --- a/flashchips.c +++ b/flashchips.c @@ -10705,6 +10705,270 @@ { .vendor = "Micron", + .name = "MT25QL01G", /* L = 3V, uniform 64KB/4KB blocks/sectors */ + .bustype = BUS_SPI, + .manufacture_id = ST_ID, + .model_id = ST_N25Q00A__3E, + .total_size = 131072, + .page_size = 256, + /* supports SFDP */ + /* OTP: 64B total; read 0x4B, write 0x42 */ + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_4BA_WREN, + .tested = TEST_UNTESTED, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 32768} }, + .block_erase = spi_block_erase_21, + }, { + .eraseblocks = { {4 * 1024, 32768} }, + .block_erase = spi_block_erase_20, + }, { + .eraseblocks = { {32 * 1024, 4096} }, + .block_erase = spi_block_erase_5c, + }, { + .eraseblocks = { {32 * 1024, 4096} }, + .block_erase = spi_block_erase_52, + }, { + .eraseblocks = { {64 * 1024, 2048} }, + .block_erase = spi_block_erase_dc, + }, { + .eraseblocks = { {64 * 1024, 2048} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {131072 * 1024, 1} }, + .block_erase = spi_block_erase_c4, + } + }, + .printlock = spi_prettyprint_status_register_n25q, /* TODO: config, lock, flag regs */ + .unlock = spi_disable_blockprotect_n25q, /* TODO: per 64kB sector lock registers */ + .write = spi_chip_write_256, /* Multi I/O supported */ + .read = spi_chip_read, /* Fast read (0x0B) and multi I/O supported */ + .voltage = {2700, 3600}, + }, + + { + .vendor = "Micron", + .name = "MT25QU01G", /* U = 1.8V, uniform 64KB/4KB blocks/sectors */ + .bustype = BUS_SPI, + .manufacture_id = ST_ID, + .model_id = ST_N25Q00A__1E, + .total_size = 131072, + .page_size = 256, + /* supports SFDP */ + /* OTP: 64B total; read 0x4B, write 0x42 */ + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_4BA_WREN, + .tested = TEST_UNTESTED, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 32768} }, + .block_erase = spi_block_erase_21, + }, { + .eraseblocks = { {4 * 1024, 32768} }, + .block_erase = spi_block_erase_20, + }, { + .eraseblocks = { {32 * 1024, 4096} }, + .block_erase = spi_block_erase_5c, + }, { + .eraseblocks = { {32 * 1024, 4096} }, + .block_erase = spi_block_erase_52, + }, { + .eraseblocks = { {64 * 1024, 2048} }, + .block_erase = spi_block_erase_dc, + }, { + .eraseblocks = { {64 * 1024, 2048} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {131072 * 1024, 1} }, + .block_erase = spi_block_erase_c4, + } + }, + .printlock = spi_prettyprint_status_register_n25q, /* TODO: config, lock, flag regs */ + .unlock = spi_disable_blockprotect_n25q, /* TODO: per 64kB sector lock registers */ + .write = spi_chip_write_256, /* Multi I/O supported */ + .read = spi_chip_read, /* Fast read (0x0B) and multi I/O supported */ + .voltage = {1700, 2000}, + }, + + { + .vendor = "Micron", + .name = "MT25QL02G", /* L = 3V, uniform 64KB/4KB blocks/sectors */ + .bustype = BUS_SPI, + .manufacture_id = ST_ID, + .model_id = ST_MT25QL02G, + .total_size = 262144, + .page_size = 256, + /* supports SFDP */ + /* OTP: 64B total; read 0x4B, write 0x42 */ + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_4BA_WREN, + .tested = TEST_UNTESTED, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 65536} }, + .block_erase = spi_block_erase_21, + }, { + .eraseblocks = { {4 * 1024, 65536} }, + .block_erase = spi_block_erase_20, + }, { + .eraseblocks = { {32 * 1024, 8192} }, + .block_erase = spi_block_erase_5c, + }, { + .eraseblocks = { {32 * 1024, 8192} }, + .block_erase = spi_block_erase_52, + }, { + .eraseblocks = { {64 * 1024, 4096} }, + .block_erase = spi_block_erase_dc, + }, { + .eraseblocks = { {64 * 1024, 4096} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {262144 * 1024, 1} }, + .block_erase = spi_block_erase_c4, + } + }, + .printlock = spi_prettyprint_status_register_n25q, /* TODO: config, lock, flag regs */ + .unlock = spi_disable_blockprotect_n25q, /* TODO: per 64kB sector lock registers */ + .write = spi_chip_write_256, /* Multi I/O supported */ + .read = spi_chip_read, /* Fast read (0x0B) and multi I/O supported */ + .voltage = {2700, 3600}, + }, + + { + .vendor = "Micron", + .name = "ST_MT25QU02G", /* U = 1.8V, uniform 64KB/4KB blocks/sectors */ + .bustype = BUS_SPI, + .manufacture_id = ST_ID, + .model_id = ST_N25Q00A__1E, + .total_size = 262144, + .page_size = 256, + /* supports SFDP */ + /* OTP: 64B total; read 0x4B, write 0x42 */ + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_4BA_WREN, + .tested = TEST_UNTESTED, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 65536} }, + .block_erase = spi_block_erase_21, + }, { + .eraseblocks = { {4 * 1024, 65536} }, + .block_erase = spi_block_erase_20, + }, { + .eraseblocks = { {32 * 1024, 8192} }, + .block_erase = spi_block_erase_5c, + }, { + .eraseblocks = { {32 * 1024, 8192} }, + .block_erase = spi_block_erase_52, + }, { + .eraseblocks = { {64 * 1024, 4096} }, + .block_erase = spi_block_erase_dc, + }, { + .eraseblocks = { {64 * 1024, 4096} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {262144 * 1024, 1} }, + .block_erase = spi_block_erase_c4, + } + }, + .printlock = spi_prettyprint_status_register_n25q, /* TODO: config, lock, flag regs */ + .unlock = spi_disable_blockprotect_n25q, /* TODO: per 64kB sector lock registers */ + .write = spi_chip_write_256, /* Multi I/O supported */ + .read = spi_chip_read, /* Fast read (0x0B) and multi I/O supported */ + .voltage = {1700, 2000}, + }, + + { + .vendor = "Micron", + .name = "MT25QU128", /* U = 1.8V, uniform 64KB/4KB blocks/sectors */ + .bustype = BUS_SPI, + .manufacture_id = ST_ID, + .model_id = ST_N25Q128__1E, + .total_size = 16384, + .page_size = 256, + /* supports SFDP */ + /* OTP: 64B total; read 0x4B, write 0x42 */ + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_4BA_WREN, + .tested = TEST_UNTESTED, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 4096} }, + .block_erase = spi_block_erase_20, + }, { + .eraseblocks = { {32 * 1024, 512} }, + .block_erase = spi_block_erase_52, + }, { + .eraseblocks = { {64 * 1024, 256} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {16384 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + }, { + .eraseblocks = { {16384 * 1024, 1} }, + .block_erase = spi_block_erase_60, + } + }, + .printlock = spi_prettyprint_status_register_n25q, /* TODO: config, lock, flag regs */ + .unlock = spi_disable_blockprotect_n25q, /* TODO: per 64kB sector lock registers */ + .write = spi_chip_write_256, /* Multi I/O supported */ + .read = spi_chip_read, /* Fast read (0x0B) and multi I/O supported */ + .voltage = {1700, 2000}, + }, + + { + .vendor = "Micron", + .name = "MT25QL128", /* L = 3V, uniform 64KB/4KB blocks/sectors */ + .bustype = BUS_SPI, + .manufacture_id = ST_ID, + .model_id = ST_N25Q128__3E, + .total_size = 16384, + .page_size = 256, + /* supports SFDP */ + /* OTP: 64B total; read 0x4B, write 0x42 */ + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_4BA_WREN, + .tested = TEST_UNTESTED, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 4096} }, + .block_erase = spi_block_erase_20, + }, { + .eraseblocks = { {32 * 1024, 512} }, + .block_erase = spi_block_erase_52, + }, { + .eraseblocks = { {64 * 1024, 256} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {16384 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + }, { + .eraseblocks = { {16384 * 1024, 1} }, + .block_erase = spi_block_erase_60, + } + }, + .printlock = spi_prettyprint_status_register_n25q, /* TODO: config, lock, flag regs */ + .unlock = spi_disable_blockprotect_n25q, /* TODO: per 64kB sector lock registers */ + .write = spi_chip_write_256, /* Multi I/O supported */ + .read = spi_chip_read, /* Fast read (0x0B) and multi I/O supported */ + .voltage = {2700, 3600}, + }, + + { + .vendor = "Micron", .name = "MT25QL256", /* L = 3V, uniform 64KB/4KB blocks/sectors */ .bustype = BUS_SPI, .manufacture_id = ST_ID, diff --git a/flashchips.h b/flashchips.h index 006b95e..e53e0df 100644 --- a/flashchips.h +++ b/flashchips.h @@ -862,13 +862,16 @@ #define ST_N25Q032__1E 0xBB16 /* N25Q032, 1.8V, (uniform sectors expected) */ #define ST_N25Q064__3E 0xBA17 /* N25Q064, 3.0V, (uniform sectors expected) */ #define ST_N25Q064__1E 0xBB17 /* N25Q064, 1.8V, (uniform sectors expected) */ -#define ST_N25Q128__3E 0xBA18 /* N25Q128, 3.0V, (uniform sectors expected) */ -#define ST_N25Q128__1E 0xBB18 /* N25Q128, 1.8V, (uniform sectors expected) */ -#define ST_N25Q256__3E 0xBA19 /* N25Q256, 3.0V, (uniform sectors expected) */ -#define ST_N25Q256__1E 0xBB19 /* N25Q256, 1.8V, (uniform sectors expected) */ -#define ST_N25Q512__3E 0xBA20 /* N25Q512, 3.0V, (uniform sectors expected) */ -#define ST_N25Q512__1E 0xBB20 /* N25Q512, 1.8V, (uniform sectors expected) */ -#define ST_N25Q00A__3E 0xBA21 /* N25Q00A, 3.0V, (uniform sectors expected) */ +#define ST_N25Q128__3E 0xBA18 /* N25Q128/MT25QL128, 3.0V, (uniform sectors expected) */ +#define ST_N25Q128__1E 0xBB18 /* N25Q128/MT25QU128, 1.8V, (uniform sectors expected) */ +#define ST_N25Q256__3E 0xBA19 /* N25Q256/MT25QL256, 3.0V, (uniform sectors expected) */ +#define ST_N25Q256__1E 0xBB19 /* N25Q256/MT25QU256, 1.8V, (uniform sectors expected) */ +#define ST_N25Q512__3E 0xBA20 /* N25Q512/MT25QL512, 3.0V, (uniform sectors expected) */ +#define ST_N25Q512__1E 0xBB20 /* N25Q512/MT25QU512, 1.8V, (uniform sectors expected) */ +#define ST_N25Q00A__3E 0xBA21 /* N25Q00A/MT25QL01G, 3.0V, (uniform sectors expected) */ +#define ST_N25Q00A__1E 0xBB21 /* N25Q00A/MT25QU01G, 1.8V, (uniform sectors expected) */ +#define ST_MT25QL02G 0xBA22 /* MT25QL02G, 3.0V, (uniform sectors expected) */ +#define ST_MT25QU02G 0xBB22 /* MT25QU02G, 1.8V, (uniform sectors expected) */ #define ST_NP5Q032 0xDA16 /* Phase-change memory (PCM), 3V */ #define ST_NP5Q064 0xDA17 /* Phase-change memory (PCM), 3V */ #define ST_NP5Q128 0xDA18 /* Phase-change memory (PCM), 3V */ -- To view, visit https://review.coreboot.org/c/flashrom/+/34492 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: Ice6ea9426361afc25d4b731e2e3079edf234fdda Gerrit-Change-Number: 34492 Gerrit-PatchSet: 1 Gerrit-Owner: Jacob Creedon <jcreedon(a)google.com> Gerrit-MessageType: newchange

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